CN109885519B - Connection switching method for serial port of main control board and main control board - Google Patents

Connection switching method for serial port of main control board and main control board Download PDF

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Publication number
CN109885519B
CN109885519B CN201910103259.1A CN201910103259A CN109885519B CN 109885519 B CN109885519 B CN 109885519B CN 201910103259 A CN201910103259 A CN 201910103259A CN 109885519 B CN109885519 B CN 109885519B
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control board
main control
serial port
cpu
target
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CN109885519A (en
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姚国朋
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New H3C Security Technologies Co Ltd
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New H3C Security Technologies Co Ltd
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Abstract

The embodiment of the application provides a connection switching method of a main control board serial port and a main control board, wherein the main control board comprises a main control board CPU, a main control board CPLD, a first main control board serial port and a preset interface, the first main control board serial port can be connected with the CPU serial port in the CPU of each board card to be debugged through the main control board CPLD, the main control board CPU is connected with the main control board CPLD and the preset interface, when a connection switching instruction is received through a preset interface, the main control board CPU determines a target CPU serial port connected with the first main control board serial port, a control instruction carrying an identification of the target CPU serial port is sent to the main control board CPLD, the main control board CPLD switches a connection end point of the first main control board serial port to a connection point connected with the target CPU serial port, and the main control board CPLD sends a debugging instruction received through the first main control board serial port to the target CPU serial port.

Description

Connection switching method for serial port of main control board and main control board
Technical Field
The present application relates to the field of communications technologies, and in particular, to a connection switching method for a serial port of a main control board and the main control board.
Background
With the rapid development of internet technology, a chassis may be generally configured with multiple types of boards, such as a main control board, a network card, a line card, and the like. The board card may be configured with a serial port (which may be referred to as a board serial port) and a board CPU (Central Processing Unit), and the board CPU may also be configured with a serial port (which may be referred to as a CPU serial port), and the board CPU may obtain an instruction through the CPU serial port.
In the prior art, a connection manner between serial ports in a chassis may be controlled by using a CPLD (Complex programmable Logic Device) in a main control board, so as to debug a board card in the chassis. For example, the chassis may include a main control board, a network card, a line card, and other devices, referring to fig. 1, the main control board CPU is connected to the main control board CPLD, and the serial port includes a serial port TXD (Transmit Data) pin and a serial port RXD (Receive Data) pin. The board card serial port of the main control board is connected with the main control board CPLD, the main control board CPLD is connected with the CPU serial ports in the CPU of each board card to be debugged in the case, and the main control board CPLD can control the connection of the board card serial ports of the main control board and the CPU serial ports in the CPU of each board card to be debugged. In fig. 1, the CPLD of the main control board connects the TXD pin of the board serial port of the main control board to both NULL and the RXD pin of the CPU serial port of the main control board CPU, and connects the RXD pin of the board serial port of the main control board to the TXD pin of the CPU serial port of the main control board CPU. Based on the circuit diagram of fig. 1, a debugger can debug the main control board.
When the board cards (such as the line cards) except the main control board need to be debugged, the main control board CPU can receive a connection switching instruction input by a debugging worker through a board card serial port of the main control board, the main control board CPU determines that the CPU serial port of the line card CPU needs to be connected with the board card serial port of the main control board according to the connection switching instruction, and sends a control instruction carrying the identification of the CPU serial port of the line card CPU to the main control board CPLD. The CPLD disconnects the TXD pin of the board serial port of the main control board from NULL and the RXD pin of the board serial port of the main control board from the TXD pin of the CPU serial port of the main control board according to the identification of the CPU serial port of the line card CPU, connects the TXD pin of the board serial port of the main control board with the RXD pin of the CPU serial port of the line card CPU, and connects the RXD pin of the board serial port of the main control board with the TXD pin of the CPU serial port of the line card CPU to obtain the circuit diagram shown in FIG. 2. Based on the circuit diagram of fig. 2, a debugging person can input a debugging instruction through the board card serial port of the main control board card, so that the debugging of the board card is realized.
As can be seen from fig. 1 and 2, when other boards except for the main control board are debugged, in order to enable the main control board CPU to receive a connection switching instruction, the board serial port TXD pin of the main control board is always connected with the CPU serial port RXD pin of the main control board CPU, the main control board CPU may receive a debugging instruction input by a debugger through the board serial port TXD pin of the main control board, and the main control board CPU runs the debugging instruction, which may cause the main control board CPU to run erroneously.
Disclosure of Invention
An object of the embodiments of the present application is to provide a connection switching method for a serial port of a main control board and the main control board, which can avoid operating errors of a CPU of the main control board to a great extent. The specific technical scheme is as follows:
in a first aspect, in order to achieve the above object, an embodiment of the present application discloses a method for switching connection of serial ports of a main control board, where the method is applied to a main control board, the main control board includes a main control board central processing unit CPU, a main control board complex programmable logic device CPLD, a first main control board serial port and a preset interface, the first main control board serial port can be connected to a CPU serial port in a CPU of each board card to be debugged through the main control board CPLD, the main control board CPU is connected to the main control board CPLD, and the preset interface is connected to the main control board CPU, where the method includes:
when the main control board CPU receives a connection switching instruction through the preset interface, the main control board CPU determines a target CPU serial port connected with the first main control board serial port in a CPU of a target board to be debugged according to the connection switching instruction, and sends a control instruction carrying an identifier of the target CPU serial port to the main control board CPLD, wherein the control instruction is used for instructing the main control board CPLD to switch a connection endpoint of the first main control board serial port from a current connection point to a connection point connected with the target CPU serial port;
the main control board CPLD switches the connection endpoint of the serial port of the first main control board from the current connection point to the connection point connected with the serial port of the target CPU according to the identification of the serial port of the target CPU;
when the main control board CPLD receives a debugging instruction through the first main control board serial port, the main control board CPLD sends the debugging instruction to the target CPU serial port, so that a target board card to be debugged, including the CPU to which the target CPU serial port belongs, receives the debugging instruction.
Optionally, if the first main control board serial port is connected to the CPU serial port in the CPU of the target board to be debugged through the main control board CPLD, the current connection point is a connection point connected to the CPU serial port in the CPU of the target board to be debugged.
Optionally, the switching, by the CPLD, the connection endpoint of the first master control board serial port from the current connection point to the connection point connected to the target CPU serial port according to the identifier of the target CPU serial port includes:
and the main control board CPLD connects a serial port data sending TXD pin of the first main control board serial port with a serial port data receiving RXD pin of the target CPU serial port according to the identification of the target CPU serial port, and connects the serial port RXD pin of the first main control board serial port with the serial port TXD pin of the target CPU serial port.
Optionally, the preset interface is a network port configured in the main control board.
Optionally, the preset interface is a second main control board serial port configured in the main control board.
In a second aspect, in order to achieve the above object, an embodiment of the present application discloses a main control board, where the main control board includes a main control board central processing unit CPU, a main control board complex programmable logic device CPLD, a first main control board serial port and a preset interface, the first main control board serial port can be connected to a CPU serial port in a CPU of each board card to be debugged through the main control board CPLD, the main control board CPU is connected to the main control board CPLD, and the preset interface is connected to the main control board CPU, where:
the main control board CPU is used for determining a target CPU serial port connected with the first main control board serial port in the CPU of a target board to be debugged according to a connection switching instruction when the connection switching instruction is received through the preset interface, and sending a control instruction carrying an identifier of the target CPU serial port to the main control board CPLD, wherein the control instruction is used for instructing the main control board CPLD to switch a connection endpoint of the first main control board serial port from a current connection point to a connection point connected with the target CPU serial port;
the main control board CPLD is used for switching the connection endpoint of the serial port of the first main control board from the current connection point to the connection point connected with the serial port of the target CPU according to the identification of the serial port of the target CPU;
and the main control board CPLD is also used for sending the debugging instruction to the target CPU serial port when the debugging instruction is received through the first main control board serial port, so that the target board card to be debugged, including the CPU to which the target CPU serial port belongs, receives the debugging instruction.
Optionally, if the first main control board serial port is connected to the CPU serial port in the CPU of the target board to be debugged through the main control board CPLD, the current connection point is a connection point connected to the CPU serial port in the CPU of the target board to be debugged.
Optionally, the main control board CPLD is specifically configured to connect, according to the identifier of the target CPU serial port, a serial port data transmitting TXD pin of the first main control board serial port with a serial port data receiving RXD pin of the target CPU serial port, and connect the serial port RXD pin of the first main control board serial port with the serial port TXD pin of the target CPU serial port.
Optionally, the preset interface is a network port configured in the main control board.
Optionally, the preset interface is a second main control board serial port configured in the main control board.
The embodiment of the application provides a connection switching method of a serial port of a main control board, which is applied to the main control board, wherein the main control board comprises a main control board CPU, a main control board CPLD, a first main control board serial port and a preset interface, the first main control board serial port can be connected with the CPU serial port in the CPU of each board card to be debugged through the main control board CPLD, the main control board CPU is connected with the main control board CPLD, and the preset interface is connected with the main control board CPU; when the main control board CPU receives a connection switching instruction through a preset interface, the main control board CPU determines a target CPU serial port connected with a first main control board serial port in a CPU of a target board to be debugged according to the connection switching instruction, and sends a control instruction carrying an identifier of the target CPU serial port to the main control board CPLD; the CPLD switches the connection endpoint of the serial port of the first main control board from the current connection point to the connection point connected with the serial port of the target CPU according to the identification of the serial port of the target CPU; when the main control board CPLD receives the debugging instruction through the first main control board serial port, the main control board CPLD sends the debugging instruction to the target CPU serial port, and the target board card to be debugged including the CPU to which the target CPU serial port belongs can receive the debugging instruction. That is, if the current first main control board serial port is connected with the CPU serial port of the main control board CPU and the board cards except the main control board CPU need to be debugged, the main control board CPU can receive the connection switching instruction through the preset interface, and then can control the main control board CPLD, and disconnect the connection between the first main control board serial port and the CPU serial port of the main control board CPU.
Of course, not all of the above advantages need be achieved in the practice of any one product or method of the present application.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of a serial port connection in the prior art;
FIG. 2 is a schematic diagram of a serial port connection in the prior art;
fig. 3 is a schematic diagram of a serial port connection provided in an embodiment of the present application;
fig. 4 is a flowchart of a connection switching method for a serial port of a main control board according to an embodiment of the present application;
fig. 5 is a schematic diagram of a serial port connection provided in an embodiment of the present application;
fig. 6 is a schematic diagram of a serial port connection provided in an embodiment of the present application;
fig. 7 is a schematic diagram of a serial port connection provided in an embodiment of the present application;
fig. 8 is a schematic diagram of a serial port connection provided in an embodiment of the present application.
Description of the figures
1. Main control board 2 and main control board CPU
3. Main control board CPLD 4, first main control board serial ports
5. Presetting interface 6, network interface
7. Second master control board serial port 8 and first master control board serial port TXD pin
9. RXD pin 10 of serial port of first main control board and serial port of CPU of main control board
11. TXD pin 12 of CPU serial port of main control board and RXD pin of CPU serial port of main control board
13. Line card CPU 14, line card CPU serial port
15. TXD pin 16 of line card CPU serial port and RXD pin of line card CPU serial port
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the prior art, when other boards except for the main control board are debugged, the main control board CPU may receive a debugging instruction for debugging the other boards, which is input by a debugging person, through a serial port of the board of the main control board, and the main control board CPU runs the debugging instruction, which may cause a fault in the running of the main control board CPU, for example, the main control board CPU restarts or the main control board CPU hangs.
In order to solve the above problem, an embodiment of the present application provides a connection switching method for a serial port of a main control board, which may be applied to the main control board, and referring to fig. 3, a main control board 1 includes a main control board CPU2, a main control board CPLD3, a first main control board serial port 4, and a preset interface 5, the main control board CPU2 is connected to the main control board CPLD3, and the preset interface 5 is connected to the main control board CPU 2.
Each connection point in the main control board CPLD3 may be connected to a CPU serial port in the CPU of each board to be debugged. For example, the debugger may connect each connection point to the CPU serial port of the main control board CPU2, the CPU serial port of the line card in the chassis to which the main control board 1 belongs, the CPU serial port of the network card in the chassis to which the main control board 1 belongs, or the CPU serial ports of other devices, respectively, according to the service requirement. The main control board CPLD3 may switch the connection point connected to the connection endpoint of the first main control board serial port 4 according to the control instruction of the main control board CPU2, so that the first main control board serial port 4 may be connected to the CPU serial port in the CPU of each board card to be debugged through the main control board CPLD 3.
Based on the connection switching method of the master control board serial port, the master control board CPU2 may receive a connection switching instruction input by a debugger through the preset interface 5, and then the master control board CPU2 may determine a target CPU serial port connected to the first master control board serial port 4 in the CPU of the target board to be debugged according to the connection switching instruction, and send a control instruction carrying an identifier of the target CPU serial port to the master control board CPLD 3. The CPLD3 of the main control board may switch the connection endpoint of the serial port 4 of the first main control board from the current connection point to the connection point connected to the serial port of the target CPU according to the identifier of the serial port of the target CPU.
When the main control board CPLD3 receives a debugging instruction through the first main control board serial port 4, the main control board CPLD3 may send the debugging instruction to the target CPU serial port, and the target board card to be debugged including the CPU to which the target CPU serial port belongs may receive the debugging instruction.
It can be seen that, if the current first main control board serial port 4 is connected to the CPU serial port of the main control board CPU2 and the board cards except the main control board 1 need to be debugged, the main control board CPU2 may receive the connection switching instruction through the preset interface 5. Because the main control board CPU2 is connected to the main control board CPLD3, the main control board CPU2 can control the main control board CPLD3 to disconnect the first main control board serial port 4 from the CPU serial port of the main control board CPU 2. When a debugging person inputs a debugging instruction to the first main control board serial port 4, the main control board CPU2 does not acquire the debugging instruction, and operation errors of the main control board CPU2 can be avoided to a great extent.
Referring to fig. 4, a flowchart of a connection switching method for a serial port of a main control board according to an embodiment of the present application may be applied to the main control board 1 shown in fig. 3, where the method may include the following steps:
s401: when the main control board CPU2 receives the connection switching instruction through the preset interface 5, the main control board CPU2 determines a target CPU serial port connected to the first main control board serial port 4 in the CPU of the target board to be debugged according to the connection switching instruction, and sends a control instruction carrying an identifier of the target CPU serial port to the main control board CPLD 3.
The control instruction is used for instructing the main control board CPLD3 to switch the connection endpoint of the first main control board serial port 4 from the current connection point to the connection point connected with the target CPU serial port. The connection switching instruction may also carry an identifier of the target CPU serial port. The target CPU serial port can be any CPU serial port in the CPUs of the boards to be debugged. For example, the target CPU serial port may be a CPU serial port of a line card in a chassis to which the main control board 1 belongs, may also be a CPU serial port of a network card in a chassis to which the main control board 1 belongs, and may also be a CPU serial port of the main control board CPU 2.
In the embodiment of the application, when the connection of the serial port needs to be switched, a debugger can input a connection switching instruction to the preset interface 5. The main control board CPU2 may receive the connection switching instruction through the preset interface 5, recognize the connection switching instruction, determine a CPU serial port (i.e., a target CPU serial port) in a target board to be debugged that is to be connected to the first main control board serial port 4 in each board to be debugged, and then, the main control board CPU2 may send a control instruction carrying an identifier of the target CPU serial port to the main control board CPLD3 to instruct the main control board CPLD3 to switch the connection endpoint of the first main control board serial port 4 from the current connection point to the connection point connected to the target CPU serial port.
Because the preset interface 5 is different from the first main control board serial port 4, based on the connection switching method for the main control board serial ports of the embodiment of the present application, the first main control board serial port 4 is not always connected to the CPU serial port of the main control board CPU2, and the main control board CPU2 may receive a connection switching instruction through the preset interface 5, and control the main control board CPLD3 to switch the connection of the serial ports.
The preset interface 5 may be different types of interfaces, and referring to fig. 5, the preset interface 5 may be a network port 6 configured in the main control board.
The network port 6 and the main control board CPU2 can communicate with each other, for example, the network port 6 and the main control board CPU2 can communicate with each other based on Telnet (remote terminal protocol).
In the embodiment, the network port 6 may be connected to the main control board CPU2, and the network port 6 is configured to receive a connection switching instruction.
For example, the debugger can input a connection switching instruction to the main control board CPU2 through the network port 6. The main control board CPU2 may recognize the received connection switching instruction, and may further control the main control board CPLD3 to switch the connection of the serial port.
Alternatively, the preset interface 5 may also be another serial port of the main control board (i.e. a second serial port 7 of the main control board) configured in the main control board 1, see fig. 6.
In the embodiment of the present application, another serial port (i.e., a second main control board serial port 7) different from the first main control board serial port 4 may also be configured in the main control board 1. The second main control board serial port 7 may be connected to the main control board CPU2, and the second main control board serial port 7 is configured to receive a connection switching instruction.
For example, a debugger may input a connection switching instruction to the main control board CPU2 through the second main control board serial port 7, and the main control board CPU2 may recognize the received connection switching instruction, and may further control the main control board CPLD3 to switch the connection of the serial port.
As can be seen from the above, in the embodiment of the present application, the transmission interface for connecting the switching instruction and the transmission interface for debugging instruction are separated, so that the switching instruction and the debugging instruction are not transmitted through the same interface. As can be known from analysis of the prior art, since the connection switching instruction is for switching the connection mode of the main control board 1, the connection switching instruction is identified by the main control board CPU2 and controls the main control board CPLD3 to implement switching, and therefore, if the transmission interface of the connection switching instruction and the transmission interface of the debug instruction are the same interface, the main control board CPU2 is very likely to receive the debug instruction for another board. The embodiment of the application separates the transmission interface for connecting the switching instruction from the transmission interface for debugging the instruction, so that the connecting switching instruction and the debugging instruction are not transmitted through the same interface, and the debugging instruction aiming at other board cards is prevented from being transmitted to the CPU2 of the main control board from the source.
S402: and the CPLD3 switches the connection endpoint of the serial port 4 of the first main control board from the current connection point to the connection point connected with the serial port of the target CPU according to the identification of the serial port of the target CPU.
In the application embodiment, after the main control board CPLD3 receives the control instruction, the main control board CPLD3 may obtain the identifier of the target CPU serial port, and switch the connection endpoint of the first main control board serial port 4 from the current connection point to the connection point connected to the target CPU serial port, so as to connect the first main control board serial port 4 to the target CPU serial port.
Optionally, if the first main control board serial port 4 is connected to the CPU serial port in the CPU of the target board to be debugged through the main control board CPLD3, the current connection point is a connection point connected to the CPU serial port in the CPU of the target board to be debugged.
In the application embodiment, the main control board CPLD3 includes a plurality of connection points, and the connection points are used for connecting with CPU serial ports in the CPU of each board to be debugged.
For example: the main control board CPLD3 includes a connection point for connecting with the CPU serial port in the main control board CPU2, and if the first main control board serial port 4 is currently connected with the target CPU serial port in the main control board CPU2 through the main control board CPLD3, the current connection point is a connection point connected with the target CPU serial port of the main control board CPU 2.
In addition, the serial port may generally include a serial port TXD pin and a serial port RXD pin, and S402 may include the following steps: the main control board CPLD3 connects the serial port TXD pin of the first main control board serial port 4 with the serial port RXD pin of the target CPU serial port according to the identification of the target CPU serial port, and connects the serial port RXD pin of the first main control board serial port 4 with the serial port TXD pin of the target CPU serial port.
In the application embodiment, after the main control board CPLD3 obtains the identifier of the target CPU serial port carried in the control instruction, the main control board CPLD3 may connect the serial port TXD pin of the first main control board serial port 4 with the serial port RXD pin of the target CPU serial port, and connect the serial port RXD pin of the first main control board serial port 4 with the serial port TXD pin of the target CPU serial port, so as to connect the first main control board serial port 4 with the target CPU serial port.
In this step, the main control board CPLD3 may also disconnect the serial TXD pin of the first main control board serial port 4 from the serial RXD pin of the currently connected CPU serial port, and disconnect the serial RXD pin of the first main control board serial port 4 from the serial TXD pin of the currently connected CPU serial port, so as to disconnect the connection between the first main control board serial port 4 and the currently connected CPU serial port.
The serial port TXD pin of the first main control board serial port 4 may be used to receive a debugging instruction, and the serial port RXD pin of the first main control board serial port 4 may be used to output debugging result data returned by the currently connected CPU serial port. For example, a debugging person may input a debugging instruction to the CPU serial port of the main control board CPU2 currently connected to the first main control board serial port 4 through the serial port TXD pin of the first main control board serial port 4, the main control board CPU2 may receive the debugging instruction through the serial port RXD pin of the CPU serial port of the main control board CPU2, and run the debugging instruction, then, the main control board CPU2 may return debugging result data to the serial port RXD pin of the first main control board serial port 4 through the serial port TXD pin of the CPU serial port of the main control board CPU2, and the debugging person may obtain the debugging result data through the serial port RXD pin of the first main control board serial port 4.
It can be seen that in the embodiment of the present application, the line between the first main control board serial port 4 and the main control board CPU2 is changed from the always connected connection in the prior art to the optional connection. Subsequently, when the debugging instruction is transmitted to other boards through the first main control board serial port 4, the main control board CPU2 controls the main control board CPLD3 to disconnect the lines between the first main control board serial port 4 and the main control board CPU2, so that the debugging instruction for other boards can be prevented from being transmitted to the main control board CPU2 on the transmission route.
S403: when the main control board CPLD3 receives the debugging instruction through the first main control board serial port 4, the main control board CPLD3 sends the debugging instruction to the target CPU serial port, so that the target board to be debugged including the CPU to which the target CPU serial port belongs receives the debugging instruction.
In the embodiment of the application, when a debugger needs to debug a target board to be debugged including a CPU to which a target CPU serial port belongs, the debugger can input a debugging instruction to the first main control board serial port 4. Correspondingly, the main control board CPLD3 may receive the debug instruction through the first main control board serial port 4, and since the current first main control board serial port 4 is connected to the target CPU serial port, the main control board CPLD3 may send the debug instruction to the target CPU serial port, that is, the target board to be debugged may receive the debug instruction and run the debug instruction, thereby implementing debugging of the target board to be debugged.
As can be seen from the above, in the embodiment of the present application, the transmission interface for connecting the switching instruction and the transmission interface for debugging instruction are separated, so that the switching instruction and the debugging instruction are not transmitted through the same interface. As can be known from analysis of the prior art, since the connection switching instruction is for switching the connection mode of the main control board 1, the connection switching instruction is identified by the main control board CPU2 and controls the main control board CPLD3 to implement switching, and therefore, if the transmission interface of the connection switching instruction and the transmission interface of the debug instruction are the same interface, the main control board CPU2 is very likely to receive the debug instruction for another board. The embodiment of the application separates the transmission interface for connecting the switching instruction from the transmission interface for debugging the instruction, so that the connecting switching instruction and the debugging instruction are not transmitted through the same interface, and the debugging instruction aiming at other board cards is prevented from being transmitted to the CPU2 of the main control board from the source.
Further, in the embodiment of the present application, the line between the serial port 4 of the first main control board and the CPU2 of the main control board is changed from the always connected state in the prior art to an optional connection state. Subsequently, when the debugging instruction is transmitted to other boards through the first main control board serial port 4, the main control board CPU2 controls the main control board CPLD3 to disconnect the lines between the first main control board serial port 4 and the main control board CPU2, so that the debugging instruction for other boards can be prevented from being transmitted to the main control board CPU2 on the transmission route.
In summary, according to the embodiment of the present application, the main control board CPU2 can control the main control board CPLD3 to implement switching of the serial port connection mode, and when a debug instruction is sent to the CPUs of other boards except the main control board CPU2, a transmission line of the debug instruction does not pass through the main control board CPU2, so that the main control board CPU2 can be prevented from receiving the debug instruction for the CPUs of other boards.
Referring to fig. 7, the first master board serial port 4 may include a serial port TXD pin (which may be referred to as a first master board serial port TXD pin 8) and a serial port RXD pin (which may be referred to as a first master board serial port RXD pin 9). The main control board CPU2 is configured with a CPU serial port (which may be referred to as a main control board CPU serial port 10), and the main control board CPU serial port 10 may include a serial port TXD pin (which may be referred to as a main control board CPU serial port TXD pin 11) and a serial port RXD pin (which may be referred to as a main control board CPU serial port RXD pin 12).
Generally, the default state after the chassis to which the main control board 1 belongs is powered on may be that the first main control board serial port 4 is connected to the main control board CPU serial port 10, that is, in fig. 7, the first main control board serial port TXD pin 8 is connected to the main control board CPU serial port RXD pin 12, and the first main control board serial port RXD pin 9 is connected to the main control board CPU serial port TXD pin 11.
In addition, a line card may be further configured in the chassis, a line card CPU13 is configured in the line card, a CPU serial port (which may be referred to as a line card CPU serial port 14) is configured in the line card CPU13, and the line card CPU serial port 14 may include a serial port TXD pin (which may be referred to as a line card CPU serial port TXD pin 15) and a serial port RXD pin (which may be referred to as a line card CPU serial port RXD pin 16).
Based on fig. 7, when the line card needs to be debugged, a debugger may input a connection switching instruction carrying an identifier of the line card CPU serial port 14 to the main control board CPU2 through the preset interface 5. After receiving the connection switching instruction, the main control board CPU2 may determine that the target CPU serial port is the line card CPU serial port 14, and send a control instruction carrying the identifier of the line card CPU serial port 14 to the main control board CPLD 3.
When the main control board CPLD3 receives the control instruction, the main control board CPLD3 may obtain the identifier of the line card CPU serial port 14. The main control board CPLD3 may disconnect the first main control board serial TXD pin 8 from the main control board CPU serial RXD pin 12 and disconnect the first main control board serial RXD pin 9 from the main control board CPU serial TXD pin 11.
Then, the main control board CPLD3 may connect the first main control board serial port TXD pin 8 with the line card CPU serial port RXD pin 16, and connect the first main control board serial port RXD pin 9 with the line card CPU serial port TXD pin 15, resulting in the connection diagram shown in fig. 8.
Based on the connection of the serial ports shown in fig. 8, a debugging person can input a debugging instruction through the TXD pin 8 of the first main control board serial port, after the main control board CPLD3 receives the debugging instruction, the main control board CPLD3 can send the debugging instruction to the line card CPU13 through the RXD pin 16 of the line card CPU serial port, and a line card including the line card CPU13 can receive and run the debugging instruction, so that the debugging of the line card is realized.
It can be understood that, if the connection of the current serial port is as shown in fig. 8, if the debugger needs to debug the main control board 1, the debugger may input a connection switching instruction carrying the identifier of the serial port 10 of the main control board CPU to the main control board CPU2 through the preset interface 5. After receiving the connection switching instruction, the main control board CPU2 may determine that the target CPU serial port is the main control board CPU serial port 10, and send a control instruction carrying an identifier of the main control board CPU serial port 10 to the main control board CPLD 3.
When the CPLD3 receives the control instruction, the CPLD3 may obtain the identifier of the CPU serial port 10 of the main control board. The master control board CPLD3 may disconnect the first master control board serial port TXD pin 8 from the line card CPU serial port RXD pin 16 and disconnect the first master control board serial port RXD pin 9 from the line card CPU serial port TXD pin 15.
Then, the main control board CPLD3 may connect the first main control board serial port TXD pin 8 with the main control board CPU serial port RXD pin 12, and connect the first main control board serial port RXD pin 9 with the main control board CPU serial port TXD pin 11, thereby obtaining the connection diagram shown in fig. 7.
As can be seen from the above, according to the connection switching method for the serial ports of the main control board provided in the embodiment of the present application, when the main control board CPU2 receives a connection switching instruction through the preset interface receiver 5, the main control board CPU2 determines, according to the connection switching instruction, a target CPU serial port connected to the first main control board serial port 4 in the CPU of the target board to be debugged, and sends a control instruction carrying the identifier of the target CPU serial port to the main control board CPLD 3. The main control board CPLD3 switches the connection end point of the first main control board serial port 4 from the current connection point to the connection point connected to the target CPU serial port according to the identifier of the target CPU serial port, and when the main control board CPLD3 receives a debugging instruction through the first main control board serial port 4, the main control board CPLD3 sends the debugging instruction to the target CPU serial port, and the target board card to be debugged including the CPU to which the target CPU serial port belongs can receive the debugging instruction. That is, if the current first main control board serial port 4 is connected to the CPU serial port of the main control board CPU2 and the board cards except the main control board 1 need to be debugged, the main control board CPU2 may receive the connection switching instruction through the preset interface 5, and then may control the main control board CPLD3 to disconnect the connection between the first main control board serial port 4 and the CPU serial port of the main control board CPU2, accordingly, the main control board CPU2 may not receive the debugging instruction received by the main control board CPLD3 through the first main control board serial port 4, and operation errors of the main control board CPU2 may be avoided to a great extent.
The embodiment of the present application further provides a main control board, please refer to fig. 3 again, the main control board 1 includes a main control board CPU2, a main control board CPLD3, a first main control board serial port 4 and a preset interface 5, the first main control board serial port 4 can be connected to the CPU serial port in the CPU of each board card to be debugged through a main control board CPLD3, the main control board CPU2 is connected to the main control board CPLD3, and the preset interface 5 is connected to the main control board CPU2, wherein:
the main control board CPU2 is configured to, when receiving a connection switching instruction through the preset interface 5, determine a target CPU serial port connected to the first main control board serial port 4 in the CPU of the target board to be debugged according to the connection switching instruction, and send a control instruction carrying an identifier of the target CPU serial port to the main control board CPLD3, where the control instruction is used to instruct the main control board CPLD3 to switch a connection endpoint of the first main control board serial port 4 from a current connection point to a connection point connected to the target CPU serial port;
the main control board CPLD3 is used for switching the connection endpoint of the serial port 4 of the first main control board from the current connection point to the connection point connected with the serial port of the target CPU according to the identification of the serial port of the target CPU;
the main control board CPLD3 is further configured to send the debugging instruction to the target CPU serial port when the debugging instruction is received through the first main control board serial port 4, so that the target board to be debugged including the CPU to which the target CPU serial port belongs receives the debugging instruction.
Optionally, if the first main control board serial port 4 is connected to the CPU serial port in the CPU of the target board to be debugged through the main control board CPLD3, the current connection point is a connection point connected to the CPU serial port in the CPU of the target board to be debugged.
Optionally, referring to fig. 7 and 8 again, the main control board CPLD3 is specifically configured to connect the serial port data transmission TXD pin of the first main control board serial port 4 (i.e., the first main control board serial port TXD pin 8) with the serial port data reception RXD pin of the target CPU serial port, and connect the serial port RXD pin of the first main control board serial port (i.e., the first main control board serial port RXD pin 9) with the serial port TXD pin of the target CPU serial port according to the identifier of the target CPU serial port.
Optionally, referring to fig. 5 again, the preset interface 5 is a network port 6 configured in the main control board 1.
Optionally, referring to fig. 6 again, the preset interface 5 is a second main control board serial port 7 configured in the main control board 1.
As can be seen from the above, when the main control board CPU2 receives the connection switching instruction through the preset interface receiver 5, the main control board CPU2 determines a target CPU serial port connected to the first main control board serial port 4 in the CPU of the target board to be debugged according to the connection switching instruction, and sends a control instruction carrying an identifier of the target CPU serial port to the main control board CPLD 3; the CPLD3 switches the connection end point of the serial port 4 of the first main control board from the current connection point to the connection point connected with the serial port of the target CPU according to the identification of the serial port of the target CPU; when the main control board CPLD3 receives the debugging instruction through the first main control board serial port 4, the main control board CPLD3 sends the debugging instruction to the target CPU serial port, and the target board card to be debugged including the CPU to which the target CPU serial port belongs can receive the debugging instruction. That is, if the current first main control board serial port 4 is connected to the CPU serial port of the main control board CPU2 and the board cards except the main control board 1 need to be debugged, the main control board CPU2 may receive the connection switching instruction through the preset interface 5, and then may control the main control board CPLD3 to disconnect the connection between the first main control board serial port 4 and the CPU serial port of the main control board CPU2, accordingly, the main control board CPU2 may not receive the debugging instruction received by the main control board CPLD3 through the first main control board serial port 4, and operation errors of the main control board CPU2 may be avoided to a great extent.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, cause the processes or functions described in accordance with the embodiments of the application to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, from one website site, computer, server, or data center to another website site, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk (SSD)), among others.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
All the embodiments in the present specification are described in a related manner, and the same and similar parts among the embodiments may be referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the embodiment of the main control board, since it is basically similar to the embodiment of the method, the description is simple, and for the relevant points, refer to the partial description of the embodiment of the method.
The above description is only for the preferred embodiment of the present application, and is not intended to limit the scope of the present application. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application are included in the protection scope of the present application.

Claims (10)

1. A method for switching connection of serial ports of a main control board is characterized in that the method is applied to the main control board, the main control board comprises a main control board Central Processing Unit (CPU), a main control board Complex Programmable Logic Device (CPLD), a first main control board serial port and a preset interface, the first main control board serial port can be connected with the CPU serial port in the CPU of each board card to be debugged through the main control board CPLD, the main control board CPU is connected with the main control board CPLD, and the preset interface is connected with the main control board CPU, the method comprises the following steps:
when the main control board CPU receives a connection switching instruction through the preset interface, the main control board CPU determines a target CPU serial port connected with the first main control board serial port in a CPU of a target board to be debugged according to the connection switching instruction, and sends a control instruction carrying an identifier of the target CPU serial port to the main control board CPLD, wherein the control instruction is used for instructing the main control board CPLD to switch a connection endpoint of the first main control board serial port from a current connection point to a connection point connected with the target CPU serial port;
the main control board CPLD switches the connection endpoint of the serial port of the first main control board from the current connection point to the connection point connected with the serial port of the target CPU according to the identification of the serial port of the target CPU;
when the main control board CPLD receives a debugging instruction through the first main control board serial port, the main control board CPLD sends the debugging instruction to the target CPU serial port, so that a target board card to be debugged, including the CPU to which the target CPU serial port belongs, receives the debugging instruction.
2. The method according to claim 1, wherein if the first master control board serial port is connected to the CPU serial port in the CPU of the target board to be debugged through the master control board CPLD, the current connection point is a connection point connected to the CPU serial port in the CPU of the target board to be debugged.
3. The method according to claim 1 or 2, wherein the switching, by the CPLD, the connection endpoint of the first master control board serial port from the current connection point to the connection point connected to the target CPU serial port according to the identifier of the target CPU serial port includes:
and the main control board CPLD connects a serial port data sending TXD pin of the first main control board serial port with a serial port data receiving RXD pin of the target CPU serial port according to the identification of the target CPU serial port, and connects the serial port RXD pin of the first main control board serial port with the serial port TXD pin of the target CPU serial port.
4. The method according to claim 1, wherein the predetermined interface is a network port configured in the main control board.
5. The method according to claim 1, wherein the preset interface is a second serial port of the main control board.
6. The main control board is characterized by comprising a main control board Central Processing Unit (CPU), a main control board Complex Programmable Logic Device (CPLD), a first main control board serial port and a preset interface, wherein the first main control board serial port can be connected with the CPU serial port in the CPU of each board card to be debugged through the main control board CPLD, the main control board CPU is connected with the main control board CPLD, and the preset interface is connected with the main control board CPU, wherein:
the main control board CPU is used for determining a target CPU serial port connected with the first main control board serial port in the CPU of a target board to be debugged according to a connection switching instruction when the connection switching instruction is received through the preset interface, and sending a control instruction carrying an identifier of the target CPU serial port to the main control board CPLD, wherein the control instruction is used for instructing the main control board CPLD to switch a connection endpoint of the first main control board serial port from a current connection point to a connection point connected with the target CPU serial port;
the main control board CPLD is used for switching the connection endpoint of the serial port of the first main control board from the current connection point to the connection point connected with the serial port of the target CPU according to the identification of the serial port of the target CPU;
and the main control board CPLD is also used for sending the debugging instruction to the target CPU serial port when the debugging instruction is received through the first main control board serial port, so that the target board card to be debugged, including the CPU to which the target CPU serial port belongs, receives the debugging instruction.
7. The main control board according to claim 6, wherein if the first main control board serial port is connected to the CPU serial port in the CPU of the target board to be debugged through the main control board CPLD, the current connection point is a connection point connected to the CPU serial port in the CPU of the target board to be debugged.
8. The main control board according to claim 6 or 7, wherein the main control board CPLD is specifically configured to connect, according to the identifier of the target CPU serial port, a serial port data transmission TXD pin of the first main control board serial port with a serial port data reception RXD pin of the target CPU serial port, and connect the serial port RXD pin of the first main control board serial port with the serial port TXD pin of the target CPU serial port.
9. The main control board according to claim 6, wherein the predetermined interface is a network port configured in the main control board.
10. The main control board according to claim 6, wherein the preset interface is a second main control board serial port configured in the main control board.
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