CN109872636A - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN109872636A CN109872636A CN201910253048.6A CN201910253048A CN109872636A CN 109872636 A CN109872636 A CN 109872636A CN 201910253048 A CN201910253048 A CN 201910253048A CN 109872636 A CN109872636 A CN 109872636A
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Abstract
The invention discloses a kind of display panel and display devices, it is related to field of display technology, it include: viewing area and non-display area, non-display area includes multiple shift register groups, and shift register group includes the cascaded shift registers group positioned at the first shift register group of the first second non-display area and positioned at the first first non-display area;First shift register group includes multiple cascade first shift registers, and cascaded shift registers group includes multiple cascade cascaded shift registers;The driving signal output end of first shift register is electrically connected with the first pixel unit row, and transmits driving signal to the first pixel unit row;First shift register group and cascaded shift registers group cascade;In a second direction, width of the width of cascaded shift registers less than the first shift register.In this manner, being conducive to reduce the width of the first first non-display area in a second direction, the narrow frame design of display panel is realized, and then be conducive to promote product screen accounting.
Description
Technical field
The present invention relates to field of display technology, more particularly, to a kind of display panel and display device.
Background technique
With the development of science and technology, the purposes of the display device with display panel is more and more extensive, so that people couple
The requirement of display panel is more and more diversified, is no longer only satisfied with the performance of the routine such as large scale, fine definition of display panel
Index also has more diversified requirement to the shape of display panel, therefore special-shaped display panel occurs.
The appearance of display panel breaches the limitation of display panel single rectangular structure, not only makes display effect more
Diversification, and make the application approach of display panel also more and more extensive, it has been successfully applied to such as wrist-watch, glasses or intelligence
In the wearable Electronic Design of energy bracelet etc.Compared to convention display, the main distinction of special-shaped display screen is that it is aobvious
Show that non-rectangle special shape is presented in region.
When non-rectangle special shape is presented in display area, how to realize that the narrow frame design of non-display area becomes
Current one of the technical problems that are urgent to solve.
Summary of the invention
In view of this, the present invention provides a kind of display panel and display devices, and in a second direction, cascaded shift registers
Width less than the first shift register width, to be conducive to reduce the first first non-display area width in a second direction,
It realizes the narrow frame design of display panel, and then is conducive to promote product screen accounting.
In a first aspect, the application provides a kind of display panel, comprising:
Viewing area and non-display area around the viewing area;The viewing area includes the first viewing area and the second display
Area, along first direction, second viewing area and first viewing area are adjacent;The non-display area includes the first non-display area
With the second non-display area, in a second direction, the viewing area be located at first non-display area and second non-display area it
Between, the first direction and second direction intersection;
First non-display area includes being recessed that form the first first non-aobvious towards the viewing area along the second direction
Show area, second non-display area includes the second first non-display area being oppositely arranged with the first first non-display area;Described
One non-display area further includes the first second non-display area, and along the second direction, the first second non-display area is aobvious with described first
Show that area is adjacent;
Multiple pixel unit rows are arranged along the first direction and are extended along the second direction, the pixel unit row
Including being located at the first pixel unit row of first viewing area and positioned at the second pixel unit row of second viewing area;
The non-display area includes multiple shift register groups, and the shift register group includes non-positioned at first second
First shift register group of viewing area and cascaded shift registers group positioned at the first first non-display area;Described first moves
Bit register group includes multiple cascade first shift registers, and the cascaded shift registers group includes multiple cascade cascades
Shift register;The driving signal output end of first shift register is electrically connected with the first pixel unit row, and to
The first pixel unit row transmits driving signal;The first shift register group and the cascaded shift registers group grade
Connection;
Along the second direction, the width of the cascaded shift registers is less than the width of first shift register.
Second aspect, based on the same inventive concept, the application also provide a kind of display device, including display panel, this is aobvious
Show that panel is display panel provided herein.
Compared with prior art, display panel provided by the invention and display device at least realize following beneficial effect
Fruit:
In display panel and display device provided herein, the first non-display area includes being recessed to be formed towards viewing area
The first first non-display area and the first second non-display area adjacent with the first first non-display area along first direction, first displacement post
Storage group is located in the first second non-display area, and cascaded shift registers group is located in the first first non-display area, in particular, along second
The width in direction, the cascaded shift registers in cascaded shift registers group is posted less than the first displacement in the first shift register group
The width of storage, is designed in this way, and reduces cascaded shift registers occupied space in the first first non-display area, thus has
Conducive to realizing the first first non-display area border width in a second direction, and then be conducive to be promoted display panel and display device
Shield accounting.
Certainly, implementing any of the products of the present invention specific needs while must not reach all the above technical effect.
By referring to the drawings to the detailed description of exemplary embodiment of the present invention, other feature of the invention and its
Advantage will become apparent.
Detailed description of the invention
It is combined in the description and the attached drawing for constituting part of specification shows the embodiment of the present invention, and even
With its explanation together principle for explaining the present invention.
Fig. 1 show a kind of top view of display panel provided by the embodiment of the present application;
Fig. 2 show a kind of relative position relation figure of the transposition of partial register group in the first non-display area;
Fig. 3 show another top view of display panel provided by the embodiment of the present application;
Fig. 4 show another top view of display panel provided by the embodiment of the present application;
Fig. 5 show a kind of structural schematic diagram of shift register in display panel provided by the embodiment of the present application;
Fig. 6 show a kind of AA ' sectional view of display panel provided by Fig. 1 embodiment;
Fig. 7 show orthographic projection of the output transistor on underlay substrate in display panel provided by the embodiment of the present application
A kind of structural schematic diagram;
Fig. 7 shown in Fig. 8 show display panel cascade transistor provided by the embodiment of the present application on underlay substrate
Orthographic projection a kind of structural schematic diagram;
Fig. 9 show in display panel provided by the embodiment of the present application the first metal layer and electricity in the first shift register
Hold a kind of top view of metal layer;
Figure 10 show in display panel cascade shift register provided by the embodiment of the present application the first metal layer with
A kind of top view of capacitance metal layer;
Figure 11 show another top view of display panel provided by the embodiment of the present application;
Figure 12 show a kind of structure chart of display device provided by the embodiment of the present application.
Specific embodiment
Carry out the various exemplary embodiments of detailed description of the present invention now with reference to attached drawing.It should also be noted that unless in addition having
Body explanation, the unlimited system of component and the positioned opposite of step, numerical expression and the numerical value otherwise illustrated in these embodiments is originally
The range of invention.
Be to the description only actually of at least one exemplary embodiment below it is illustrative, never as to the present invention
And its application or any restrictions used.
Technology, method and apparatus known to person of ordinary skill in the relevant may be not discussed in detail, but suitable
In the case of, the technology, method and apparatus should be considered as part of specification.
It is shown here and discuss all examples in, any occurrence should be construed as merely illustratively, without
It is as limitation.Therefore, other examples of exemplary embodiment can have different values.
It should also be noted that similar label and letter indicate similar terms in following attached drawing, therefore, once a certain Xiang Yi
It is defined in a attached drawing, then in subsequent attached drawing does not need that it is further discussed.
In the prior art, the appearance of display panel breaches the limitation of display panel single rectangular structure, not only makes
Display effect is more diversified, and makes the application approach of display panel also more and more extensive, has been successfully applied to such as
In the wearable Electronic Design of wrist-watch, glasses or Intelligent bracelet etc.Compared to convention display, special-shaped display screen it is main
Difference is that non-rectangle special shape is presented in its display area.When non-rectangle special shape is presented in display area, how
The narrow frame design that can be realized non-display area becomes current one of the technical problems that are urgent to solve.
In view of this, the present invention provides a kind of display panel and display devices, and in a second direction, cascaded shift registers
Width less than the first shift register width, to be conducive to reduce the first first non-display area width in a second direction,
It realizes the narrow frame design of display panel, and then is conducive to promote product screen accounting.
It is described in detail below with reference to the drawings and specific embodiments.
Fig. 1 show a kind of top view of display panel provided by the embodiment of the present application, and Fig. 2 show non-positioned at first
A kind of relative position relation figure of transposition of partial register group in viewing area, referring to Figure 1 and Fig. 2, the embodiment of the present application institute
A kind of display panel 100 provided, comprising:
Viewing area 102 and non-display area 103 around viewing area 102;Viewing area 102 includes the first viewing area 11 and second
Viewing area 12, along first direction, the second viewing area 12 and the first viewing area 11 are adjacent;Non-display area 103 includes first non-display
Area 31 and the second non-display area 32, in a second direction, viewing area between the first non-display area 31 and the second non-display area 32,
First direction and second direction intersection;
First non-display area 31 includes the first first non-display area to be formed that is recessed along the second direction towards viewing area
311, the second non-display area 32 includes the second first non-display area 321 being oppositely arranged with the first first non-display area 311;First is non-aobvious
Show that area 31 further includes the first second non-display area 312, in a second direction, the first second non-display area 312 is adjacent with the first viewing area 11;
Multiple pixel unit rows are arranged along first direction and are extended in a second direction, and pixel unit row includes being located at first
First pixel unit row 21 of viewing area 11 and the second pixel unit row 22 positioned at the second viewing area 12;
Non-display area includes multiple shift register groups, and shift register group includes being located at the first second non-display area 312
First shift register group 61 and cascaded shift registers group 50 positioned at the first first non-display area 311;First shift register
Group 61 includes multiple cascade first shift registers 41, and cascaded shift registers group 50 includes that multiple cascade cascaded shifts are posted
Storage 51;The driving signal output end of first shift register 41 is electrically connected with the first pixel unit row 21, and to the first pixel
Cell row 21 transmits driving signal;First shift register group 61 is cascaded with cascaded shift registers group 50;
In a second direction, width W22 of the width W11 of cascaded shift registers 51 less than the first shift register 41.
Specifically, continuing with referring to Fig. 1 and Fig. 2, in display panel 100 provided by the embodiment of the present application, first is non-aobvious
Show that area 31 includes the first first non-display area 311 formed along the first direction towards viewing area sunken inside and along second party
To the first second non-display area 312 adjacent with the first viewing area 11, wherein be provided with cascade in the first first non-display area 311
Shift register group 50 is provided with the first shift register group 61 in the first second non-display area 312, first shift register
The driving signal output end of group 61 is electrically connected with the first pixel unit row 21 in the first viewing area 11, to the first pixel unit row
21 transmission driving signals;First shift register group 61 is cascaded with cascaded shift registers group 50, and cascaded shift registers 51 are sent out
The effect for having waved shift signal transmission, for example, being located at cascaded shift registers group 50 along first direction under visual angle shown in Fig. 2
In first shift register group 61 of upside, shift signal output end OUT1 and the shift signal of cascaded shift registers 51 are defeated
Enter IN is held to connect, exports shift signal to cascaded shift registers group 50;The shift signal of cascaded shift registers group 50 exports
OUT2 is held, is electrically connected with the first shift register group 61 on the downside of it is located at along first direction, to the first shift register group
61 output shift signals.In particular, in a second direction, the width W11 of cascaded shift registers 51 is less than the first shift register
41 width W22 is so conducive to save the space shared in the first first non-display area 311 of cascaded shift registers 51, from
And be conducive to reduce the width of the first first non-display area 311 in a second direction, it is corresponding to be advantageously implemented the first first non-display area 311
The narrow frame design of position, and then be conducive to be promoted the screen accounting of display panel 100.In addition, when in the first first non-display area 311
In the first displacement when being not provided with cascaded shift registers 51, under visual angle shown in Fig. 1, positioned at about 12 two sides of the second viewing area
It will be directly electrically connected by shift signal line between register group 50, when the first pixel unit row 21 in the first viewing area 11 is adopted
When being driven with bilateral driving, the shift register positioned at 22 right side of the second pixel unit row to the second pixel unit row 22,
The shift signal of second pixel unit row, 22 two sides will be asynchronous, this will make the first picture for being located at 12 lower section of the second viewing area
Two received the driving signal of plain cell row 21 is asynchronous, so as to cause being difficult to carry out normally the first pixel unit row 21
Driving;And after being provided with cascaded shift registers 51 in the first first non-display area 311 in the application, it can normally play displacement
The function of signal transmission, and the shift signal of the shift register of 22 two sides of the second pixel unit row can also be made to keep same
Step so enables to two received the driving signal for being located at the first pixel unit row 21 of 12 lower section of the second viewing area
It is synchronous, to be conducive to be promoted reliable, the synchronous driving of each first pixel unit row in display panel.
It should be noted that it includes a first first non-display area that embodiment illustrated in fig. 1, which illustrates only display panel 100,
311 situation, in addition to such situation, in some other embodiments provided herein, display panel 100 may also include two
The first a or more first non-display area 311, and the shape and size of the first first non-display area 311 can also be according to practical feelings
Condition is flexibly set, and the application is to this without specifically limiting.In addition, Fig. 1 again illustrates only pixel unit row and gate driving list
A kind of relative positional relationship of member, does not represent actual quantity and size, and sub-pixel included in pixel unit row
To schematically illustrate, actual quantity and size are not represented yet.
Optionally, under visual angle shown in Fig. 1, which illustrates only the first first non-display area 311 and is located at display panel
A kind of situation of 100 left side edge intermediate regions, the i.e. display panel 100 are including second viewing area 12 and along first direction
Positioned at two the first viewing areas 11 of 12 two sides of the second viewing area, in some other embodiments of the application, the first first is non-
Viewing area 311 may be additionally located at the corner location of display panel 100, such as refer to Fig. 3, and Fig. 3 show the embodiment of the present application institute
Another top view of the display panel 100 of offer, under visual angle shown in Fig. 3, the first first non-display area 311 is located at display panel
100 upper left position only includes first viewing area 11 and along first direction and the first viewing area 11 in display panel 100
Adjacent second viewing area 12.Certainly, under the visual angle shown in Fig. 1 and Fig. 3, the first first non-display area 311 is respectively positioned on display
The right side edge position of panel 100, in some other embodiment of the application, the first first non-display area 311 may be additionally located at aobvious
Show the right side edge of panel 100, such as refer to Fig. 4, the application is to this without specifically limiting, wherein Fig. 4 show this Shen
Please display panel 100 provided by embodiment another top view.
Optionally, display panel 100 provided by the embodiment of the present application includes the gate driving circuit positioned at non-display area,
Shift register in shift register group is the minimum repetitive unit in gate driving circuit;
Fig. 5 show a kind of structural schematic diagram of shift register in display panel 100 provided by the embodiment of the present application,
Refer to Fig. 5, shift register includes that control unit 60, output transistor 40, shift signal input terminal IN1, driving signal are defeated
Outlet OUT0 and shift signal output end OUT3;
The first input end of control unit 60 is made as shift signal input terminal IN1, the first output end of control unit 60
For shift signal output end OUT3, the second output terminal of control unit 60 is electrically connected with output transistor, output transistor 40
Output end is as driving signal output end OUT0.
It should be noted that Fig. 5 illustrates only an input terminal (i.e. shift signal input terminal IN1) for shift register
Situation, in fact, each shift register includes multiple input terminals, such as there are also clock signal input terminal etc., Fig. 5 is only to the application
The input terminal that may be related to is illustrated, and does not represent the quantity of shift register actual signal terminal.Shift LD
Device receives shift signal by shift signal input terminal IN1, so that the pixel unit row of corresponding output transistor to connection is defeated
Driving signal out.It should be noted that Fig. 5 illustrates only a kind of structure of shift register, it include two in the shift register
A output transistor 40, in some embodiments, two output transistors 40 can transmit driving signal to pixel unit row jointly,
Certainly, in some other embodiments of the application, shift register may also comprise an output transistor or three and with
Upper each output transistor, the application is to this without specifically limiting.It should be noted that it is above-mentioned shown in the first shift register and
Cascaded shift registers all have the structure of above-mentioned shift register;And the area of the first shift register and cascaded shift registers
Other point is: the first shift register is with shift register structure in the prior art as function, that is to say, that first moves
Bit register can not only normal driving pixel light emission, additionally it is possible to transmit the cascade function that cascade signal realizes shift register;
The decrease resulted in function and width of the cascaded shift registers in structure size narrows, relative to the first shift register
For, cascade effect functionally may be implemented, but pixel can not even be driven by weakening to the luminous power of pixel driver.
Optionally, incorporated by reference to Fig. 5, the first shift register 41 in embodiment illustrated in fig. 2 includes the first output transistor,
Cascaded shift registers 51 include cascaded-output transistor, and along second direction, the width of cascaded-output transistor is less than first
The width of output transistor.
It specifically, must be less than the width of the first output transistor by the width design of cascaded-output transistor in a second direction
When, the width of cascaded shift registers 51 in a second direction can be reduced, so that in a second direction, cascaded shift registers 51 are whole
The arrangement in internal portion is more compact, so that width of the width of cascaded shift registers 51 less than the first shift register 41
Degree, thus the space of the first first non-display area 311 in a second direction where being conducive to saving cascaded shift registers 51, favorably
In the non-display narrow frame design of the first first of realization, and then be conducive to be promoted the screen accounting of display panel 100.
Optionally, Fig. 6 show a kind of AA ' sectional view of display panel 100 provided by Fig. 1 embodiment, and Fig. 7 is shown
A kind of knot of orthographic projection of the output transistor 411 on underlay substrate 101 in display panel 100 provided by the embodiment of the present application
Structure schematic diagram, Fig. 8 show display panel cascade transistor 412 provided by the embodiment of the present application on underlay substrate just
A kind of structural schematic diagram of projection, refers to Fig. 6-Fig. 8, which includes underlay substrate 101 and be arranged in substrate base
Polysilicon layer 90, the first metal layer 91 and second metal layer 92 on plate 101, the output transistor 40 in Fig. 5 include being located at the
The grid 94 of one metal layer 91 and positioned at second metal layer 92 source electrode 95 and drain electrode 96, grid 94 is being served as a contrast with polysilicon layer 90
The orthographic projection of 101 place plane of substrate forms overlapping region;
Along second direction, the width of the overlapping region 81 of the first output transistor 411 is W1, cascaded-output transistor
The width of 412 overlapping region 83 is W2, wherein W2 < W1.
Specifically, incorporated by reference to Fig. 6-Fig. 8, in display panel 100 provided by the embodiment of the present application, the first output transistor
411 and cascaded-output transistor 412 in grid formed with polysilicon layer 90 in the orthographic projection of 101 place plane of underlay substrate it is overlapping
Region, along second direction, when the width W1 of the overlapping region 81 of the first output transistor 411 is less than cascaded-output transistor
When the width W2 of 412 overlapping region 83, enable to the width of cascaded-output transistor 412 in a second direction defeated less than first
The width of transistor 411 in a second direction out, the first first being equally beneficial for where saving cascaded shift registers 51 are non-display
The space of area 311 in a second direction is advantageously implemented the non-display narrow frame design of the first first, and then is conducive to promote display surface
The screen accounting of plate 100.It should be noted that above-mentioned overlapping region refers to the corresponding area of channel width-over-length ratio conventional in transistor
Domain.
Optionally, the breadth length ratio of the first output transistor is A1, and the breadth length ratio of cascaded-output transistor is A2, A2 < A1.
Specifically, the driving capability of the breadth length ratio of output transistor and output transistor to pixel unit row connected to it
Proportional, breadth length ratio is bigger, and the driving capability of output transistor is bigger.In view of the first first non-display area 311 is along first
Direction is formed towards viewing area inner recess, and the quantity that this allows for sub-pixel included in the second pixel unit row 22 is small
The quantity of the sub-pixel included in the first pixel unit row 21, therefore, the corresponding required driving of the second pixel unit row 22
Ability is by less than driving capability needed for the first pixel unit row 21, therefore, even if the breadth length ratio A2 of cascaded-output transistor is small
When the breadth length ratio A1 of the first output transistor, the influence to the driving capability of the second pixel unit row 22 is also smaller.In addition, working as
When A2 < A1, so that overall dimensions of the overall dimensions of cascaded-output transistor less than the first output transistor, in a second direction,
The width of cascaded-output transistor less than the first output transistor width, therefore be equally beneficial for save cascaded shift registers
The space of the first first non-display area 311 in a second direction where 51, in the driving for not influencing the pixel column to corresponding driving
Under the premise of ability, it is advantageously implemented the non-display narrow frame design of the first first, and then is conducive to be promoted the screen of display panel 100
Accounting.It should be noted that when the breadth length ratio A2 of cascaded-output transistor it is small to a certain extent when, driving capability subtracts significantly
It is weak, may be without the corresponding pixel unit row output drive signal of normal direction, but the cascade function of cascaded-output transistor is unaffected,
It remains to normally transmit shift signal.
Optionally, Fig. 7 and Fig. 8 are referred to, along a first direction, the length of the overlapping region 81 of the first output transistor is
L1, the length of the overlapping region 81 of cascaded-output transistor are L2,
A1=W1/L1, A2=W2/L2, wherein 100 μm≤W1≤200 μm, 3 μm≤L1≤4 μm;6 μm≤W2≤15 μm,
3μm≤L2≤4μm。
In this way, the corresponding length L2 of overlapping region 81 of cascaded shift registers 51 is posted with the first displacement along first direction
The corresponding length L1 of overlapping region 81 of storage 41 is close;But in a second direction, the corresponding crossover region of cascaded shift registers 51
The width in domain 81 is equivalent to compared with the first shift register 41 by 100 μm to 200 μm of width, is reduced into 6 μm to 15 μm
The size of width, reduced width is larger, largely reduce so in a second direction cascaded shift registers 51
Shared space in one first non-display area 311, to be more conducive to reducing the side of the first first non-display area 311 in a second direction
Width of frame is more advantageous to the narrow frame design for realizing the first first non-display area 311.It is posted in addition, retaining cascaded shift in the application
Cascaded-output transistor in storage 51, also will not influence the shift function of cascade transistor.
Optionally, it is shown in display panel 100 provided by the embodiment of the present application incorporated by reference to Fig. 6, Fig. 9 and Figure 10, Fig. 9
A kind of top view of the first metal layer 91 and capacitance metal layer 93 in first shift register 41, Figure 10 show the application implementation
A kind of top view of the first metal layer 91 and capacitance metal layer 93 in display panel cascade shift register 51 provided by example,
Shift register includes storage capacitance C, and storage capacitance C includes two pole plates being oppositely arranged, and two pole plates are in underlay substrate 101
The orthographic projection of place plane forms crossover region;Storage capacitance includes the first storage capacitance C1 in the first shift register 41
With the second storage capacitance C2 being located in cascaded shift registers 51;
Along second direction, the width of the crossover region 82 of the first storage capacitance C1 is M1, and the second storage capacitance C2's is overlapping
The width in area 84 is M2, wherein M2 < M1.
Specifically, it continuing with referring to Fig. 6, Fig. 9 and Figure 10, in display panel 100 provided by the embodiment of the present application, also wraps
Include the capacitance metal layer 93 between the first metal layer 91 and second metal layer 92, capacitance metal layer 93 and the first metal layer 91
It is overlapping in the orthographic projection of 101 place plane of underlay substrate, storage capacitance is formed, two pole plates for forming storage capacitance are distinguished herein
Positioned at the first metal layer 91 and capacitance metal layer 93.As M2 < M1, be conducive to reduce the second storage capacitance C2 in a second direction
Width, that is, be conducive to reduce the occupied space in the first first non-display area 311 the second storage capacitance C2, be equally beneficial for
Reduce cascaded shift registers 51 in a second direction in the occupied space of the first first non-display area 311, thus is equally beneficial for
It realizes the narrow frame design of the first first non-display area 311, promotes the screen accounting of display panel 100.
It should be noted that in some embodiments of the present application, in a second direction in reduction cascaded-output transistor
While width, it can also reduce in cascade transistor the second storage capacitance in the occupied space of the first first non-display area 311, from
And be conducive to the border width for largely reducing the first first non-display area 311, it is more advantageous to and promotes display panel 100
Shield accounting.
Optionally, the another of display panel 100 provided by the embodiment of the present application is shown continuing with referring to Figure 11, Figure 11
Kind of top view, referring to Figure 11, in display panel 100 provided by the embodiment of the present application, the second non-display area 32 further includes the
Diethyl non-display area 322, in a second direction, the second second non-display area 322 are adjacent with the first viewing area 11;Shift register group
It further include that the second shift register group positioned at the second first non-display area 321 and the third positioned at the second second non-display area 322 are moved
Bit register group, the second shift register group include multiple cascade second shift registers 42, third shift register group packet
Include multiple cascade third shift registers 43;
The driving signal output end of second shift register 42 is electrically connected with the second pixel unit row 22, to the second pixel list
First row 22 transmits driving signal;The driving signal output end of third shift register 43 is electrically connected with the first pixel unit row 21,
To 21 output drive signal of the first pixel unit row.
Specifically, referring to Figure 11, the first pixel unit row 21 in the first viewing area 11 respectively with the first shift LD
Device 41 and third shift register 43 are electrically connected, and the first shift register 41 and third shift register 43 are respectively to the first pixel
Cell row 21 transmits driving signal, i.e., drives by the way of bilateral driving to the first pixel unit row 21, such driving
Mode is conducive to enhance the driving capability to the first pixel unit row 21.Meanwhile second shift register 42 and the second pixel list
First row 22 is electrically connected, and transmits driving signal to the second pixel unit row 22, to realize the driving to the second pixel unit row 22.
Optionally, continuing with referring to Figure 11, in display panel 100 provided by the embodiment of the present application, cascaded shift deposit
Device 51 includes cascaded-output transistor, and the second shift register 42 includes the second output transistor, along second direction, is cascaded defeated
The width of small second output transistor of the width of transistor out.
Specifically, by the width design of cascaded-output transistor less than second output transistor width when, save
Cascaded-output transistor occupied space in the first first non-display area 311 can make the first first non-display area 311 along
The width in two directions less than the second first non-display area 321 width, to be advantageously implemented the narrow side of the first first non-display area 311
Frame design.
Optionally, in embodiment illustrated in fig. 11, the breadth length ratio of cascaded-output transistor is A2, the width of the second output transistor
Long ratio is A3, A2 < A3.
As previously mentioned, the breadth length ratio of output transistor and its driving capability are proportional, as A2 < A3, are reducing
While cascaded-output transistor space shared in the first first non-display area 311, cascaded-output transistor is also reduced
Fan-out capability.But since the fan-out capability of the second output transistor is greater than the fan-out capability of cascaded-output transistor, in addition second
The quantity of the sub-pixel that pixel unit row 22 is included reduces, can be to the using stronger second output transistor of driving capability
Two pixel unit rows 22 carry out normal driving, thus will not influence the normal display function of the second viewing area 12.
Optionally, continuing with referring to Figure 11, in display panel 100 provided by the embodiment of the present application, the second shift LD
Device 42 is electrically connected with the second pixel unit row 22 one-to-one correspondence, and the quantity of cascaded shift registers 51 and the second shift register
42 quantity is identical.
Specifically, in display panel 100 provided by the embodiment of the present application, the first first non-display area 311 and the second first are non-
Viewing area 321 is respectively arranged at the two sides of the second viewing area 12 in a second direction, and it is non-that cascaded shift registers 51 are located at the first first
In viewing area 311, the second shift register 42 is located in the second first non-display area 321, the second shift register 42 and the second picture
Plain cell row 22 corresponds electrical connection, sets when by the quantity of cascaded shift registers 51 and the quantity of the second shift register 42
When being set to identical, enable to the first non-display area 31 synchronous with the shift signal in the second non-display area 32, i.e., so that being located at
While the cascaded shift registers 51 of afterbody send shift signal to the first shift register 41 connected to it, it is located at
Second shift register 42 of afterbody is also to the transmission shift signal of third shift register 43 is connected thereto, so that edge
The first shift register 41 and third shift register 43 that second direction is located at 11 two sides of the first viewing area are simultaneously to same the
One pixel unit row 21 is driven.
Optionally, in display panel 100 provided by the embodiment of the present application, the driving signal of cascaded shift registers 51 is defeated
Outlet does not send driving signal to the second pixel unit row 22.
Specifically, when the span design of cascaded shift registers 51 in a second direction is obtained smaller by the application, make its driving
Reduced capability, in this way, the mode that unilateral driving can be used in the second pixel unit row 22 in the second viewing area 12 is driven, i.e.,
The second pixel unit row 22 is driven merely with the second shift register, equally can be realized driving function, so that second
Viewing area 12 is normally shown.
Optionally, in display panel 100 provided by the embodiment of the present application, shift register includes multiple transistors, the
The quantity of transistor included in one shift register 41 is N1, number of transistors included in cascaded shift registers 51
For N2, wherein N2 < N1.
Specifically, in general, will include multiple transistors in shift register, guaranteeing that cascaded shift registers 51 can be just
Under the premise of often sending shift signal, the application can be reduced the quantity of transistor included in cascaded shift registers 51,
When the quantity of transistor in cascaded shift registers 51 is reduced, cascaded shift registers can be equally reduced to a certain extent
51 size saves the occupied space in the first first non-display area 311 in a second direction of cascaded shift registers 51, thus
It is equally beneficial for realizing the narrow frame design of the first first non-display area 311.
Based on the same inventive concept, the application also provides a kind of display device, and 2, Figure 12 show the application referring to Figure 1
A kind of structure chart of display device provided by embodiment, the display device 200 include display panel 100, which is
Display panel 100 provided by any of the above-described embodiment of the application.It should be noted that display provided by the embodiment of the present application
The embodiment of device 200 can be found in the embodiment of above-mentioned display panel, and overlaps will not be repeated.Display provided herein
Device can be with are as follows: mobile phone, tablet computer, television set, display, laptop, Digital Frame, navigator etc. be any have it is aobvious
Show the products or components of function.
Optionally, referring to Figure 12, it further include camera 401 in display device 200 provided by the embodiment of the present application
And/or optical sensor 402;Optical sensor 402 can be with light sensing, and converts optical signal into electric signal, such as can
To be fingerprint Identification sensor.
Through the foregoing embodiment it is found that display panel provided by the invention and display device, at least realizing following has
Beneficial effect:
In display panel and display device provided herein, the first non-display area includes being recessed to be formed towards viewing area
The first first non-display area and the first second non-display area adjacent with the first first non-display area along first direction, first displacement post
Storage group is located in the first second non-display area, and cascaded shift registers group is located in the first first non-display area, in particular, along second
The width in direction, the cascaded shift registers in cascaded shift registers group is posted less than the first displacement in the first shift register group
The width of storage, is designed in this way, and reduces cascaded shift registers occupied space in the first first non-display area, thus has
Conducive to realizing the first first non-display area border width in a second direction, and then be conducive to be promoted display panel and display device
Shield accounting.
Although some specific embodiments of the invention are described in detail by example, the skill of this field
Art personnel it should be understood that example above merely to being illustrated, the range being not intended to be limiting of the invention.The skill of this field
Art personnel are it should be understood that can without departing from the scope and spirit of the present invention modify to above embodiments.This hair
Bright range is defined by the following claims.
Claims (14)
1. a kind of display panel characterized by comprising
Viewing area and non-display area around the viewing area;The viewing area includes the first viewing area and the second viewing area, edge
First direction, second viewing area and first viewing area are adjacent;The non-display area includes the first non-display area and the
Two non-display areas, in a second direction, the viewing area is between first non-display area and second non-display area, institute
State first direction and second direction intersection;
First non-display area includes that the first first to be formed that is recessed along the second direction towards the viewing area is non-display
Area, second non-display area include the second first non-display area being oppositely arranged with the first first non-display area;Described first
Non-display area further includes the first second non-display area, along the second direction, the first second non-display area and first display
Area is adjacent;
Multiple pixel unit rows are arranged along the first direction and are extended along the second direction, and the pixel unit row includes
The first pixel unit row positioned at first viewing area and the second pixel unit row positioned at second viewing area;
The non-display area includes multiple shift register groups, and the shift register group includes non-display positioned at first second
The first shift register group in area and cascaded shift registers group positioned at the first first non-display area;First displacement is posted
Storage group includes multiple cascade first shift registers, and the cascaded shift registers group includes multiple cascade cascaded shifts
Register;The driving signal output end of first shift register is electrically connected with the first pixel unit row, and to described
First pixel unit row transmits driving signal;The first shift register group and the cascaded shift registers group cascade;
Along the second direction, the width of the cascaded shift registers is less than the width of first shift register.
2. display panel according to claim 1, which is characterized in that the display panel includes being located at the non-display area
Gate driving circuit, it is single that the shift register in the shift register group is that minimum in the gate driving circuit repeats
Member;
The shift register includes control unit, output transistor, shift signal input terminal, driving signal output end and displacement
Signal output end;
The first input end of described control unit is made as the shift signal input terminal, the first output end of described control unit
For the shift signal output end, the second output terminal of described control unit is electrically connected with the output transistor, the output
The output end of transistor is as the driving signal output end.
3. display panel according to claim 2, which is characterized in that first shift register includes that the first output is brilliant
Body pipe, the cascaded shift registers include cascaded-output transistor, along the second direction, the cascaded-output transistor
Width be less than first output transistor width.
4. display panel according to claim 3, which is characterized in that the display panel includes that underlay substrate and setting exist
Polysilicon layer, the first metal layer and second metal layer on the underlay substrate, the output transistor include being located at described the
The grid of one metal layer and source electrode and drain electrode positioned at the second metal layer, the grid is with the polysilicon layer described
The orthographic projection of plane forms overlapping region where underlay substrate;
Along the second direction, the width of the overlapping region of first output transistor is W1, the cascaded-output
The width of the overlapping region of transistor is W2, wherein W2 < W1.
5. display panel according to claim 4, the breadth length ratio of first output transistor is A1, the cascaded-output
The breadth length ratio of transistor is A2, A2 < A1.
6. display panel according to claim 5, which is characterized in that
Along the first direction, the length of the overlapping region of first output transistor is L1, the cascaded-output
The length of the overlapping region of transistor is L2,
A1=W1/L1, A2=W2/L2, wherein 100 μm≤W1≤200 μm, 3 μm≤L1≤4 μm;6 μm≤W2≤15 μm, 3 μm
≤L2≤4μm。
7. display panel according to claim 2, which is characterized in that the shift register includes storage capacitance, described
Storage capacitance includes two pole plates being oppositely arranged, and the orthographic projection of two pole plate planes where underlay substrate forms crossover region;
The storage capacitance includes the first storage capacitance in the first shift register and is located in the cascaded shift registers
The second storage capacitance;
Along the second direction, the width of the crossover region of first storage capacitance is M1, second storage capacitance
The crossover region width be M2, wherein M2 < M1.
8. display panel according to claim 2, which is characterized in that second non-display area further includes that the second second is non-aobvious
Show area, in this second direction, the second second non-display area is adjacent with first viewing area;The shift register group
It further include the third positioned at the second shift register group of the second first non-display area and positioned at the second second non-display area
Shift register group, the second shift register group include multiple cascade second shift registers, and the third displacement is posted
Storage group includes multiple cascade third shift registers;
The driving signal output end of second shift register is electrically connected with the second pixel unit row, the second picture of Xiang Suoshu
Plain cell row transmits driving signal;The driving signal output end of the third shift register and the first pixel unit row electricity
Connection, Xiang Suoshu the first pixel unit row output drive signal.
9. display panel according to claim 8, which is characterized in that the cascaded shift registers include cascaded-output crystalline substance
Body pipe, second shift register includes the second output transistor, along the second direction, the cascaded-output transistor
Small second output transistor of width width.
10. display panel according to claim 9, which is characterized in that the breadth length ratio of the cascaded-output transistor is A2,
The breadth length ratio of second output transistor is A3, A2 < A3.
11. display panel according to claim 8, which is characterized in that second shift register and second picture
Plain cell row corresponds electrical connection, and the quantity phase of the quantity of the cascaded shift registers and second shift register
Together.
12. display panel according to claim 2, which is characterized in that the driving signal of the cascaded shift registers is defeated
Outlet does not send driving signal to the second pixel unit row.
13. display panel according to claim 2, which is characterized in that the shift register includes multiple transistors, institute
The quantity for stating transistor included in the first shift register is N1, transistor included in the cascaded shift registers
Quantity is N2, wherein N2 < N1.
14. a kind of display device, which is characterized in that any display panel including claim 1 to 13.
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