CN109871293A - The data recovery method and storage system of memory - Google Patents
The data recovery method and storage system of memory Download PDFInfo
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- CN109871293A CN109871293A CN201811628932.5A CN201811628932A CN109871293A CN 109871293 A CN109871293 A CN 109871293A CN 201811628932 A CN201811628932 A CN 201811628932A CN 109871293 A CN109871293 A CN 109871293A
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- 238000000034 method Methods 0.000 title claims abstract description 18
- 238000011084 recovery Methods 0.000 title claims abstract description 15
- 238000001514 detection method Methods 0.000 claims description 48
- 238000000151 deposition Methods 0.000 claims description 2
- 230000007257 malfunction Effects 0.000 abstract 1
- 230000006870 function Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 1
- 238000004321 preservation Methods 0.000 description 1
Abstract
The invention discloses a kind of data recovery method of memory and storage systems, are related to technical field of integrated circuits.The data recovery method of the memory includes: the address for being successively read memory data；It detects the memory data of current address and exports detecting state；Judge the detecting state of output for alarm condition or correct status；If the detecting state of output is alarm condition, then record the corresponding memory data of the alarm condition and the current address of the memory data, and the memory data of record is re-write in current address, then re-read current address and its corresponding memory data；If the detecting state of output is correct status, the memory data for continuing to read next address is detected；Until completion is detected in the address of data all in the memory.Technical solution of the present invention is by re-writing the data to malfunction in memory and its corresponding address in memory, to achieve the purpose that repair memory data.
Description
Technical field
The present invention relates to technical field of integrated circuits, data recovery method and memory system more particularly to memory
System.
Background technique
MTP memory is a kind of nonvolatile memory that can repeatedly program, but actually its data stored can be with
The passage of time slowly lose data.It can generally be corrected by increasing ECC (Error Correcting Code) function
The data read out, to achieve the purpose that read correct data.But there is no really repair memory institute for ECC function
The data of preservation, only modified data read out, when the loss of data that memory is saved is to certain degree, ECC
Function just again can not correction data.So we need timely to repair the data in memory, prevent from can not correcting
Mistake.
Summary of the invention
The main purpose of the present invention is to provide a kind of data recovery method of memory and storage systems, it is intended in time
Repair the data information that there is mistake in memory.
To achieve the above object, the present invention provides a kind of data recovery method of memory, comprising the following steps:
It is successively read the address of memory data；
It detects the memory data of current address and exports detecting state；
Judge the detecting state of output for alarm condition or correct status；
If the detecting state of output is alarm condition, the corresponding memory data of the alarm condition and the storage are recorded
The current address of device data, and the memory data of record is re-write in current address, then re-read current address and
It corresponds to memory data and is detected；If the detecting state of output is correct status, continue to read next address
Memory data detected；
Until completion is detected in the address of data all in the memory.
Preferably, if the detecting state of output is correct status, continue the memory number for reading next address
According to being detected further include:
Judge whether current address is FA final address in memory data, if current address be in memory data conclusively
Location then terminates to detect；If current address is not the FA final address in storage address, continue the storage for reading next address
Device data are detected, until completion is detected in the address of data all in the memory.
Preferably, the memory data of current address is detected by detection module, the detection module is band error in data
The ECC detection module of detection.
Preferably, the detecting state further includes error condition.
Preferably, when detecting state is correct status, judge that current address memory data is correct, then continue under reading
The memory data of one address is detected；
When detecting state is alarm condition, judge that current address memory data is wrong, but by ECC detection module school
Just, output data is correct, then records the corresponding memory data of the alarm condition and the current address of the memory data, and
The memory data of record is re-write in the current address of memory, then re-reads current address and its corresponding memory
Data are detected；
When detecting state is error condition, judge that current address memory data is wrong, and can not be by the ECC detection module
Correction, output data mistake simultaneously terminate current detection.
The present invention also provides a kind of storage system, the system comprises:
Memory, for storing data and the corresponding address of the data；
Detection module, for detecting the memory data of current address and exporting detecting state；
Control module, for being successively read the address of memory data, receiving the detecting state of detection module output and being judged as
Alarm condition or correct status record the corresponding storage of the alarm condition if the detecting state of output is alarm condition
The current address of device data and the memory data, and the memory data of record is re-write in current address, then is weighed
New reading current address and its corresponding memory data are detected；If the detecting state of output is correct status, after
It resumes studies and the memory data of next address is taken to be detected.
Preferably, the control module further includes judging submodule, for judging detecting state for alarm condition or correct
Whether state and the address for judging current storage data are FA final address in memory data, if current address is to deposit
FA final address in memory data then terminates to detect, if current address is not the FA final address in storage address, after resuming studies
The memory data of next address is taken to be detected, until completion is detected in the address of data all in the memory.
Preferably, the detection module is the ECC detection module with data error detection.
Preferably, the judging submodule further include: judge whether current detected state is error condition.
Preferably, when detecting state is correct status, the judging submodule is judging current address memory data just
Really, the memory data that the control module continues to read next address is detected；
When detecting state is alarm condition, the judging submodule judges that current address memory data is wrong, but by institute
The correction of ECC detection module is stated, output data is correct；The control module record the corresponding memory data of the alarm condition and
The current address of the memory data, and the memory data of record is re-write in the current address of memory, then again
It reads current address and its corresponding memory data is detected；
When detecting state is error condition, judge that current address memory data is wrong, and can not be by the ECC detection module
Correction, output data mistake simultaneously terminate current detection.
Technical solution of the present invention detects it with the presence or absence of alarm condition, if depositing by reading memory data and its address
In alarm condition, then by the error and the data being repaired and its corresponding address re-write in memory, repaired with reaching
The purpose of multiple memory data.
Detailed description of the invention
Fig. 1 is the flow diagram of the data recovery method of memory of the present invention；
Fig. 2 is storage system schematic illustration of the present invention.
The embodiments will be further described with reference to the accompanying drawings for the realization, the function and the advantages of the object of the present invention.
Specific embodiment
It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, it is not intended to limit the present invention.
The following further describes the present invention with reference to the drawings.
The embodiment of the present invention provides a kind of data recovery method of memory, and the data suitable for chip application process are repaired
It is multiple, as shown in Figure 1, method includes the following steps:
It is successively read the address of memory data；
It detects the memory data of current address and exports detecting state；
Judge the detecting state of output for alarm condition or correct status；
If the detecting state of output is alarm condition, the corresponding memory data of the alarm condition and the storage are recorded
The current address of device data, and the memory data of record is re-write in current address, then re-read current address and
It corresponds to memory data and is detected；If the detecting state of output is correct status, continue to read next address
Memory data detected；
Until completion is detected in the address of data all in the memory.
Preferably, if the detecting state of output is correct status, continue the memory number for reading next address
According to being detected further include:
Judge whether current address is FA final address in memory data, if current address be in memory data conclusively
Location then terminates to detect；If current address is not the FA final address in storage address, continue the storage for reading next address
Device data are detected, until completion is detected in the address of data all in the memory.
Preferably, the memory data of current address is detected by detection module, the detection module is band error in data
The ECC detection module of detection.
Preferably, the detecting state further includes error condition.
Preferably, when detecting state is correct status, judge that current address memory data is correct, then continue under reading
The memory data of one address is detected；
When detecting state is alarm condition, judge that current address memory data is wrong, but by ECC detection module school
Just, output data is correct, then records the corresponding memory data of the alarm condition and the current address of the memory data, and
The memory data of record is re-write in the current address of memory, then re-reads current address and its corresponding memory
Data are detected；
When detecting state is error condition, judge that current address memory data is wrong, and can not be by the ECC detection module
Correction, output data mistake simultaneously terminate current detection.
In a particular embodiment, as shown in Figure 1, since the first address of the data of memory, it is successively read memory number
According to and its corresponding address, detection judge the detecting states of the corresponding data in current address.
When detecting state is correct status, judge whether current address is FA final address, if FA final address then terminates
Epicycle detection, after being spaced preset time, then since memory first address successively detects memory data；If current address is not
Current address is then added one to continue to test by FA final address.
When detecting state is alarm condition, current storage data and the current address of the memory data are recorded,
And the memory data of record is re-write in the current address of memory, then re-read current address and its corresponding storage
Device data are detected.
When detecting state be error condition when, judge that current address memory data is wrong, and can not repair data, output
Error in data terminates current detection.Storage system use data recovery method of the invention, timely repair data, substantially
It is not in error condition.
The present invention also provides a kind of storage systems, as shown in Fig. 2, the system comprises:
Memory, for storing data and the corresponding address of the data；
Detection module, for detecting the memory data of current address and exporting detecting state；
Control module, for being successively read the address of memory data, receiving the detecting state of detection module output and being judged as
Alarm condition or correct status record the corresponding storage of the alarm condition if the detecting state of output is alarm condition
The current address of device data and the memory data, and the memory data of record is re-write in current address, then is weighed
New reading current address and its corresponding memory data are detected；If the detecting state of output is correct status, after
It resumes studies and the memory data of next address is taken to be detected.
Preferably, the control module further includes judging submodule, for judging detecting state for alarm condition or correct
Whether state and the address for judging current storage data are FA final address in memory data, if current address is to deposit
FA final address in memory data then terminates to detect, if current address is not the FA final address in storage address, after resuming studies
The memory data of next address is taken to be detected, until completion is detected in the address of data all in the memory.
Preferably, the detection module is the ECC detection module with data error detection.
Preferably, the judging submodule further include: judge whether current detected state is error condition.
Preferably, when detecting state is correct status, the judging submodule is judging current address memory data just
Really, the memory data that the control module continues to read next address is detected；
When detecting state is alarm condition, the judging submodule judges that current address memory data is wrong, but by institute
The correction of ECC detection module is stated, output data is correct；The control module record the corresponding memory data of the alarm condition and
The current address of the memory data, and the memory data of record is re-write in the current address of memory, then again
It reads current address and its corresponding memory data is detected；
When detecting state is error condition, judge that current address memory data is wrong, and can not be by the ECC detection module
Correction, output data mistake simultaneously terminate current detection.
It should be understood that the above is only a preferred embodiment of the present invention, the scope of the patents of the invention cannot be therefore limited, it is all
Using equivalent structure or equivalent flow shift made by description of the invention and accompanying drawing content, it is applied directly or indirectly in it
His relevant technical field, is included within the scope of the present invention.
Claims (10)
1. a kind of data recovery method of memory, which comprises the following steps:
It is successively read the address of memory data；
It detects the memory data of current address and exports detecting state；
Judge the detecting state of output for alarm condition or correct status；
If the detecting state of output is alarm condition, the corresponding memory data of the alarm condition and the storage are recorded
The current address of device data, and the memory data of record is re-write in current address, then re-read current address and
It corresponds to memory data and is detected；If the detecting state of output is correct status, continue to read next address
Memory data detected；
Until completion is detected in the address of data all in the memory.
2. the data recovery method of memory according to claim 1, which is characterized in that if the detecting state of output
For correct status, then the memory data for continuing to read next address is detected further include:
Judge whether current address is FA final address in memory data, if current address be in memory data conclusively
Location then terminates to detect；If current address is not the FA final address in storage address, continue the storage for reading next address
Device data are detected, until completion is detected in the address of data all in the memory.
3. the data recovery method of memory according to claim 2, which is characterized in that detected by detection module current
The memory data of address, the detection module are the ECC detection module with data error detection.
4. the data recovery method of memory according to claim 3, which is characterized in that the detecting state further includes mistake
Accidentally state.
5. the data recovery method of memory according to claim 3, which is characterized in that when detecting state is correct status
When, judge that current address memory data is correct, then the memory data for continuing to read next address is detected；
When detecting state is alarm condition, judge that current address memory data is wrong, but by ECC detection module school
Just, output data is correct, then records the corresponding memory data of the alarm condition and the current address of the memory data, and
The memory data of record is re-write in the current address of memory, then re-reads current address and its corresponding memory
Data are detected；
When detecting state is error condition, judge that current address memory data is wrong, and can not be by the ECC detection module
Correction, output data mistake simultaneously terminate current detection.
6. a kind of storage system, which is characterized in that the system comprises:
Memory, for storing data and the corresponding address of the data；
Detection module, for detecting the memory data of current address and exporting detecting state；
Control module, for being successively read the address of memory data, receiving the detecting state of detection module output and being judged as
Alarm condition or correct status record the corresponding storage of the alarm condition if the detecting state of output is alarm condition
The current address of device data and the memory data, and the memory data of record is re-write in current address, then is weighed
New reading current address and its corresponding memory data are detected；If the detecting state of output is correct status, after
It resumes studies and the memory data of next address is taken to be detected.
7. storage system according to claim 6, which is characterized in that the control module further includes judging submodule,
For judging that detecting state is alarm condition or correct status and judges whether the address of current storage data is memory
FA final address in data terminates to detect if current address is the FA final address in memory data, if current address is not
FA final address in storage address, then the memory data for continuing to read next address is detected, until depositing described
Completion is detected in the address of all data in reservoir.
8. storage system according to claim 7, which is characterized in that the detection module is with data error detection
ECC detection module.
9. storage system according to claim 8, which is characterized in that the judging submodule further include: judgement is current
Whether detecting state is error condition.
10. storage system according to claim 9, which is characterized in that described to sentence when detecting state is correct status
Disconnected submodule judges that current address memory data is correct, and the control module continues to read the memory data of next address
It is detected；
When detecting state is alarm condition, the judging submodule judges that current address memory data is wrong, but by institute
The correction of ECC detection module is stated, output data is correct；The control module record the corresponding memory data of the alarm condition and
The current address of the memory data, and the memory data of record is re-write in the current address of memory, then again
It reads current address and its corresponding memory data is detected；
When detecting state is error condition, judge that current address memory data is wrong, and can not be by the ECC detection module
Correction, output data mistake simultaneously terminate current detection.
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| CN201811628932.5A CN109871293A (en) | 2018-12-29 | 2018-12-29 | The data recovery method and storage system of memory |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102084430A (en) * | 2008-07-02 | 2011-06-01 | 美光科技公司 | Method and apparatus for repairing high capacity/high bandwidth memory devices |
| US20120159286A1 (en) * | 2010-12-17 | 2012-06-21 | Sony Corporation | Data transmission device, memory control device, and memory system |
| CN108376554A (en) * | 2017-01-31 | 2018-08-07 | 爱思开海力士有限公司 | Memory module including its storage system and its error correcting method |
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2018
- 2018-12-29 CN CN201811628932.5A patent/CN109871293A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102084430A (en) * | 2008-07-02 | 2011-06-01 | 美光科技公司 | Method and apparatus for repairing high capacity/high bandwidth memory devices |
| US20120159286A1 (en) * | 2010-12-17 | 2012-06-21 | Sony Corporation | Data transmission device, memory control device, and memory system |
| CN102568603A (en) * | 2010-12-17 | 2012-07-11 | 索尼公司 | Data transmission device, memory control device, and memory system |
| CN108376554A (en) * | 2017-01-31 | 2018-08-07 | 爱思开海力士有限公司 | Memory module including its storage system and its error correcting method |
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Application publication date: 20190611 |