CN109860026A - Prepare the method, array substrate, display panel of polysilicon membrane - Google Patents

Prepare the method, array substrate, display panel of polysilicon membrane Download PDF

Info

Publication number
CN109860026A
CN109860026A CN201910110957.4A CN201910110957A CN109860026A CN 109860026 A CN109860026 A CN 109860026A CN 201910110957 A CN201910110957 A CN 201910110957A CN 109860026 A CN109860026 A CN 109860026A
Authority
CN
China
Prior art keywords
polysilicon
photoresist
substrate
layer
preformed layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201910110957.4A
Other languages
Chinese (zh)
Other versions
CN109860026B (en
Inventor
陈琳
马涛
唐新阳
杨成绍
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Hefei Xinsheng Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN201910110957.4A priority Critical patent/CN109860026B/en
Publication of CN109860026A publication Critical patent/CN109860026A/en
Application granted granted Critical
Publication of CN109860026B publication Critical patent/CN109860026B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Thin Film Transistor (AREA)

Abstract

The invention discloses the methods, array substrate, display panel that prepare polysilicon membrane.Specifically, the invention proposes a kind of methods for preparing polysilicon membrane, comprising: provide substrate;Polysilicon preformed layer is formed over the substrate, and the surface of the polysilicon preformed layer has multiple protrusions;Photoresist layer is formed far from the side of the substrate in the polysilicon preformed layer;First ashing processing is carried out to the photoresist layer, part photoresist layer is removed, to expose the multiple protrusion;Second ashing processing is carried out to the multiple protrusion, removes the multiple protrusion;The remaining photoresist layer is removed, to form the polysilicon membrane.This method can easily remove the protrusion of the prefabricated layer surface of polysilicon as a result, keep the profile pattern of polysilicon membrane higher, improve the service performance of polysilicon membrane.

Description

Prepare the method, array substrate, display panel of polysilicon membrane
Technical field
The present invention relates to field of polysilicon technology, and in particular, to prepares the method for polysilicon membrane, array substrate, shows Show panel.
Background technique
With the development of display technology, liquid crystal display (LCD) and organic light emitting display (OLED) be widely Applied in daily life, such as mobile phone screen, laptop computer display screen, desktop computer display screen and flat panel TV.Above-mentioned In display device, thin film transistor (TFT) (TFT) is typically used as switch element to control pixel, or drives picture as driving element Element.Thin film transistor (TFT) is commonly divided into two kinds of amorphous silicon (a-Si) and polysilicon (p-Si) according to silicon thin film property, with amorphous silicon Thin film transistor (TFT) is compared, and polycrystalline SiTFT has higher electron mobility, more preferably liquid crystal characteristic and lower leakage Electric current, therefore, polysilicon membrane technology, especially low temperature polycrystalline silicon (LTPS) technology have become the heat of thin film transistor (TFT) research and development Point.
In current polycrystalline silicon preparing process, the crystallization of polysilicon is always the emphasis studied.Excimer-Laser Crystallization (ELC) technology is widely used in the crystallization of amorphous silicon with its higher electron mobility and product yield etc..For example, often at present Microlens array technology (Micro Lens Array, MLA, one kind of Excimer-Laser Crystallization), i.e., it is micro- by multiple groups Mirror superposition, generates the laser of high-energy density, and melting occurs at a high temperature of moment for the amorphous silicon (a-Si) being irradiated with a laser again Crystallization, by thin-film transistor channel region by amorphous silicon (a-Si) crystallization be polysilicon (p-Si).Microlens array technology (MLA) system Standby polysilicon (p-Si) film has many advantages, such as that high-resolution, reaction speed be fast, high brightness, high aperture.
However, the current method, array substrate and display panel for preparing polysilicon membrane, still has much room for improvement.
Summary of the invention
The present invention be based on inventor couple on the fact that and problem discovery and understanding make:
Inventors have found that low-temperature polysilicon film transistor prepared by current technique exists, back channel interface is sensitive, closes The problems such as state electric current is difficult to control.For inventor by further investigation and many experiments discovery, this is by more in thin film transistor (TFT) Caused by surface irregularity of back channel that polycrystal silicon film is formed etc..Amorphous silicon (a-Si) is passed through into Excimer-Laser Crystallization at present (ELC) when technology crystallization is polysilicon (p-Si), especially using microlens array (MLA) technology by amorphous silicon (a-Si) crystallization When for polysilicon (p-Si), pulse number, burst length, base reservoir temperature, excimer laser wavelength and frequency all affect crystal grain Size, homogeneity and the flatness on the surface polysilicon (p-Si), it is desirable to take into account suitable crystallite dimension, preferable homogeneity and Requirement of the more smooth polysilicon surface (p-Si) to the homogeneity and stability of technology and equipment is very high.In polysilicon (p- Si during grain boundary) is formed, the silicon of grain boundaries melting is easy to be squeezed and project upwards, and forms small protrusion (Small Protrusions), the small protrusion of formation will affect the interface performance of back channel and influence the film crystal formed The off-state current (Ioff) of pipe when being applied to the thin film transistor (TFT) in display device, be easy to cause electric signal transmission abnormal, into And it is bad to cause display device that the display such as crosstalk (crosstalk) occurs.Therefore, if can propose a kind of new to prepare polysilicon The method of film can reduce the small protrusion for even being eliminated polysilicon membrane surface, the back channel for forming polysilicon membrane Profile pattern is preferable, will largely improve the service performance of prepared polysilicon membrane, will be in very great Cheng It solves the above problems on degree.
The present invention is directed to alleviate or solve the problems, such as at least one in above-mentioned refer at least to some extent.
In one aspect of the invention, the invention proposes a kind of methods for preparing polysilicon membrane.It is according to the present invention Embodiment, this method comprises: providing substrate;Polysilicon preformed layer, the table of the polysilicon preformed layer are formed over the substrate Face has multiple protrusions;Photoresist layer is formed far from the side of the substrate in the polysilicon preformed layer;To the photoresist Layer carries out the first ashing processing, part photoresist layer is removed, to expose the multiple protrusion;The multiple protrusion is carried out Second ashing processing, removes the multiple protrusion;The remaining photoresist layer is removed, to form the polysilicon membrane. This method can easily remove the protrusion of the prefabricated layer surface of polysilicon as a result, keep the profile pattern of polysilicon membrane higher, Improve the service performance of polysilicon membrane.
According to an embodiment of the invention, the polysilicon preformed layer is formed in the part of the surface of the substrate, described more Crystal silicon preformed layer coats photoresist far from the side of the substrate, polysilicon preformed layer described in the photoresist overlay and not by The substrate of the polysilicon preformed layer covering, controls the thickness of the photoresist of coating, to enable the photoresist separate The surface of the one side of substrate is plane;Development is exposed to the photoresist using intermediate tone mask version, in the photoetching Glue and polysilicon preformed layer corresponding position form pit, to form the photoresist layer.Pass through the intermediate tone mask as a result, Version can simply and accurately control the thickness for being formed in the photoresist layer of multiple protrusion tops, convenient for subsequently through plasma Ashing processing removes the photoresist of multiple convex surfaces, and can damage to avoid plasma to the structure in substrate, Further improve the service performance of prepared polysilicon membrane.
According to an embodiment of the invention, the polysilicon preformed layer is formed in the part of the surface of the substrate, described more Crystal silicon preformed layer coats photoresist far from the side of the substrate, polysilicon preformed layer described in the photoresist overlay and not by The substrate of the polysilicon preformed layer covering, and exposure curing is carried out, to form the photoresist layer, control coating The photoresist thickness, to enable the thickness of the photoresist layer everywhere uniform.This method can be simply forming photoresist as a result, Layer.
According to an embodiment of the invention, the thickness of the photoresist is not less than 1 μm.The thickness of photoresist is above-mentioned as a result, When range, the mobility of photoresist is preferable, convenient for forming the uniform photoresist of thickness in polysilicon preformed layer and substrate surface Layer.
According to an embodiment of the invention, the thickness of the photoresist layer that is located at right above the multiple protrusion and described more The ratio between height of a protrusion is (8-20): 1.The thickness of the photoresist layer of multiple protrusion tops is in above range as a result, favorably In the photoresist for easily removing multiple protrusion tops by ashing processing, and will not be in polysilicon preformed layer and substrate Structure damages, and further improves the service performance of prepared polysilicon membrane.
According to an embodiment of the invention, the height of multiple protrusions isThus, it is possible to according to the protrusion Height easily determines the technological parameters such as the time of the second ashing processing, saves process.
It is handled according to an embodiment of the invention, carrying out first ashing using the first podzolic gas, first ashing Gas includes sulfur hexafluoride and oxygen, and the flow of the sulfur hexafluoride is 200-300sccm, and the flow of the oxygen is 9000- 11000sccm, the pressure in the reaction chamber of the first ashing processing is 35-45mTorr, the first ashing processing it is equal from Component power is 28-32KW, and the substrate bias of the first ashing processing is 13-17KW.Thus, it is possible to easily remove multiple The photoresist of convex surfaces exposes multiple protrusions.
It is handled according to an embodiment of the invention, carrying out second ashing using the second podzolic gas, second ashing Gas includes sulfur hexafluoride and chlorine, and the flow of the sulfur hexafluoride is 750-850sccm, and the flow of the oxygen is 7500- 8500sccm, the pressure in the reaction chamber of the second ashing processing is 35-45mTorr, the second ashing processing it is equal from Component power is 28-32KW, and the substrate bias of the second ashing processing is 13-17KW.Thus, it is possible to easily remove multiple Protrusion.
According to an embodiment of the invention, the polysilicon preformed layer is formed in the part of the surface of the substrate, the removal The remaining photoresist layer further comprises: carrying out third ashing processing to the photoresist layer, etching removal is the multiple The photoresist layer between protrusion;Removing removes the remaining photoresist layer.Thus, it is possible to which it is pre- to further increase polysilicon The planarization on preparative layer surface, also, third ashing processing can take away remaining chlorine in the second ashing processing, prevent from remaining Chlorine polysilicon preformed layer is damaged.
It is handled according to an embodiment of the invention, carrying out the third ashing using third podzolic gas, the third ashing Gas includes sulfur hexafluoride and oxygen, and the flow of the sulfur hexafluoride is 550-650sccm, and the flow of the oxygen is 2500- 3500sccm, the pressure in reaction chamber that the third ashing is handled is 8-12mTorr, the plasma of the third ashing processing Source power is 8-12KW, and the substrate bias of the third ashing processing is 13-17KW.Thus, it is possible to easily remove polysilicon The photoresist of prefabricated layer surface, and the surface of polysilicon preformed layer can be planarized, it further improves prepared Polysilicon membrane service performance;Also, third ashing processing can take away remaining chlorine in the second ashing processing, prevent Only remaining chlorine damages polysilicon preformed layer.
In another aspect of this invention, the invention proposes a kind of array substrates.According to an embodiment of the invention, the battle array The polysilicon membrane that column substrate is prepared including the use of the described in any item methods in front.The array substrate is appointed with front as a result, Whole feature and advantage possessed by polysilicon membrane prepared by method described in one, details are not described herein.
In still another aspect of the invention, the invention proposes a kind of display panels.According to an embodiment of the invention, described aobvious Show that panel includes mentioned-above array substrate.The display base plate has complete possessed by mentioned-above array substrate as a result, Portion's feature and advantage, details are not described herein.
Detailed description of the invention
Above-mentioned and/or additional aspect of the invention and advantage will become from the description of the embodiment in conjunction with the following figures Obviously and it is readily appreciated that, in which:
Fig. 1 shows the method flow diagram according to an embodiment of the invention for preparing polysilicon membrane;
Fig. 2 shows the method flow diagram in accordance with another embodiment of the present invention for preparing polysilicon membrane;
Fig. 3 shows the Electron microscope schematic diagram of polysilicon preformed layer according to an embodiment of the invention;
Fig. 4 shows the Electron microscope schematic diagram of polysilicon preformed layer in accordance with another embodiment of the present invention;
Fig. 5 shows the method flow diagram for preparing polysilicon membrane of another embodiment according to the present invention;
Fig. 6 shows the method flow diagram for preparing polysilicon membrane of another embodiment according to the present invention;
Fig. 7 shows the structural schematic diagram of substrate and polysilicon preformed layer according to an embodiment of the invention;And
Fig. 8 shows the method flow diagram for preparing polysilicon membrane of another embodiment according to the present invention.
Description of symbols:
100: substrate;110: substrate;120: grid layer;130: gate insulating layer;200: polysilicon preformed layer;10: protrusion; 300: photoresist layer;310: photoresist;320: pit.
Specific embodiment
The embodiment of the present invention is described below in detail, examples of the embodiments are shown in the accompanying drawings, wherein from beginning to end Same or similar label indicates same or similar element or element with the same or similar functions.Below with reference to attached The embodiment of figure description is exemplary, and for explaining only the invention, and is not considered as limiting the invention.
In one aspect of the invention, the invention proposes a kind of methods for preparing polysilicon membrane.This method by Photoresist layer is arranged in the surface of polysilicon preformed layer after crystallization, and carry out ashing processing etc., it can easily remove polysilicon The protrusion of prefabricated layer surface improves the planarization on polysilicon membrane surface, improves the service performance of polysilicon membrane.For example, The profile pattern of the back channel of polysilicon membrane formation can be improved, and then can reduce the film of polysilicon membrane formation Off-state current (Ioff) of transistor etc. avoids that crosstalk (crosstalk) etc. occurs using the display device of the thin film transistor (TFT) It shows bad.
According to an embodiment of the invention, with reference to Fig. 1, this method comprises:
S100: substrate is provided
In this step, substrate is provided.According to an embodiment of the invention, with reference to (a) in (a) and Fig. 8 in Fig. 7, The type of substrate 100 is not particularly limited, and can form polysilicon layer on substrate in the next steps, as previously mentioned, polysilicon layer It is used to form control element TFT, therefore, with reference to (a) in Fig. 2, substrate 100 can also include substrate 110, substrate 110 On can also have other film layers for being used to form TFT, such as grid layer (Gate) 120 and gate insulating layer (GI) 130, substrate 110 may include glass substrate, resin substrate, quartz base plate etc., and grid layer 120 is formed in the part of the surface of substrate 110, grid Insulating layer 130 is formed in side of the grid layer 120 far from substrate 110, and covers the surface of grid layer 120 and substrate 110.Tool Body, grid layer 120 can be to be formed by metal material, formed gate insulating layer 130 material may include silica, Silicon nitride etc..Specifically, grid layer 120 and grid successively can be formed on 110 surface of substrate by the method for chemical vapor deposition Pole insulating layer 130.
S200: polysilicon preformed layer is formed
In this step, the surface of substrate described in step forms polysilicon preformed layer in front.It is according to the present invention Embodiment, with reference to (b) in (b) and Fig. 8 in Fig. 7, polysilicon preformed layer 200 can be formed in the part table of substrate 100 Face.For simplicity, the structures such as grid layer and gate insulating layer, those skilled in the art are not showed that in Fig. 7 and Fig. 8 , it is understood that can also have other film layers for being used to form TFT between substrate 100 and polysilicon preformed layer 200, other The concrete type and composition material of film layer, the concrete type for the TFT that those skilled in the art can be formed as needed select It selects.With reference to (b) in Fig. 2, polysilicon layer 200 can be formed in part of the surface of the gate insulating layer 130 far from grid layer 120. According to an embodiment of the invention, amorphous silicon (a-Si) layer (not shown) first can be formed on the surface of substrate 100, it is then right Amorphous silicon layer carries out crystallization, such as can carry out Excimer-Laser Crystallization (ELC) to amorphous silicon layer, such as microlens array (MLA) crystallization, the polysilicon preformed layer 200 formed after crystallization.As previously mentioned, polysilicon (p-Si) grain boundary formed In the process, the silicon of grain boundaries melting is easy to be squeezed and project upwards, and forms small raised (Small Protrusions), ginseng Examine the protrusion 10 in (b) in Fig. 2.According to an embodiment of the invention, the thickness of the polysilicon preformed layer 200 formed in the step (the thickness D with reference to shown in Fig. 2 (b)) can beThe height of the protrusion 10 on 200 surface of polysilicon preformed layer (referring to height h) shown in Fig. 2 (b) can beSpecifically, being surveyed with reference to Fig. 3 and Fig. 4 by Electronic Speculum Examination, measure polysilicon preformed layer surface have protrusion, and measure polysilicon preformed layer with a thickness ofLeft and right, measures Protrusion height beLeft and right.As previously mentioned, the surface of the polysilicon preformed layer formed in the step has protrusion, if It is not performed corresponding processing, remove the protrusion of the prefabricated layer surface of polysilicon, it will influences prepared polysilicon membrane Service performance.It should be noted that the thickness of polysilicon preformed layer 200 refers to polysilicon preformed layer 200 with reference to (b) in Fig. 2 Lower surface and upper surface between average thickness (refer to "upper" shown in the drawings, "lower" direction).The height of protrusion refers to Average distance between the upper end of protrusion and the upper surface of polysilicon preformed layer.
S300: photoresist layer is formed
In this step, the polysilicon preformed layer formed in step in front forms photoresist layer far from the side of substrate. According to some embodiments of the present invention, with reference to Fig. 5 and Fig. 7, this method further comprises:
S310: coating photoresist
In this step, photoresist is coated far from the side of substrate in polysilicon preformed layer, with reference to (c1) in Fig. 7, such as Preceding described, polysilicon preformed layer 200 is formed in the part of the surface of substrate 100, then photoresist 310 covers polysilicon preformed layer 200 And the substrate 100 not covered by polysilicon preformed layer 200.According to an embodiment of the invention, when coating photoresist 310, control The thickness for making the photoresist 310 of coating, makes photoresist 310 far from the surface plane of 100 side of substrate (with reference in Fig. 7 (c1) shown by), to carry out subsequent processing.It should be noted that the photoresist 310 coated in the step is far from substrate The surface of 100 sides is plane, then is coated in 200 surface of polysilicon preformed layer and is coated in not by polysilicon preformed layer 200 The thickness of the photoresist on 100 surface of substrate of covering is different.According to an embodiment of the invention, the thickness of the photoresist of coating It is 1-3 μm, for example, 2 μm, for example, 2.2 μm.It should be noted that the thickness of the photoresist coated refers to photoresist thickness herein The maximum value of degree.
S320: development is exposed using intermediate tone mask version, forms photoresist layer
In this step, using intermediate tone mask version (Half Tone Mask) to the photoresist coated in preceding step into Row exposure development forms pit in photoresist and polysilicon preformed layer corresponding position, to form photoresist layer.It is according to the present invention Embodiment, (c2) in structural reference Fig. 7 of the photoresist layer of formation, orthographic projection of the pit 320 of formation on substrate 100 can To be overlapped with orthographic projection of the polysilicon preformed layer 200 on substrate 100.According to an embodiment of the invention, intermediate tone mask version can To include full transmission region (area Full Tone) and semi-transparent region (area Half Tone), semi-transparent region can correspond to photoetching Photoresist above glue preformed layer, full transmission region can be with the photoresists above corresponding substrate.It is right using the intermediate tone mask version The photoresist coated in preceding step is exposed development, by adjusting the intensity of illumination etc. in semi-transparent region, can it is simple and The thickness for being formed in the photoresist layer of multiple protrusion tops is accurately controlled, is removed convenient for being handled subsequently through plasma ashing The photoresist of multiple convex surfaces;Also, photoresist layer 200 corresponding position of polysilicon preformed layer formed pit, can to avoid etc. Gas ions damage the structure in substrate, further improve the service performance of prepared polysilicon membrane.Specifically, The photoresist of coating with a thickness of 1-3 μm, at for example, 2.2 μm, by the exposure-processed of intermediate tone mask version, be formed in protrusion The thickness of the photoresist layer of top can beLeft and right.It should be noted that since photoresist has mobility, shape It is slightly less than the thickness of the photoresist of the not raised prefabricated layer surface of polysilicon at the thickness of the photoresist above multiple protrusions Degree.
In summary, when being exposed solidification using photoresist of the intermediate tone mask version to coating, shape can accurately be controlled At the thickness of the photoresist layer above multiple protrusions, convenient for by the parameters such as time for adjusting the first ashing processing, and then compared with The photoresist of multiple convex surfaces is removed well.Also, in this method, when coating photoresist, the light to coating may not need The thickness etc. of photoresist is accurately controlled, as long as enabling surface of the photoresist far from one side of substrate is plane, subsequently through half The exposure-processed of tone mask plate can adjust the thickness of the photoresist of multiple protrusion tops to zone of reasonableness.
Other embodiments according to the present invention, with reference to (c) in Fig. 8, in side of the polysilicon preformed layer far from substrate When forming photoresist layer, photoresist first can also be coated far from the side of substrate in polysilicon preformed layer, then directly be exposed Photocuring, to form photoresist layer 300.Specifically, photoresist overlay polysilicon preformed layer and not by polysilicon preformed layer The substrate of covering can control the photoresist thickness of coating during coating photoresist, so that the thickness of photoresist layer everywhere It spends uniform, such as can be coated at each position on surface of the polysilicon preformed layer 200 far from 100 side of substrate same amount of Photoresist, the photoresist of coating can form the uniform photoresist layer of thickness by solidification.This method can be easily as a result, Form photoresist layer.According to an embodiment of the invention, the thickness of the photoresist of coating can be not less than 1 μm.Photoresist as a result, For thickness in above range, the mobility of photoresist is preferable, equal convenient for forming thickness in polysilicon preformed layer and substrate surface One photoresist layer.It should be noted that mentioned-above " the uniform photoresist layer of thickness " refers to the mistake in coating photoresist Cheng Zhong, the amount for coating the photoresist located at various locations are identical.In actual operation, since photoresist has mobility, The thickness of photoresist layer being formed in right above protrusion 10 can be smaller, such as in the upper of substrate 100 and polysilicon preformed layer 200 When the photoresist of 1 μ m-thick of side's coating, in finally formed photoresist layer 300, the thickness of the photoresist layer 300 right above protrusion 10 ForLeft and right, correspondingly, the thickness of the photoresist layer 300 of not raised 200 top of polysilicon preformed layer can beLeft and right.As a result, in subsequent ashing processing, the photoresist layer of not raised 200 top of polysilicon preformed layer 300 thickness is larger, and the upper surface that can protect polysilicon preformed layer 200 is not etched, and improves the upper of polysilicon preformed layer 200 The planarization on surface.
According to an embodiment of the invention, be located at institute it is multiple protrusion surfaces photoresist layer thickness and multiple protrusions height The ratio between degree can be (8-20): 1, specifically, can be 9:1, it can be 10:1, can be 12:1, can be 15:1, Ke Yiwei 18:1 etc., the thickness of the photoresist layer of multiple protrusion tops is conducive to handle easily by ashing in above range as a result, The photoresist of multiple protrusion tops is removed, and the structure in polysilicon preformed layer and substrate will not be damaged, further Improve the service performance of prepared polysilicon membrane.
S400: the first ashing processing is carried out, multiple protrusions are exposed
In this step, the first ashing processing is carried out to the photoresist layer formed in preceding step, removes part photoresist Layer, to expose multiple protrusions.According to an embodiment of the invention, can be carried out at the first ashing using the first podzolic gas Reason, the first podzolic gas may include sulfur hexafluoride and oxygen, and the flow of sulfur hexafluoride can be 200-300sccm, such as can Think 250sccm;The flow of oxygen can be 9000-11000sccm, such as can be 10000sccm;First ashing processing Pressure in reaction chamber can be 35-45mTorr, such as can be 40mTorr;The plasma source power of first ashing processing can Think 28-32KW, such as can be 30KW;The substrate bias of first ashing processing can be 13-17KW, such as can be 15KW.Thus, it is possible to easily remove the photoresist of multiple convex surfaces, multiple protrusions are exposed.Implementation according to the present invention Example, can test or calculate the thickness for the photoresist layer being formed in above protrusion in preceding step, and then can be to first The time etc. for being ashed processing is estimated, and then can easily remove the photoresist of multiple convex surfaces, exposes multiple convex It rises.When the thickness of the photoresist of multiple convex surfaces is larger, the time for carrying out the first ashing processing can be longer.According to this hair Bright embodiment, shown by (d) in (d) and Fig. 8 in structural reference Fig. 7 of photoresist layer 300 after treatment.
S500: the second ashing processing is carried out, multiple protrusions are removed
In this step, the second ashing processing is carried out to the multiple protrusions exposed in preceding step, removes multiple protrusions. According to an embodiment of the invention, can carry out the second ashing processing using the second podzolic gas, the second podzolic gas may include The flow of sulfur hexafluoride and chlorine, sulfur hexafluoride can be 750-850sccm, such as can be 800sccm;The flow of oxygen can Think 7500-8500sccm, such as can be 8000sccm;Pressure in the reaction chamber of second ashing processing can be 35- 45mTorr, such as can be 40mTorr;The plasma source power of first ashing processing can be 28-32KW, such as can be 30KW;The substrate bias of first ashing processing can be 13-17KW, such as can be 15KW.Thus, it is possible to easily remove more A protrusion.According to an embodiment of the invention, the height for being formed in protrusion in preceding step can be tested out, such as mentioned-above Protrusion height beThus, it is possible to easily determine the time etc. of the second ashing processing according to the height of the protrusion Technological parameter saves process.According to an embodiment of the invention, in structural reference Fig. 7 of photoresist layer 300 after treatment (e) and Fig. 8 in (e) shown by.
S600: removing remaining photoresist layer, forms polysilicon membrane
In this step, removal is by preceding step treated remaining photoresist layer, to be formed mostly by film. Specifically, remaining photoresist layer can be removed using developer solution removing.According to an embodiment of the invention, with reference to Fig. 6, this method It may further include:
S610: carrying out third ashing processing, removes the photoresist layer between multiple protrusions
In this step, third ashing processing is carried out to passing through the second ashing treated photoresist layer in preceding step, Photoresist layer between the multiple protrusions of etching removal.According to an embodiment of the invention, the can be carried out using third podzolic gas Three ashing processing, third podzolic gas may include sulfur hexafluoride and oxygen, and the flow of sulfur hexafluoride can be 550- 650sccm, such as can be 600sccm;The flow of oxygen can be 2500-3500sccm, such as can be 3000sccm;The Pressure in the reaction chamber of three ashing processing can be 8-12mTorr, such as can be 10mTorr;First ashing processing etc. Ion source power can be 8-12KW, such as can be 10KW;The substrate bias of first ashing processing can be 13-17KW, example It such as can be 15KW.Thus, it is possible to easily remove the photoresist of the prefabricated layer surface of polysilicon, and can be prefabricated to polysilicon The surface of layer is planarized, such as can not removed clean protrusion to the prefabricated layer surface of polysilicon and be removed again, into One step improves the service performance of prepared polysilicon membrane;Also, third ashing processing can be taken away at the second ashing Remaining chlorine in reason, prevents remaining chlorine from damaging to polysilicon preformed layer.
According to an embodiment of the invention, the photoresist layer of the top of polysilicon preformed layer before can testing or calculating Thickness, and then the time etc. that processing can be ashed to third is estimated, and then can easily remove polysilicon preformed layer table The photoresist in face.According to an embodiment of the invention, (f) in structural reference Fig. 7 of photoresist layer 300 after treatment and Shown by (f) in Fig. 8.
S620: removing remaining photoresist layer, forms polysilicon membrane
In this step, removal is by third ashing treated remaining photoresist layer, to form polysilicon membrane. Specifically, remaining photoresist layer can be removed using developer solution removing.According to an embodiment of the invention, the polysilicon formed is thin Shown by (g) in (g) and Fig. 8 in structural reference Fig. 7 of film.
In summary, this method is without being greatly improved MLA technology, by increasing easy subsequent processing process, The protrusion that the prefabricated layer surface of polysilicon can be removed keeps the profile pattern of polysilicon membrane higher, and will not influence polysilicon The performance of film, to improve the service performance of the electronic component (such as TFT) using the polysilicon membrane.
In another aspect of this invention, the invention proposes a kind of array substrates.According to an embodiment of the invention, the array The polysilicon membrane that substrate is prepared including the use of the described in any item methods in front.The array substrate has front any as a result, Whole feature and advantage possessed by polysilicon membrane prepared by method described in, details are not described herein.Generally speaking, The service performance of the array substrate is good, and off-state current is smaller.
In still another aspect of the invention, the invention proposes a kind of display panels.According to an embodiment of the invention, the display Panel includes mentioned-above array substrate.The display base plate has possessed by mentioned-above array substrate all as a result, Feature and advantage, details are not described herein.Generally speaking, the display panel display performance is good, is less prone to crosstalk (crosstalk) etc. display is bad.
In the description of the present invention, the orientation or positional relationship of the instructions such as term " on ", "lower" is based on the figure Orientation or positional relationship is merely for convenience of the description present invention rather than requires the present invention that must be constructed and be grasped with specific orientation Make, therefore is not considered as limiting the invention.
In the description of this specification, the description of reference term " one embodiment ", " another embodiment " etc. means to tie The embodiment particular features, structures, materials, or characteristics described are closed to be included at least one embodiment of the present invention.At this In specification, the schematic representation of the above terms does not necessarily have to refer to the same embodiment or example.Moreover, the tool of description Body characteristics, structure, material or feature may be combined in any suitable manner in any one or more of the embodiments or examples.This Outside, without conflicting with each other, those skilled in the art by different embodiments described in this specification or can show The feature of example and different embodiments or examples is combined.
Although the embodiments of the present invention has been shown and described above, it is to be understood that above-described embodiment is example Property, it is not considered as limiting the invention, those skilled in the art within the scope of the invention can be to above-mentioned Embodiment is changed, modifies, replacement and variant.

Claims (10)

1. a kind of method for preparing polysilicon membrane characterized by comprising
Substrate is provided;
Polysilicon preformed layer is formed over the substrate, and the surface of the polysilicon preformed layer has multiple protrusions;
Photoresist layer is formed far from the side of the substrate in the polysilicon preformed layer;
First ashing processing is carried out to the photoresist layer, part photoresist layer is removed, to expose the multiple protrusion;
Second ashing processing is carried out to the multiple protrusion, removes the multiple protrusion;
The remaining photoresist layer is removed, to form the polysilicon membrane.
2. the method according to claim 1, wherein the polysilicon preformed layer is formed in the part of the substrate Surface coats photoresist, polysilicon described in the photoresist overlay far from the side of the substrate in the polysilicon preformed layer Preformed layer and the substrate not covered by the polysilicon preformed layer, control the thickness of the photoresist of coating, to enable Surface of the photoresist far from the one side of substrate is plane;
Development is exposed to the photoresist using intermediate tone mask version, in the photoresist and the polysilicon preformed layer pair Should place form pit, to form the photoresist layer.
3. the method according to claim 1, wherein the polysilicon preformed layer is formed in the part of the substrate Surface coats photoresist, polysilicon described in the photoresist overlay far from the side of the substrate in the polysilicon preformed layer Preformed layer and the substrate not covered by the polysilicon preformed layer, and exposure curing is carried out, to form the photoetching Glue-line controls the photoresist thickness of coating, to enable the thickness of the photoresist layer everywhere uniform;
Optionally, the thickness of the photoresist is not less than 1 μm.
4. according to the method in claim 2 or 3, which is characterized in that the photoetching right above the multiple protrusion The ratio between height of the thickness of glue-line and the multiple protrusion is (8-20): 1;
Optionally, the height of multiple protrusions is
5. according to the method in claim 2 or 3, which is characterized in that carry out first ashing using the first podzolic gas Processing, first podzolic gas include sulfur hexafluoride and oxygen, and the flow of the sulfur hexafluoride is 200-300sccm, described The flow of oxygen is 9000-11000sccm, and the pressure in the reaction chamber of the first ashing processing is 35-45mTorr, described The plasma source power of first ashing processing is 28-32KW, and the substrate bias of the first ashing processing is 13-17KW.
6. according to the method described in claim 5, it is characterized in that, being carried out at second ashing using the second podzolic gas Reason, second podzolic gas include sulfur hexafluoride and chlorine, and the flow of the sulfur hexafluoride is 750-850sccm, the oxygen The flow of gas be 7500-8500sccm, it is described second ashing processing reaction chamber in pressure be 35-45mTorr, described second The plasma source power of ashing processing is 28-32KW, and the substrate bias of the second ashing processing is 13-17KW.
7. the method according to claim 1, wherein the polysilicon preformed layer is formed in the part of the substrate Surface, the remaining photoresist layer of removal further comprises:
Third ashing processing is carried out to the photoresist layer, the photoresist layer between the multiple protrusion of etching removal;
Removing removes the remaining photoresist layer.
8. the method according to the description of claim 7 is characterized in that being carried out at the third ashing using third podzolic gas Reason, the third podzolic gas include sulfur hexafluoride and oxygen, and the flow of the sulfur hexafluoride is 550-650sccm, the oxygen The flow of gas is 2500-3500sccm, and the pressure in the reaction chamber of the third ashing processing is 8-12mTorr, the third The plasma source power of ashing processing is 8-12KW, and the substrate bias of the third ashing processing is 13-17KW.
9. a kind of array substrate, which is characterized in that the array substrate is including the use of the described in any item methods of claim 1-8 The polysilicon membrane of preparation.
10. a kind of display panel, which is characterized in that the display panel includes array substrate as claimed in claim 9.
CN201910110957.4A 2019-02-12 2019-02-12 Method for preparing polycrystalline silicon film, array substrate and display panel Expired - Fee Related CN109860026B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910110957.4A CN109860026B (en) 2019-02-12 2019-02-12 Method for preparing polycrystalline silicon film, array substrate and display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910110957.4A CN109860026B (en) 2019-02-12 2019-02-12 Method for preparing polycrystalline silicon film, array substrate and display panel

Publications (2)

Publication Number Publication Date
CN109860026A true CN109860026A (en) 2019-06-07
CN109860026B CN109860026B (en) 2021-10-01

Family

ID=66897711

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910110957.4A Expired - Fee Related CN109860026B (en) 2019-02-12 2019-02-12 Method for preparing polycrystalline silicon film, array substrate and display panel

Country Status (1)

Country Link
CN (1) CN109860026B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110854068A (en) * 2019-10-28 2020-02-28 深圳市华星光电技术有限公司 Preparation method of TFT array substrate and TFT array substrate

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103887244A (en) * 2014-03-07 2014-06-25 京东方科技集团股份有限公司 Array substrate, manufacturing method and display device
CN106783582A (en) * 2016-12-22 2017-05-31 武汉华星光电技术有限公司 Polysilicon membrane processing method, thin film transistor (TFT), array base palte and display panel

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103887244A (en) * 2014-03-07 2014-06-25 京东方科技集团股份有限公司 Array substrate, manufacturing method and display device
CN106783582A (en) * 2016-12-22 2017-05-31 武汉华星光电技术有限公司 Polysilicon membrane processing method, thin film transistor (TFT), array base palte and display panel

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110854068A (en) * 2019-10-28 2020-02-28 深圳市华星光电技术有限公司 Preparation method of TFT array substrate and TFT array substrate

Also Published As

Publication number Publication date
CN109860026B (en) 2021-10-01

Similar Documents

Publication Publication Date Title
TWI594055B (en) Liquid crystal display device have a transverse electric field type active matrix substrate and method of producing the active matrix substrate
US7326598B2 (en) Method of fabricating polycrystalline silicon
US10269984B2 (en) Thin film transistor, array substrate, and display apparatus, and fabrication methods thereof
EP3054483B1 (en) Array substrate, manufacturing method therefor, and display apparatus
KR20130017034A (en) Thin film transistor array substrate and the method of manufacturing the substrate
KR100640211B1 (en) Manufacturing method of the liquid crystal display device
EP3485513A1 (en) Array substrate, display apparatus, and method of fabricating array substrate
TW201022814A (en) Display device
US20120086678A1 (en) Wire, method of manufacture, and related apparatus
JP2008042218A (en) Manufacturing method of thin film transistor panel
CN101424846B (en) TFT-LCD array substrate, liquid crystal display panel and method for producing same
CN109860026A (en) Prepare the method, array substrate, display panel of polysilicon membrane
US20170221929A1 (en) Manufacture method of low temperature poly-silicon tft substrate and low temperature poly-silicon tft substrate
JP2008304830A (en) Method for manufacturing display device
TWI396916B (en) Method of forming thin film transistor array substrate
US7531454B2 (en) Method and apparatus of fabricating liquid crystal display device
CN109616415A (en) The production method of low-temperature polysilicon film transistor
JP2007183623A (en) Method for manufacturing bottom substrate of liquid crystal display device
WO2013026395A1 (en) Array substrate and manufacturing method thereof
US20070238230A1 (en) Method for forming thin film transistor
CN208738249U (en) Display panel
KR100482471B1 (en) Method for manufacturing of active matrix liquid crystal display
EP2525255A1 (en) Array substrate and manufacturing method thereof
KR101982097B1 (en) Thin film transistor array substrate and the method of manufacturing the substrate
KR100791830B1 (en) Fabrication method of polycrystalline nano-pattern using nano-imprint method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20211001