CN109857014A - A kind of pwm signal generation method based on FPGA - Google Patents
A kind of pwm signal generation method based on FPGA Download PDFInfo
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- CN109857014A CN109857014A CN201910065701.6A CN201910065701A CN109857014A CN 109857014 A CN109857014 A CN 109857014A CN 201910065701 A CN201910065701 A CN 201910065701A CN 109857014 A CN109857014 A CN 109857014A
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- pwm
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Abstract
The invention belongs to signal processing technology fields, disclose a kind of pwm signal generation method based on FPGA, phase shift processing is carried out to fpga chip work clock using phaselocked loop included inside fpga chip and generates the n auxiliary clock signals with frequency, n are established respectively for generating the digital carrier signal of PWM with this n auxiliary clock signal, modulating wave is compared with this n digital carrier, judge suitable PWM trip point, obtains more accurate and close to ideal PWM waveform；The ingenious phase shift function using phaselocked loop inside PFGA of this pwm signal generation method provided by the invention generates the n auxiliary clock signals with frequency, to break through the FPGA work clock limit, it is equivalent to and is gone to generate digital carrier with n frequency doubling clock, in the case where not increasing cost, the digital PWM signal precision that fpga chip generates is improved into an order of magnitude, so that the FPGA based on middle low cost is also able to achieve the application of the other high-precision programmable direct current of Instrument Level or AC power source.
Description
Technical field
The invention belongs to signal processing technology fields, are based on FPGAField- more particularly, to one kind
Programmable Gate Array, field programmable gate array) PWM (Pulse Width Modulation, pulse are wide
Degree modulation) signal creating method.
Background technique
The pwm signal of early stage, which generates, generally to be realized using hardware simulation circuit mode, and there are electronic component agings, control
Mode modifies inconvenient disadvantage.With the development of processor chips, more and more chips support pwm signal output, and part is single
Piece machine, DSP, the High-Accuracy PWM signal that for example the C2000 episode DSP of TI supports up to 150ps precision grade generate.No
It crosses since the work in series mode of processor chips limits it in the application of some high-performance, the occasion of high real-time requirements.
For example the low-cost FPGA of ALTERA company --- Cyclone series has very high cost performance, has widely applied in frequency conversion
In device, inverter.When generating pwm signal with FPGA, pulsewidth precision is limited to the work clock of chip.Such FPGA is generally internal
Work clock is no more than 200MHz, and clock frequency can further decline when logic is complicated, internal resource occupies more；Work exists
When 100MHz, the precision of generated pwm signal can only achieve 10ns rank.Such precision for high precision instrument equipment,
Or in DC bus-bar voltage it is very high and in the lower situation of output voltage, required precision cannot be met.It is asked for this
Topic, the advanced fpga chip of existing some valuableness can reach working clock frequency 600-700MHz, can produce satisfaction high-precision
It is required that pwm signal；Separately having a kind of scheme is in addition to add the DSP that a piece of band HRPWM is exported specially to generate High-Accuracy PWM letter
Number；This will all bring the increase of cost.
Summary of the invention
Aiming at the above defects or improvement requirements of the prior art, the present invention provides a kind of, and the pwm signal based on FPGA is raw
At method, its object is to improve the digital PWM signal precision for generating FPGA in the case where not increasing cost.
To achieve the above object, according to one aspect of the present invention, a kind of pwm signal generation side based on FPGA is provided
Method generates the n auxiliary clock signals with frequency using the phase shift function of phaselocked loop inside PFGA, using this n auxiliary clock letter
Number n digital carrier is generated, utilizes this n digital carrier generation pwm signal；Wherein n is the natural number not less than 2.
Preferably, the above-mentioned pwm signal generation method based on FPGA, specifically comprises the following steps:
(1) phase shift processing is carried out to fpga chip work clock using PFGA chip interior phaselocked loop, generates n with frequency
Auxiliary clock signal；
(2) n are established respectively for generating the digital carrier signal of pwm signal using above-mentioned n auxiliary clock signal；
(3) modulating wave is compared with this n digital angle carrier wave, judges PWM trip point, obtains pwm signal.
Preferably, the above-mentioned pwm signal generation method based on FPGA in step (1), is made two neighboring by phase shift processing
Interval time is T/n between auxiliary clock signal；Wherein, T is the operating clock cycle of fpga chip.
Preferably, the above-mentioned pwm signal generation method based on FPGA, judges PWM trip point, the method for obtaining pwm signal,
Including following sub-step:
(3.1) decline to carrier wave, successively judge whether be greater than in the rising edge time modulating wave of same frequency clock signal 1 to n
Carrier wave waits carrier wave to rise, and enter step (3.2) if it is, the PWM jump of output is height；If it is not, then continue according to
Whether secondary judgement is greater than carrier wave with the rising edge time modulating wave of frequency clock signal 1 to n in clock；
(3.2) successively judge whether same frequency clock signal 1 to the rising edge time modulating wave of n is less than carrier wave, if it is,
The PWM jump of output is low, and enters step (3.1), waits carrier wave decline, circulation step (3.1)~(3.2).
In general, through the invention it is contemplated above technical scheme is compared with the prior art, can obtain down and show
Beneficial effect:
A kind of pwm signal generation method based on FPGA provided by the invention utilizes lock included inside number fpga chip
Phase ring carries out phase shift processing to fpga chip work clock and generates the n auxiliary clock signals with frequency, with this n clock signal point
N are not established for generating the digital triangle carrier signal of PWM, and modulating wave is compared with this n digital triangular carrier, is sentenced
It is disconnected go out suitable PWM trip point, obtain more accurate and close to ideal PWM waveform；This method is ingenious to utilize PFGA internal lock
The phase shift function of phase ring generates the n auxiliary clock signals with frequency and is equivalent to break through the FPGA work clock limit with n times
Frequency clock goes to generate digital carrier, and in the case where not increasing cost, the digital PWM signal precision that FPGA is generated improves one
The order of magnitude, the FPGA based on middle low cost are also able to achieve the application of the other high-precision programmable direct current of Instrument Level or AC power source；
The result of actual measurement shows that occasion especially high in requirement of real-time control, surmounts DSP using the performance that this method generates pwm signal
System.
Detailed description of the invention
Fig. 1 is ideal pwm signal generating principle schematic diagram；
Fig. 2 is that ideal triangular carrier is discretized as the schematic illustration of ladder triangular carrier；
Fig. 3 is the schematic illustration of the pwm signal generation method provided in an embodiment of the present invention based on FPGA；
Fig. 4 is the digital carrier schematic diagram in the pwm signal generation method provided in an embodiment of the present invention based on FPGA；
Fig. 5 is the side for judging PWM trip point in the pwm signal generation method provided in an embodiment of the present invention based on FPGA
Method flow diagram；
Fig. 6 is measured waveform when certain Programmable AC Power Source exports 5Vac using conventional numerical PWM generation method；
Fig. 7 is certain Programmable AC Power Source using the pwm signal generation side provided in an embodiment of the present invention based on FPGA
Method exports measured waveform when 5Vac.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.As long as in addition, technical characteristic involved in the various embodiments of the present invention described below
Not constituting a conflict with each other can be combined with each other.
Ideal pwm signal is usually by obtaining after triangular carrier and modulating wave, as shown in Figure 1.And after digitizing, reason
The triangular carrier thought will be discretized as ladder triangular carrier, therefore PWM will generate certain error, referring to shown in Fig. 2.How
This PWM error is minimized in the case where not increasing cost, is problem solved by the invention.
Referring to Fig. 3, the provided pwm signal generation method based on FPGA of embodiment includes the following steps:
(1) phase shift processing is carried out to fpga chip work clock using the phase shift function of phaselocked loop inside PFGA, generates n
With frequency clock signal, and make interval time T/n between two neighboring clock signal, T is the operating clock cycle of FPGA here；
(2) n are established respectively for generating the digital triangle carrier signal of pwm signal with frequency clock signal using this n；
(3) modulating wave is compared with this n digital triangular carrier, judges PWM trip point, obtain it is more accurate,
Close to the pwm signal of ideal pwm signal.
In embodiment, carries out 3 frequency dividings and obtain 3 with frequency clock signal, establish 3 digital carriers, the number in reference Fig. 3
Carrier wave 1, digital carrier 2 and digital carrier 3；By the digital triangle carrier signal established by n with frequency clock signal
Desired carrier is more approached, therefore more accurate by the PWM that these digital carriers generate.
The digital carrier C of meaning shown in Fig. 4 more approaches desired carrier A than digital carrier B, therefore passes through digital carrier C
The PWM of generation is more accurate.Can intuitively it see from the comparison of Fig. 2 and Fig. 3, even if only doing 3 frequency dividings, PWM error is also substantially
Reduce.
The method of PWM trip point is judged provided in embodiment, process is referring to Fig. 5, including following sub-step:
(1) decline to carrier wave, successively judge whether clock 1 to the rising edge time modulating wave of n is greater than corresponding digital three
Then angle carrier wave 1 waits carrier wave to rise, and enter step (2) to n if it is, being height by the PWM jump of output；If
No, then whether the rising edge time modulating wave for looping to determine clock 1 to n is greater than carrier wave；
(2) successively judge whether clock 1 to the rising edge time modulating wave of n is less than corresponding digital triangular carrier 1 to n,
If it is, jumping the PWM of output to be low, and (1) is entered step, waits carrier wave decline, circulation step (1)~(2) once again.
The above-mentioned High-Accuracy PWM generation method based on FPGA that embodiment provides, sets about from the resource inside FPGA, ingenious
The n auxiliary clock signals with frequency are generated using the phase shift function of phaselocked loop inside PFGA, to break through FPGA work clock pole
Limit, is equivalent to and is gone to generate digital carrier with n frequency doubling clock, and the method for then using above-mentioned judgement PWM trip point can zero cost
By PWM precision improve n times.Using this method provided by the invention, the FPGA based on middle low cost is also able to achieve instrument rank
High-precision programmable direct current or AC power source application design, occasion especially high in requirement of real-time control, performance surmounts
Dsp system；In the case where not increasing cost, the FPGA digital PWM signal precision generated is improved into an order of magnitude.
By taking Programmable AC Power Source designs as an example, Lai Zhiguan looks at the actual effect of this method.In this example, FPGA work
It is 100MHz, period 10ns as clock.Phase shift configuration is carried out to the inside FPGA phaselocked loop in quartus II software, is generated
10 successively differ the same frequency 100MHz clock of 1ns between each other, are then generated most using the method for above-mentioned judgement PWM trip point
Whole PWM wave；The PWM wave phase generated using this method, precision are improved 10 times, reach 1ns rank.Programmable alternating current
BUS voltage is 300Vdc inside source, exports 5Vac voltage；It is using conventional numerical PWM generation method respectively referring to Fig. 6, Fig. 7
With method provided by the invention, the waveform of 5Vac generated；Discovery is compared, using provided by the invention based on FPGA's
Pwm signal generation method voltage waveform generated (Fig. 7) is more smooth, closer to ideal sinusoidal waveform.
As it will be easily appreciated by one skilled in the art that the foregoing is merely illustrative of the preferred embodiments of the present invention, not to
The limitation present invention, any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should all include
Within protection scope of the present invention.
Claims (5)
1. a kind of pwm signal generation method based on FPGA, which is characterized in that generate n using PFGA chip interior phaselocked loop
With the auxiliary clock signal of frequency, n digital carrier is generated using the n auxiliary clock signal, utilizes the n digital carrier
Generate pwm signal.
2. pwm signal generation method as described in claim 1, which is characterized in that specifically comprise the following steps:
(1) phase shift processing is carried out to fpga chip work clock using the phase shift function of PFGA chip interior phaselocked loop, generates n
With the auxiliary clock signal of frequency；
(2) n digital carrier is established respectively using the n auxiliary clock signal；
(3) modulating wave is compared with the n digital carrier, judges PWM trip point, obtains pwm signal.
3. pwm signal generation method as claimed in claim 2, which is characterized in that in step (1), make phase by phase shift processing
Interval time is T/n between adjacent two auxiliary clock signals；Wherein, T is the operating clock cycle of fpga chip.
4. pwm signal generation method as claimed in claim 2 or claim 3, which is characterized in that the digital carrier is that digital triangle carries
Wave.
5. pwm signal generation method as claimed in claim 2 or claim 3, which is characterized in that judge PWM trip point, obtain PWM letter
Number method, including following sub-step:
(3.1) decline to carrier wave, successively judge whether be greater than carrier wave in the rising edge time modulating wave of same frequency clock signal 1 to n,
If it is, the PWM jump of output is height, carrier wave is waited to rise, and enter step (3.2)；If it is not, then continuing successively to judge
Whether it is greater than carrier wave with the rising edge time modulating wave of frequency clock signal 1 to n in clock；
(3.2) successively judge whether same frequency clock signal 1 to the rising edge time modulating wave of n is less than carrier wave, if it is, output
PWM jump be it is low, and enter step (3.1), wait carrier wave decline, circulation step (3.1)~(3.2).
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110690879A (en) * | 2019-10-18 | 2020-01-14 | 西安许继电力电子技术有限公司 | Parameter-adjustable PWM controller based on programmable device and PWM pulse generation method |
| CN112510975A (en) * | 2020-11-25 | 2021-03-16 | 中国科学院近代物理研究所 | Method and system for improving PWM precision of accelerator power supply |
| CN112994507A (en) * | 2021-02-02 | 2021-06-18 | 南京大全电子科技有限公司 | PWM pulse generation method and PWM pulse generation device |
| CN115328268A (en) * | 2022-10-17 | 2022-11-11 | 湖南大学 | High-resolution digital PWM signal modulation method and system based on FPGA |
| CN116248085A (en) * | 2022-12-28 | 2023-06-09 | 无锡摩芯半导体有限公司 | Implementation method of high-precision delay generating circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110690879A (en) * | 2019-10-18 | 2020-01-14 | 西安许继电力电子技术有限公司 | Parameter-adjustable PWM controller based on programmable device and PWM pulse generation method |
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| CN112510975A (en) * | 2020-11-25 | 2021-03-16 | 中国科学院近代物理研究所 | Method and system for improving PWM precision of accelerator power supply |
| CN112994507A (en) * | 2021-02-02 | 2021-06-18 | 南京大全电子科技有限公司 | PWM pulse generation method and PWM pulse generation device |
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| CN115328268A (en) * | 2022-10-17 | 2022-11-11 | 湖南大学 | High-resolution digital PWM signal modulation method and system based on FPGA |
| CN116248085A (en) * | 2022-12-28 | 2023-06-09 | 无锡摩芯半导体有限公司 | Implementation method of high-precision delay generating circuit |
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