CN109841688B - Thin film transistor and manufacturing method thereof - Google Patents
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- CN109841688B CN109841688B CN201910064263.1A CN201910064263A CN109841688B CN 109841688 B CN109841688 B CN 109841688B CN 201910064263 A CN201910064263 A CN 201910064263A CN 109841688 B CN109841688 B CN 109841688B
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Abstract
The invention relates to the technical field of thin film transistors and discloses a thin film transistor which comprises a substrate, a grid electrode, a grid dielectric layer, an active layer, a drain electrode, a source electrode, an etching barrier layer, a passivation layer, a base, a grid, a micro lens and a reflector plate, wherein the grid electrode is arranged in the middle of the top of the substrate. The invention can achieve the effects of avoiding the influence of the over-etching step of the source electrode and the drain electrode in the direct imaging process on the oxide semiconductor active layer and further preventing the device characteristic from being deteriorated no matter the dry etching or the wet etching is adopted due to the arrangement of the etching barrier layer and the passivation layer.
Description
Technical Field
The invention relates to the technical field of thin film transistors, in particular to a thin film transistor and a manufacturing method thereof.
Background
The thin film transistor is an insulated gate field effect transistor. Its operating state can be described using the Weimer characterized single crystal silicon MOSFET operating principle. When a positive voltage is applied to the grid electrode, a grid voltage generates an electric field in the grid insulating layer, a power line points to the surface of the semiconductor from the grid electrode, induced charges are generated at the surface, the surface of the semiconductor is converted from a depletion layer into an electron accumulation layer along with the increase of the grid voltage to form an inversion layer, when a strong inversion is achieved (namely, when a starting voltage is achieved), carriers can pass through a channel by applying a voltage between drains, when a source drain voltage is small, a conductive channel is approximately constant resistance, a drain current linearly increases along with the increase of the source drain voltage, when the source drain voltage is large, the drain current influences the grid voltage, so that the electric field in the grid insulating layer is gradually weakened from a source end to a drain end, electrons in the inversion layer on the surface of the semiconductor are gradually reduced from the source end to the drain end, the channel resistance increases along with the increase of the source drain voltage, the increase of the drain current becomes slow, a corresponding linear region is transited to a saturation region, and when the source drain voltage is increased to a certain degree, the thickness of a drain-end inversion layer is reduced to zero, the voltage is increased, a device enters a saturation region, in the practical LCD production, the pixel capacitor is charged quickly by mainly utilizing the on state (larger than the on voltage) of a-Si: HTFT, and the voltage of the pixel capacitor is kept by utilizing the off state, so that the unification of quick response and good storage is realized.
The thin film transistor is a core device of a flat panel display, and each pixel of the thin film transistor is switched and driven depending on the TFT, regardless of the AMLCD display or the AMOLED display. However, the low mobility (<1cm2/Vs) of the a-Si: HTFT does not meet the driving requirements of next generation flat panel displays, while the poor large area uniformity of poly-Si TFTs makes them mainly oriented to small size display applications. On the other hand, oxide TFTs are considered to be most likely to be applied to next-generation flat panel displays due to their advantages of high mobility (several to several tens of cm2/Vs), good large-area uniformity, low temperature of the fabrication process, and the like. However, there is a growing emphasis on the application of oxide TFTs.
Disclosure of Invention
Technical problem to be solved
The invention provides a thin film transistor and a manufacturing method thereof, which achieve the effects of avoiding the influence of an over-etching step of a source electrode and a drain electrode in the direct patterning process on an oxide semiconductor active layer and further preventing the device characteristic from being deteriorated no matter dry etching or wet etching is adopted, and meanwhile, the oxide TFT device characteristic is degraded under the illumination condition, and in addition, the device transfer characteristic is obviously subjected to negative drift under NBS during illumination.
(II) technical scheme
The invention provides the following technical scheme: a thin film transistor comprises a substrate, a grid electrode, a grid dielectric layer, an active layer, a drain electrode, a source electrode, an etching barrier layer, a passivation layer, a base, grids, micro lenses and a reflector plate, wherein the grid electrode is arranged in the middle of the top of the substrate, the grid dielectric layer is overlapped with the two sides of the bottom of the substrate and the top of the grid electrode, the bottom of the active layer is overlapped with the top of the grid dielectric layer in a staggered mode, the drain electrode and the source electrode are respectively located on the two sides of the top of the active layer, the etching barrier layer is located in the middle of the top of the active layer, the two sides of the top of the etching barrier layer are respectively overlapped with the bottom of the opposite side of the drain electrode and the bottom of the source electrode, the passivation layer, the top of the drain electrode and the top of the source electrode form a wrapping covering state, the base is located in the middle of the inside of the substrate, the grids are located in the base and are in an evenly distributed state, and the three micro lenses are respectively located on the right side of the grids, the reflector plate is positioned on the left side of the grating.
Preferably, the substrate is a glass substrate, a quartz substrate or a high-temperature-resistant flexible substrate.
Preferably, the vertical cross-sectional shape of the grids is an equilateral trapezoid, and the spacing between the grids is 30 to 60 μm.
Preferably, the cross-sectional shape of the reflector plate is rectangular or trapezoidal, a single reflector plate is located between two microlenses at an adjacent opposite position, the distance between the two reflector plates is 24-32 μm, and the gap between the two reflector plates is a light-transmitting area.
Another technical problem to be solved by the present invention is to provide a method for manufacturing a thin film transistor, comprising the steps of:
preparation method of etching barrier layer
1) 1.32g of epoxy acrylate, 6g of urethane acrylate, 4g of methyl methacrylate, 6g of butyl acrylate and 2g of hydroxyethyl acrylate were placed in a glass holding container.
2) Absolute ethanol was added thereto and mixed, and mechanically stirred for 5 minutes.
3) Adopting a pressing plate, preheating the pressing plate to 20-25 ℃, uniformly coating the mechanically-stirred base material on the pressing plate, and naturally cooling to obtain the etching barrier layer film.
Preparation method of passivation layer
1) Putting 3g of benzoin ethyl ether, 1g of benzophenone and 0.5g of triethanolamine into a container, adding absolute ethyl alcohol, and mechanically stirring for 3 minutes.
2) 0.5g of leveling agent was added from a container, and mixed by hand stirring while heating to 25 ℃.
3) Adding 1g of photosensitizer, stirring to saturation state to obtain flowing liquid of passivation layer
Compared with the prior art, the invention provides a thin film transistor and a manufacturing method thereof, and the thin film transistor has the following beneficial effects:
1. due to the arrangement of the etching barrier layer and the passivation layer, the effect that the oxide semiconductor active layer is not affected by the over-etching step of the source electrode and the drain electrode in the direct patterning process no matter dry etching or wet etching is adopted can be achieved, and the effect that the device characteristics are poor is further prevented.
2. The invention changes the light transmittance of the substrate through the grating, avoids the phenomenon that the characteristics of the oxide TFT device are degraded under the illumination condition, and in addition, the transfer characteristics of the device under NBS (negative bias temperature) under illumination generate obvious negative drift, thereby improving the imaging effect of the thin film transistor.
Drawings
FIG. 1 is a schematic cross-sectional view of a TFT structure of the present invention;
FIG. 2 is a schematic cross-sectional view of a TFT and passivation layer in accordance with the present invention;
FIG. 3 is a schematic cross-sectional view of a thin film transistor and a substrate according to the present invention;
FIG. 4 is a schematic cross-sectional view of a structured grid according to the present invention;
FIG. 5 is a schematic cross-sectional view of a structured grid according to the present invention.
In the figure: the substrate comprises a substrate 1, a grid 2, a grid dielectric layer 3, an active layer 4, a drain electrode 5, a source electrode 6, an etching barrier layer 7, a passivation layer 8, a substrate 9, a grid 10, a micro lens 11 and a reflector 12.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1 to 5, the present invention provides a technical solution: a thin film transistor comprises a substrate 1, a grid electrode 2, a grid dielectric layer 3, an active layer 4, a drain electrode 5, a source electrode 6, an etching barrier layer 7, a passivation layer 8, a base 9, grids 10, a micro lens 11 and a reflector plate 12, wherein the grid electrode 2 is arranged in the middle of the top of the substrate 1, the grid dielectric layer 3 is overlapped with two sides of the bottom of the substrate 1 and the top of the grid electrode 2, the bottom of the active layer 4 is overlapped with the top of the grid dielectric layer 3 in a staggered mode, the drain electrode 5 and the source electrode 6 are respectively positioned on two sides of the top of the active layer 4, the etching barrier layer 7 is positioned in the middle of the top of the active layer 4, two sides of the top of the etching barrier layer 7 are respectively overlapped with the bottom of one side, opposite to the drain electrode 5 and the source electrode 6, the passivation layer 8, the top of the drain electrode 5 and the top of the source electrode 6 form a wrapping covering state, the base 9 is positioned in the middle of the inside of the substrate 1, the grids 10 are positioned in the base 9, the grating 10 is uniformly distributed, the three microlenses 11 are respectively located on the right side of the grating 10, and the reflector plate 12 is located on the left side of the grating 10.
The etching barrier layer 7 and the passivation layer 8 comprise the following raw materials in parts by weight: 1.32-4.3g of epoxy acrylate, 6-7g of polyurethane acrylate, 4-8g of methyl methacrylate, 6-8g of butyl acrylate, 2-7g of hydroxyethyl acrylate, 3-5g of benzoin ethyl ether, 1-3g of benzophenone, 0.5-1g of triethanolamine, 0.5-1.5g of a leveling agent and 1-2g of a photo sensitizer, and the method comprises the following steps:
preparation method of etching barrier layer 7
1) 1.32g of epoxy acrylate, 6g of urethane acrylate, 4g of methyl methacrylate, 6g of butyl acrylate and 2g of hydroxyethyl acrylate were placed in a glass holding container.
2) Absolute ethanol was added thereto and mixed, and mechanically stirred for 5 minutes.
3) Adopting a pressing plate, preheating the pressing plate to 20-25 ℃, uniformly coating the mechanically-stirred base material on the pressing plate, and naturally cooling to obtain the etching barrier layer film.
Preparation method of passivation layer 8
1) Putting 3g of benzoin ethyl ether, 1g of benzophenone and 0.5g of triethanolamine into a container, adding absolute ethyl alcohol, and mechanically stirring for 3 minutes.
2) 0.5g of leveling agent was added from a container, and mixed by hand stirring while heating to 25 ℃.
3) 1g of photosensitizer was added and kept under agitation until it was saturated, to prepare a passivation layer flowing liquid.
The first embodiment is as follows:
a thin film transistor comprises a substrate 1, a grid electrode 2, a grid dielectric layer 3, an active layer 4, a drain electrode 5, a source electrode 6, an etching barrier layer 7, a passivation layer 8, a base 9, grids 10, a micro lens 11 and a reflector plate 12, wherein the grid electrode 2 is arranged in the middle of the top of the substrate 1, the grid dielectric layer 3 is overlapped with two sides of the bottom of the substrate 1 and the top of the grid electrode 2, the bottom of the active layer 4 is overlapped with the top of the grid dielectric layer 3 in a staggered mode, the drain electrode 5 and the source electrode 6 are respectively positioned on two sides of the top of the active layer 4, the etching barrier layer 7 is positioned in the middle of the top of the active layer 4, two sides of the top of the etching barrier layer 7 are respectively overlapped with the bottom of one side, opposite to the drain electrode 5 and the source electrode 6, the passivation layer 8, the top of the drain electrode 5 and the top of the source electrode 6 form a wrapping covering state, the base 9 is positioned in the middle of the inside of the substrate 1, the grids 10 are positioned in the base 9, the grating 10 is uniformly distributed, the three microlenses 11 are respectively located on the right side of the grating 10, and the reflector plate 12 is located on the left side of the grating 10.
The substrate 1 is made of high-temperature-resistant flexible base material.
Compared with the traditional display method which adopts a rigid glass substrate, the flexible display method can realize novel flexible display by adopting the flexible substrate, and has the advantages of being capable of being curled, light in weight and the like.
The etching barrier layer 7 and the passivation layer 8 comprise the following raw materials in parts by weight: 1.32-4.3g of epoxy acrylate, 6-7g of polyurethane acrylate, 4-8g of methyl methacrylate, 6-8g of butyl acrylate, 2-7g of hydroxyethyl acrylate, 3-5g of benzoin ethyl ether, 1-3g of benzophenone, 0.5-1g of triethanolamine, 0.5-1.5g of a leveling agent and 1-2g of a photo sensitizer, and the method comprises the following steps:
preparation method of etching barrier layer 7
1) 2.45g of epoxy acrylate, 6.5g of urethane acrylate, 5g of methyl methacrylate, 7g of butyl acrylate and 3.5g of hydroxyethyl acrylate were put in a glass holding container.
2) Absolute ethanol was added thereto and mixed, and mechanically stirred for 5 minutes.
3) And (3) preheating the etching barrier layer to 22 ℃ by using a pressing plate, uniformly coating the mechanically-stirred base material on the pressing plate, and naturally cooling to obtain the etching barrier layer film.
Preparation method of passivation layer 8
1) 3.5g of benzoin ethyl ether, 1.5g of benzophenone and 0.7g of triethanolamine are put into a container, and absolute ethyl alcohol is added to the container to be mechanically stirred for 3 minutes.
2) 0.5g of leveling agent was added from a container, and mixed by hand stirring while heating to 25 ℃.
3) 1.5g of the photosensitizer was added and kept under agitation until it was saturated, to prepare a passivation layer flowing liquid.
Example two:
a thin film transistor comprises a substrate 1, a grid electrode 2, a grid dielectric layer 3, an active layer 4, a drain electrode 5, a source electrode 6, an etching barrier layer 7, a passivation layer 8, a base 9, grids 10, a micro lens 11 and a reflector plate 12, wherein the grid electrode 2 is arranged in the middle of the top of the substrate 1, the grid dielectric layer 3 is overlapped with two sides of the bottom of the substrate 1 and the top of the grid electrode 2, the bottom of the active layer 4 is overlapped with the top of the grid dielectric layer 3 in a staggered mode, the drain electrode 5 and the source electrode 6 are respectively positioned on two sides of the top of the active layer 4, the etching barrier layer 7 is positioned in the middle of the top of the active layer 4, two sides of the top of the etching barrier layer 7 are respectively overlapped with the bottom of one side, opposite to the drain electrode 5 and the source electrode 6, the passivation layer 8, the top of the drain electrode 5 and the top of the source electrode 6 form a wrapping covering state, the base 9 is positioned in the middle of the inside of the substrate 1, the grids 10 are positioned in the base 9, the grating 10 is uniformly distributed, the three microlenses 11 are respectively located on the right side of the grating 10, and the reflector plate 12 is located on the left side of the grating 10.
The etching barrier layer 7 and the passivation layer 8 comprise the following raw materials in parts by weight: 1.32-4.3g of epoxy acrylate, 6-7g of polyurethane acrylate, 4-8g of methyl methacrylate, 6-8g of butyl acrylate, 2-7g of hydroxyethyl acrylate, 3-5g of benzoin ethyl ether, 1-3g of benzophenone, 0.5-1g of triethanolamine, 0.5-1.5g of a leveling agent and 1-2g of a photo sensitizer, and the method comprises the following steps:
preparation method of etching barrier layer 7
1) 3g of epoxy acrylate, 6.5g of urethane acrylate, 6g of methyl methacrylate, 7.5g of butyl acrylate and 5g of hydroxyethyl acrylate were placed in a glass container.
2) Absolute ethanol was added thereto and mixed, and mechanically stirred for 5 minutes.
3) And (3) preheating the etching barrier layer to 23 ℃ by using a pressing plate, uniformly coating the base material which is uniformly mechanically stirred on the pressing plate, and naturally cooling to obtain the etching barrier layer film.
Preparation method of passivation layer 8
1) 4g of benzoin ethyl ether, 2g of benzophenone and 0.8g of triethanolamine are put into a container, and absolute ethyl alcohol is added to the container to be mechanically stirred for 3 minutes.
2) 1g of leveling agent is added into a container, and the mixture is mixed by adopting a manual stirring mode and is heated to 25 ℃.
3) 1.5g of the photosensitizer was added and kept under agitation until it was saturated, to prepare a passivation layer flowing liquid.
Example three:
a thin film transistor comprises a substrate 1, a grid 2, a grid dielectric layer 3, an active layer 4, a drain 5, a source 6, an etching barrier layer 7, a passivation layer 8, a base 9, grids 10, a micro lens 11 and a reflector 12, wherein the grid 2 is arranged in the middle of the top of the substrate 1, the grid dielectric layer 3 is overlapped with two sides of the bottom of the substrate 1 and the top of the grid 2, the bottom of the active layer 4 is overlapped with the top of the active layer 3 in a staggered mode, the drain 5 and the source 6 are respectively positioned on two sides of the top of the active layer 4, the etching barrier layer 7 is positioned in the middle of the top of the active layer 4, two sides of the top of the etching barrier layer 7 are respectively overlapped with the bottom of one side, opposite to the drain 5 and the source 6, the passivation layer 8, the top of the drain 5 and the top of the source 6 form a wrapping covering state, the base 9 is positioned in the middle of the inside of the substrate 1, the grids 10 are positioned in the base 9, and the grids 10 are uniformly distributed, three microlenses 11 are respectively located on the right side of the grating 10, and a reflective sheet 12 is located on the left side of the grating 10.
The etching barrier layer 7 and the passivation layer 8 comprise the following raw materials in parts by weight: 1.32-4.3g of epoxy acrylate, 6-7g of polyurethane acrylate, 4-8g of methyl methacrylate, 6-8g of butyl acrylate, 2-7g of hydroxyethyl acrylate, 3-5g of benzoin ethyl ether, 1-3g of benzophenone, 0.5-1g of triethanolamine, 0.5-1.5g of a leveling agent and 1-2g of a photo sensitizer, and the method comprises the following steps:
preparation method of etching barrier layer 7
1) 4.3g of epoxy acrylate, 7g of urethane acrylate, 7g of methyl methacrylate, 78g of butyl acrylate and 6g of hydroxyethyl acrylate were placed in a glass holding container.
2) Absolute ethanol was added thereto and mixed, and mechanically stirred for 5 minutes.
3) And (3) preheating the etching barrier layer to 25 ℃ by using a pressing plate, uniformly coating the base material which is uniformly mechanically stirred on the pressing plate, and naturally cooling to obtain the etching barrier layer film.
Preparation method of passivation layer 8
1) Putting 5g of benzoin ethyl ether, 2.5g of benzophenone and 1g of triethanolamine into a container, adding absolute ethyl alcohol, and mechanically stirring for 3 minutes.
2) 1.5g of leveling agent was added from a container, and mixed by hand stirring while warming to 25 ℃.
3) 2g of photosensitizer was added and kept under agitation until it was saturated, to prepare a passivation layer flowing liquid.
In summary, the arrangement of the etching barrier layer 7 and the passivation layer 8 can achieve the effect of avoiding the influence of the over-etching step of the source electrode and the drain electrode in the direct patterning process on the oxide semiconductor active layer and further preventing the device characteristics from being deteriorated no matter the dry etching or the wet etching is adopted, the light transmittance of the substrate 1 is changed through the grating 10, the phenomenon that the oxide TFT device characteristics are degraded under the illumination condition is avoided, in addition, the transfer characteristics of the device under NBS under illumination are obviously negatively drifted, and thus the imaging effect of the thin film transistor is improved.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (6)
1. A thin film transistor comprises a substrate (1), a grid electrode (2), a grid dielectric layer (3), an active layer (4), a drain electrode (5), a source electrode (6), an etching barrier layer (7), a passivation layer (8), a substrate (9), a grid (10), a micro lens (11) and a reflector plate (12), and is characterized in that: the grid electrode (2) is arranged in the middle of the top of the substrate (1), the grid dielectric layer (3) is overlapped with the two sides of the bottom of the substrate (1) and the top of the grid electrode (2), the bottom of the active layer (4) is overlapped with the top of the grid dielectric layer (3) in a staggered mode, the drain electrode (5) and the source electrode (6) are respectively arranged on the two sides of the top of the active layer (4), the etching barrier layer (7) is arranged in the middle of the top of the active layer (4), the two sides of the top of the etching barrier layer (7) are respectively overlapped with the bottom of one side, opposite to the drain electrode (5) and the source electrode (6), the passivation layer (8), the top of the drain electrode (5) and the top of the source electrode (6) form a wrapping covering state, the substrate (9) is arranged in the middle of the inside of the substrate (1), the grids (10) are arranged inside the substrate (9), and the grids (10) are in an evenly distributed state, the three micro lenses (11) are respectively positioned on the right side of the grating (10), and the reflector plate (12) is positioned on the left side of the grating (10).
2. A thin film transistor according to claim 1, wherein: the substrate (1) is a glass substrate, a quartz substrate and a high-temperature-resistant flexible substrate.
3. A thin film transistor according to claim 1, wherein: the vertical cross-sectional shape of the grids (10) is an equilateral trapezoid, and the spacing between the grids (10) is 30 to 60 μm.
4. A thin film transistor according to claim 1, wherein: the cross section of the reflector plate (12) is rectangular or trapezoidal, a single reflector plate (12) is located at the adjacent opposite position between two microlenses (11), the distance between the two reflector plates (12) is 24-32 mu m, and a gap between the two reflector plates (12) is a light transmission area.
5. The thin film transistor of claim 1, wherein the etching barrier layer (7) and the passivation layer (8) are prepared by the following raw materials in parts by weight: 1.32-4.3g of epoxy acrylate, 6-7g of polyurethane acrylate, 4-8g of methyl methacrylate, 6-8g of butyl acrylate, 2-7g of hydroxyethyl acrylate, 3-5g of benzoin ethyl ether, 1-3g of benzophenone, 0.5-1g of triethanolamine, 0.5-1.5g of a leveling agent and 1-2g of a light sensitizer.
6. A thin film transistor according to claim 5, characterized in that the method for preparing the etch stop layer (7) and the passivation layer (8) comprises the following steps:
method for preparing etching barrier layer (7)
1) 1.32g of epoxy acrylate, 6g of polyurethane acrylate, 4g of methyl methacrylate, 6g of butyl acrylate and 2g of hydroxyethyl acrylate are put into a glass holding container;
2) adding absolute ethyl alcohol for mixing, and mechanically stirring for 5 minutes;
3) adopting a pressing plate, preheating the pressing plate to 20-25 ℃, uniformly coating the mechanically-stirred uniform base material on the pressing plate, and naturally cooling to obtain an etching barrier layer film;
method for producing a passivation layer (8)
1) Putting 3g of benzoin ethyl ether, 1g of benzophenone and 0.5g of triethanolamine into a container, adding absolute ethyl alcohol, and mechanically stirring for 3 minutes;
2) adding 0.5g of leveling agent into a container, mixing by adopting a manual stirring mode, and simultaneously heating to 25 ℃;
3) 1g of photosensitizer was added and kept under agitation until it was saturated, to prepare a passivation layer flowing liquid.
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