CN109841256A - Flash memory reference circuit - Google Patents
Flash memory reference circuit Download PDFInfo
- Publication number
- CN109841256A CN109841256A CN201711230684.4A CN201711230684A CN109841256A CN 109841256 A CN109841256 A CN 109841256A CN 201711230684 A CN201711230684 A CN 201711230684A CN 109841256 A CN109841256 A CN 109841256A
- Authority
- CN
- China
- Prior art keywords
- pmos tube
- current
- electric current
- temperature coefficient
- tube
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Read Only Memory (AREA)
Abstract
The invention discloses a kind of flash memory reference circuits, comprising: positive temperature coefficient current module is positive temperature coefficient current for generating the first electric current, the first electric current；Negative temperature parameter current module is negative temperature parameter current for generating the second electric current, the second electric current；The first end of control module is electrically connected with the first end of positive temperature coefficient current module, the second end of control module is electrically connected with the first end of negative temperature parameter current module, the third end of control module is electrically connected with the second end of negative temperature parameter current module, control module is used for according to the first electric current and the second electric current, it generates reference current to be exported by the 4th end of control module, the temperature coefficient of reference current is positive temperature coefficient, negative temperature coefficient or zero-temperature coefficient.The embodiment of the invention provides a kind of flash memory reference circuits, by positive temperature coefficient current module, negative temperature parameter current module and control module, to obtain the reference current of different temperature coefficients.
Description
Technical field
The present embodiments relate to non-volatile memory technologies field more particularly to a kind of flash memory reference circuits.
Background technique
With the development of consumption electronic product market, flash memory is as main memory in products such as mobile phone, digital cameras
In be widely applied, market scale is constantly expanding.
Read operation in the prior art is actually to choose the storage unit to be read, voltage on its gate plus centainly,
Add certain voltage in drain electrode, then the reference current that the drain current of storage unit and reference circuit generate is compared, from
And obtaining storage unit is programming state and erase status.And in the prior art due to temperature or reading circuit and reference circuit
In include the factors such as device difference, the temperature coefficient and storage unit that will cause the reference current of reference circuit generation read
The temperature coefficient of the drain current taken mismatches, then producing the drain current of storage unit and reference circuit in read operation
Raw reference current compares, and obtaining storage unit is that programming state and erase status can also have with the actual state of storage unit
Deviation.
A kind of reference circuit is needed, can produce the reference current of different temperature coefficients, such as positive temperature system can be generated
Several reference currents, and the reference current of negative temperature coefficient can be generated, moreover it is possible to the reference current of zero-temperature coefficient is generated, it is such
Reference circuit can produce the reference current of different temperature coefficients, so as to the temperature coefficient of the drain current read with storage unit
Match, so that the read operation for storage unit is more accurate.
Summary of the invention
In view of this, the ginseng of different temperature coefficients can be obtained the embodiment of the invention provides a kind of flash memory reference circuit
Electric current is examined, so that when being read to storage unit, the temperature coefficient of reference current and the temperature coefficient for reading electric current
It is able to maintain consistent.
The embodiment of the invention provides a kind of flash memory reference circuit, positive temperature coefficient current module, the positive temperature coefficients
Current module is positive temperature coefficient current for generating the first electric current, first electric current；
Negative temperature parameter current module, the negative temperature parameter current module is for generating the second electric current, second electricity
Stream is negative temperature parameter current；
Control module, the first end of the control module are electrically connected with the first end of the positive temperature coefficient current module,
The second end of the control module is electrically connected with the first end of the negative temperature parameter current module, the third of the control module
End is electrically connected with the second end of the negative temperature parameter current module, and the control module is used for according to first electric current and institute
The second electric current is stated, reference current is generated and is exported by the 4th end of the control module, the temperature coefficient of the reference current is
Positive temperature coefficient, negative temperature coefficient or zero-temperature coefficient.
Optionally, the control module includes the first current mirror unit, the second current mirror unit, third current mirror
Unit and arithmetic element；
The first current mirror unit includes the first PMOS tube and the second PMOS tube；
The second current mirror unit includes third PMOS tube and the 4th PMOS tube；
The third current mirror unit includes first PMOS tube and the 5th PMOS tube；
The arithmetic element includes the 4th PMOS tube and the 5th PMOS tube；
The electrical connection of the grid of the grid of first PMOS tube and the 2nd PMOS；
The grid of the third PMOS tube and the electrical connection of the grid of the 4th PMOS tube；
The grid of first PMOS tube and the electrical connection of the grid of the 5th PMOS tube；
The source electrode of first PMOS tube, the source electrode of second PMOS tube, the source electrode of the third PMOS tube, described
The source electrode of four PMOS tube and the source electrode of the 5th PMOS tube respectively with the first power electric connection；
First end of the drain electrode of first PMOS tube as the control module, with the positive temperature coefficient current module
First end electrical connection；
Second end of the drain electrode of second PMOS tube as the control module, with the negative temperature parameter current module
First end electrical connection；
Third end of the drain electrode of the third PMOS tube as the control module, with the negative temperature parameter current module
Second end electrical connection；
The drain electrode of 4th PMOS tube and the drain electrode of the 5th PMOS tube are electrically connected, the as the control module
Four ends, for exporting the reference current；
The corresponding breadth length ratio of channel of 5th PMOS tube breadth length ratio corresponding with the channel of first PMOS tube
Ratio is the first weighted value；
The corresponding breadth length ratio of channel of 4th PMOS tube breadth length ratio corresponding with the channel of the third PMOS tube
Ratio is the second weighted value；
The reference current be sum of products of first electric current with first weighted value described in the second electric current with it is described
The sum of products of second weighted value.
Optionally, the positive temperature coefficient current module includes first resistor and the first NMOS tube；
The drain electrode of first NMOS tube is electrically connected with the drain and gate of first PMOS tube respectively；
The source electrode of first NMOS tube is electrically connected with the first end of the first resistor；
The second end of the first resistor is grounded；
The grid of first NMOS tube is electrically connected with reference voltage source, and the reference voltage source is zero-temperature coefficient voltage
Source, the reference voltage that the reference voltage source provides make first NMOS tube be in sub-threshold region.
Optionally, the negative temperature parameter current module includes the second NMOS tube, third NMOS tube and second resistance；
The source electrode of second NMOS tube is grounded, the drain electrode leakage with second PMOS tube respectively of second NMOS tube
The electrical connection of the grid of pole and the third NMOS tube；
The drain electrode of the third NMOS tube is electrically connected with the grid of the third PMOS tube and drain electrode respectively；
The source electrode of the third NMOS tube first end with the grid of second NMOS tube and the second resistance respectively
Electrical connection；
The second end of the second resistance is grounded；
The third NMOS tube is in saturation region.
Optionally, the corresponding length of channel of first PMOS tube length corresponding with the channel of the 5th PMOS tube
It is equal；
The corresponding length of channel of third PMOS tube equal length corresponding with the channel of the 4th PMOS tube；
Ratio between the threshold voltage of first NMOS tube and the resistance value of the first resistor is third electric current；
The ratio of the resistance value of the threshold voltage and second resistance of second NMOS tube is the 4th electric current；
The product of the third electric current and first weighted value is equal to the 4th electric current and second weighted value
Product；
The temperature coefficient of the reference current is zero-temperature coefficient.
Optionally, the corresponding length of channel of first PMOS tube length corresponding with the channel of the 5th PMOS tube
It is equal；
The corresponding length of channel of third PMOS tube equal length corresponding with the channel of the 4th PMOS tube；
Ratio between the threshold voltage of first NMOS tube and the resistance value of the first resistor is third electric current；
The ratio of the resistance value of the threshold voltage and second resistance of second NMOS tube is the 4th electric current；
The product of the third electric current and first weighted value is greater than the 4th electric current and second weighted value
Product；
The temperature coefficient of the reference current is positive temperature coefficient.
Optionally, the corresponding length of channel of first PMOS tube length corresponding with the channel of the 5th PMOS tube
It is equal；
The corresponding length of channel of third PMOS tube equal length corresponding with the channel of the 4th PMOS tube；
Ratio between the threshold voltage of first NMOS tube and the resistance value of the first resistor is third electric current；
The ratio of the resistance value of the threshold voltage and second resistance of second NMOS tube is the 4th electric current；
The product of the third electric current and first weighted value is less than the 4th electric current and second weighted value
Product；
The temperature coefficient of the reference current is negative temperature coefficient.
The flash memory reference circuit that the technical solution of the embodiment of the present invention provides, including positive temperature coefficient current module, subzero temperature
Coefficient current module and control module are spent, the first electric current is generated by positive temperature coefficient current module, the first electric current is positive temperature
Coefficient current, negative temperature parameter current module are negative temperature parameter current, control module for generating the second electric current, the second electric current
For can produce the reference current of different temperature coefficients, the temperature coefficient of reference current according to the first electric current and the second electric current
For positive temperature coefficient, negative temperature coefficient or zero-temperature coefficient, the technical solution of the embodiment of the present invention is by obtaining different temperatures
The reference current of coefficient, so that when being read to storage unit, temperature coefficient and the reading electric current of reference current
Temperature coefficient is able to maintain unanimously.Solves the device in the prior art due to including in temperature or reading circuit and reference circuit
The factors such as part difference, the drain electrode electricity that the temperature coefficient and storage unit that will cause the reference current of reference circuit generation are read
The temperature coefficient of stream mismatches, then the reference for generating the drain current of storage unit and reference circuit is electric in read operation
Stream compares, obtain storage unit be programming state and erase status also can with the actual state of storage unit is devious asks
Topic.
Detailed description of the invention
Fig. 1 is a kind of structural schematic diagram for flash memory reference circuit that the embodiment of the present invention one provides；
Fig. 2 is a kind of structural schematic diagram of flash memory reference circuit provided by Embodiment 2 of the present invention；
Fig. 3 is the structural schematic diagram of another flash memory reference circuit provided by Embodiment 2 of the present invention；
Fig. 4 is the structural schematic diagram of another flash memory reference circuit provided by Embodiment 2 of the present invention；
Fig. 5 is the structural schematic diagram of another flash memory reference circuit provided by Embodiment 2 of the present invention；
Fig. 6 is the structural schematic diagram of flash memory reading circuit in the prior art.
Specific embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention rather than limiting the invention.It also should be noted that in order to just
Only the parts related to the present invention are shown in description, attached drawing rather than entire infrastructure.
Embodiment one
Fig. 1 is a kind of flash memory reference circuit provided in an embodiment of the present invention, which includes: positive temperature coefficient
Current module 100, positive temperature coefficient current module 100 are positive temperature coefficient current for generating the first electric current, the first electric current.It is negative
Temperature coefficient current module 200, negative temperature parameter current module 200 are negative temperature system for generating the second electric current, the second electric current
Number electric current.The first end of control module 300, control module 300 is electrically connected with the first end of positive temperature coefficient current module 100,
The second end of control module 300 is electrically connected with the first end of negative temperature parameter current module 200, the third end of control module 300
It being electrically connected with the second end of negative temperature parameter current module 200, control module 300 is used for according to the first electric current and the second electric current,
It generates reference current and is exported by the 4th end of control module 300, the temperature coefficient of reference current is positive temperature coefficient, negative temperature
Coefficient or zero-temperature coefficient.
Temperature coefficient is the rate that the physical attribute of material changes with temperature change.Temperature coefficient (temperature
Coefficient) refer in temperature change 1K, the opposite variation of specific physical quantity.
In the present embodiment, positive temperature coefficient electric current is meant that the numerical value of electric current can increase as the temperature rises；
Negative temperature parameter current is meant that the numerical value of electric current can reduce as the temperature rises；Zero-temperature coefficient electrical current is meant that
The numerical value of electric current is held essentially constant with the variation of temperature.
Illustratively, the first electric current is positive temperature coefficient current, then the numerical value of the first electric current as the temperature rises and
It increases, the second electric current is negative temperature parameter current, then the numerical value of the second electric current reduces as the temperature rises.First electric current
After being handled with the second electric current by control module, available reference current, the reference circuit in the present embodiment can be produced
The reference current of raw different temperature coefficients.It is exemplary after control module carries out processing completion to the first electric current and the second electric current
, it can be by adjusting the ratio of the first electric current and the second electric current in reference current, to generate the reference electricity of different temperature coefficients
Stream.
The flash memory reference circuit that the technical solution of the embodiment of the present invention provides, including positive temperature coefficient current module, subzero temperature
Coefficient current module and control module are spent, the first electric current is generated by positive temperature coefficient current module, the first electric current is positive temperature
Coefficient current, negative temperature parameter current module are negative temperature parameter current, control module for generating the second electric current, the second electric current
For can produce the reference current of different temperature coefficients, the temperature coefficient of reference current according to the first electric current and the second electric current
For positive temperature coefficient, negative temperature coefficient or zero-temperature coefficient, the technical solution of the embodiment of the present invention is by obtaining different temperatures
The reference current of coefficient, so that when being read to storage unit, temperature coefficient and the reading electric current of reference current
Temperature coefficient is able to maintain unanimously.Solves the device in the prior art due to including in temperature or reading circuit and reference circuit
The factors such as part difference, the drain electrode electricity that the temperature coefficient and storage unit that will cause the reference current of reference circuit generation are read
The temperature coefficient of stream mismatches, then the reference for generating the drain current of storage unit and reference circuit is electric in read operation
Stream compares, obtain storage unit be programming state and erase status also can with the actual state of storage unit is devious asks
Topic.
Embodiment two
The embodiment of the present invention on the basis of the above embodiments, for the control module 300 in reference circuit, positive temperature system
The device and connection relationship that number current module 100 and negative temperature parameter current module 200 include have carried out further restriction.
Reference circuit provided in this embodiment, it is shown in Figure 2.
Wherein, control module 300 includes the first current mirror unit 301, the second current mirror unit 302, third electric current
Mirror image unit 303 and arithmetic element 304.
Mirror image unit includes mirror image circuit, and mirror image circuit is typically all what discrete device was built, mainly triode or MOS
Pipe, output are mainly electric current, and image current output is constant, are generally used for current source, because efferent duct is the mirror of control feedback pipe
Picture, therefore export electric current and do not change with load under a fixed load and change.
Referring to Fig. 3, optionally, the first current mirror unit 301 includes the first PMOS tube 3011 and the second PMOS tube 3012.
Second current mirror unit 302 includes third PMOS tube 3021 and the 4th PMOS tube 3022.Third current mirror unit 303 includes
First PMOS tube 3011 and the 5th PMOS tube 3031.Arithmetic element 304 includes the 4th PMOS tube 3032 and the 5th PMOS tube 3031；
The grid of first PMOS tube 3011 and the electrical connection of the grid of the second PMOS tube 3012, are connected electrically in figs. 3 and 4
Vptat；The grid of third PMOS tube 3021 and the electrical connection of the grid of the 4th PMOS tube 3022, are electrically to connect in figs. 3 and 4
It is connected to Vctat；The grid of first PMOS tube 3011 and the grid electrical connection of the 5th PMOS tube 3031, are electricity in figs. 3 and 4
Gas is connected to Vptat；The source electrode of first PMOS tube 3011, the source electrode of the second PMOS tube 3012, third PMOS tube 3021 source electrode,
The source electrode of 4th PMOS tube 3022 and the source electrode of the 5th PMOS tube 3031 are electrically connected with the first power supply 400 respectively；First PMOS tube
First end of 3011 drain electrode as control module 300, is electrically connected with the first end of positive temperature coefficient current module 100；Second
Second end of the drain electrode of PMOS tube 3012 as control module 300, is electrically connected with the first end of negative temperature parameter current module 200
It connects；Third end of the drain electrode of third PMOS tube 3021 as control module, the second end electricity with negative temperature parameter current module 200
Connection；The drain electrode of 4th PMOS tube 3022 and the drain electrode of the 5th PMOS tube 3031 are electrically connected, and as the 4th end of control module, are used
In output reference current (Iref)；The corresponding breadth length ratio of channel of 5th PMOS tube 3031 and 3011 channels pair of the first PMOS tube
The ratio for the breadth length ratio answered is the first weighted value；The corresponding breadth length ratio of channel and third PMOS tube 3021 of 4th PMOS tube 3022
The corresponding breadth length ratio of channel ratio be the second weighted value；Reference current is the sum of products the of the first electric current and the first weighted value
The sum of products of two electric currents and the second weighted value.
Due to the product of sum of products the second electric current and the second weighted value that reference current is the first electric current and the first weighted value
The sum of.So when any one of the first electric current, the first weighted value, the second electric current and the second weighted value parameter changes
When, all may numerical value to reference current and temperature coefficient have an impact.The temperature of reference current will be introduced respectively below
The case where coefficient is zero-temperature coefficient, positive temperature coefficient and negative temperature coefficient is introduced.Before this, first to positive temperature coefficient
Current module and negative temperature parameter current module are further limited.
Optionally, referring to fig. 4, positive temperature coefficient current module 100 includes first resistor 101 and the first NMOS tube 102；The
The drain electrode of one NMOS tube 102 is electrically connected with the drain and gate of the first PMOS tube 3011 respectively；The source electrode of first NMOS tube 102 with
The first end of first resistor 101 is electrically connected；The second end of first resistor 101 is grounded；Grid and the benchmark electricity of first NMOS tube 102
Potential source 103 is electrically connected, and reference voltage source 103 is zero-temperature coefficient voltage source, makes its work by designing the first NMOS tube size
In sub-threshold region.
By taking NMOS tube as an example, threshold voltage (Vth) is 0.7V, and sub-threshold region is exactly to make to be formed instead in mos pipe trench road
Type layer still forms strong inversion layer not yet, i.e., as added gate-source voltage Vgs < Vth,
In the present embodiment, the reference voltage (Vbg) that reference voltage source 103 provides subtracts the threshold voltage of the first NMOS tube
(Vth) ratio between the value between, with first resistor 101 is the numerical value of the first electric current.It is provided due to reference voltage source 103
The voltage of reference voltage (Vbg) zero-temperature coefficient, the threshold voltage (Vth) of the first NMOS tube are the voltage of negative temperature coefficient, the
One resistance, 101 temperature characterisitic can be ignored relative to the temperature characterisitic of the first NMOS tube threshold voltage, so the first electric current
It is the electric current of positive temperature coefficient, the first electric current is indicated in Fig. 4 with Iptat.
Optionally, referring to fig. 4, negative temperature parameter current module 200 includes the second NMOS tube 201,202 and of third NMOS tube
Second resistance 203；The source electrode of second NMOS tube 201 is grounded, the drain electrode of the second NMOS tube 201 respectively with the second PMOS tube 3012
The grid of drain electrode and third NMOS tube 3021 is electrically connected；The grid with third PMOS tube 3021 respectively that drain of third NMOS tube 202
Pole and drain electrode electrical connection；The source electrode of third NMOS tube 202 respectively with the grid of the second NMOS tube 201 and second resistance 203
One end electrical connection；The second end of second resistance 203 is grounded；Third NMOS tube 202 is in saturation region.
In the present embodiment, the gate source voltage of the second NMOS tube is about the threshold voltage of the second NMOS tube.Second NMOS tube
201 threshold voltage (Vth) and the ratio of second resistance 203 are the value of the second electric current.The threshold voltage of second NMOS tube 201
(Vth) be negative temperature coefficient voltage, temperature characterisitic of 101 temperature characterisitic of second resistance relative to the first NMOS tube threshold voltage
It can be ignored, so the second electric current is the electric current of negative temperature coefficient.Second electric current is indicated in Fig. 4 with Ictat.
Optionally, based on the above technical solution, the corresponding length of the channel of the first PMOS tube and the 5th PMOS tube
The corresponding equal length of channel；The corresponding length of the channel of third PMOS tube length phase corresponding with the channel of the 4th PMOS tube
Deng；Ratio between the threshold voltage of first NMOS tube and the resistance value of first resistor is third electric current；The threshold value of second NMOS tube
The ratio of the resistance value of voltage and second resistance is the 4th electric current；The product of third electric current and the first weighted value be equal to the 4th electric current with
When the product of the second weighted value, the temperature coefficient of reference current is zero-temperature coefficient.The product of third electric current and the first weighted value
When greater than the product of the 4th electric current and the second weighted value, the temperature coefficient of reference current is positive temperature coefficient.Third electric current and
When the product of one weighted value is less than the product of the 4th electric current and the second weighted value, the temperature coefficient of reference current is negative temperature system
Number.
Illustratively, the corresponding length of the channel length corresponding with the channel of the 5th PMOS tube 3031 of the first PMOS tube 3011
It spends equal；The corresponding width of channel of first PMOS tube 3011 is equal with the corresponding width of channel of the 5th PMOS tube 3031；The
The corresponding length of the channel equal length corresponding with the channel of the 4th PMOS tube 3022 of three PMOS tube 3021, third PMOS tube
The corresponding width of 3021 channel is equal with the corresponding width of channel of the 4th PMOS tube 3022；It can be by adjusting first resistor
And the resistance value size of second resistance, so that the ratio between the threshold voltage of the first NMOS tube 102 and the resistance value of first resistor
(third electric current) and the threshold voltage of the second NMOS tube 201 are equal with ratio (the 4th electric current) of the resistance value of second resistance；With reference to
The temperature coefficient of electric current is zero-temperature coefficient.The corresponding length of the channel of first PMOS tube is corresponding with the channel of the 5th PMOS tube
Equal length；The corresponding width of the channel of first PMOS tube is equal with the corresponding width of channel of the 5th PMOS tube, i.e., the first electricity
Stream is mirrored to the 5th PMOS tube by the first PMOS tube, from the electric current of the drain electrode outflow of the 5th PMOS tube and the number of the first electric current
Be worth it is equal, i.e. the first weighted value be 1.It is similarly, equal from the electric current of the drain electrode outflow of the 4th PMOS tube and the numerical value of the second electric current,
Second weighted value is 1.
Wherein, the ratio between the threshold voltage of the first NMOS tube 102 and the resistance value of first resistor (third electric current) and
The threshold voltage of two NMOS tubes 201 is equal with ratio (the 4th electric current) of the resistance value of second resistance, ensure that finally from operation list
The electric current of the drain electrode outflow of the 4th PMOS tube 3022 and the 5th PMOS tube 3031 of member is benchmark voltage Vbg and first resistor ratio
Value, therefore, in this case, the product of third electric current and the first weighted value multiplies equal to the 4th electric current and the second weighted value
Product, the temperature coefficient of reference current are zero-temperature coefficient.
Optionally, based on the above technical solution, the corresponding length of channel and the 5th of the first PMOS tube 3011
The corresponding equal length of the channel of PMOS tube 3031；The corresponding width of channel of first PMOS tube 3011 and the 5th PMOS tube 3031
The corresponding width of channel ratio be greater than third PMOS tube 3021 channel corresponding width and the 4th PMOS tube 3022 ditch
The ratio of the corresponding width in road；Ratio (third electricity between the threshold voltage of first NMOS tube 102 and the resistance value of first resistor
Stream) and the threshold voltage of the second NMOS tube 201 and ratio (the 4th electric current) of the resistance value of second resistance it is equal；The temperature of reference current
Degree coefficient is positive temperature coefficient.The corresponding length of channel of first PMOS tube 3011 is corresponding with the channel of the 5th PMOS tube 3031
Equal length；The ratio of the corresponding width of the channel width corresponding with the channel of the 5th PMOS tube 3031 of first PMOS tube 3011
Greater than the ratio of the corresponding width of channel of the corresponding width of channel and the 4th PMOS tube 3022 of third PMOS tube 3021, explanation
It is greater than the drain electrode stream from the 4th PMOS tube 3022 from the electric current of drain electrode outflow and the ratio of the first electric current of the 5th PMOS tube 3031
The ratio of electric current and the second electric current out, the first weighted value are greater than the second weighted value.
Wherein, the ratio between the threshold voltage of the first NMOS tube 102 and the resistance value of first resistor (third electric current) and
The threshold voltage of two NMOS tubes 201 is equal with ratio (the 4th electric current) of the resistance value of second resistance, ensure that finally from operation list
The reference current of the outflow of member, referring to formula 1:
Wherein Iref reference current, Vbg are benchmark voltage, and R1 is first resistor resistance value, and m is the first weighted value, n second
Weighted value, R2 are second resistance resistance value, and Vth1 is the threshold voltage of the first NMOS tube, and Vth2 is the threshold value electricity of the second NMOS tube
Pressure.
Therefore, in this case, the product of third electric current and the first weighted value is greater than the 4th electric current and the second weighted value
Product, the temperature coefficient of reference current is positive temperature coefficient.
Optionally, based on the above technical solution, the corresponding length of channel and the 5th of the first PMOS tube 3011
The corresponding equal length of the channel of PMOS tube 3031；The width and the 5th PMOS tube 3031 of the corresponding channel of first PMOS tube 3011
The corresponding width of channel ratio be less than third PMOS tube 3021 channel corresponding width and the 4th PMOS tube 3022 ditch
The ratio of the corresponding width in road；Ratio (third electricity between the threshold voltage of first NMOS tube 102 and the resistance value of first resistor
Stream) and the threshold voltage of the second NMOS tube 201 and ratio (the 4th electric current) of the resistance value of second resistance it is equal；The temperature of reference current
Degree coefficient is negative temperature coefficient.The corresponding length of channel of first PMOS tube 3011 is corresponding with the channel of the 5th PMOS tube 3031
Equal length；The ratio of the corresponding width of the channel width corresponding with the channel of the 5th PMOS tube 3031 of first PMOS tube 3011
Less than the ratio of the corresponding width of channel of the corresponding width of channel and the 4th PMOS tube 3022 of third PMOS tube 3021, explanation
It is less than the drain electrode stream from the 4th PMOS tube 3022 from the electric current of drain electrode outflow and the ratio of the first electric current of the 5th PMOS tube 3031
The ratio of electric current and the second electric current out, the first weighted value is less than the second weighted value.
Wherein, the ratio between the threshold voltage of the first NMOS tube 102 and the resistance value of first resistor and the second NMOS tube 201
Threshold voltage it is equal with the ratio of the resistance value of second resistance, therefore, referring to formula 1, third electric current multiplies with the first weighted value
For product less than the product of the 4th electric current and the second weighted value, the temperature coefficient of reference current is negative temperature coefficient.
It should be noted that above-mentioned technical proposal is to be directed to, the arithmetic element shown in Fig. 4 only includes the 4th PMOS tube
3022 and the case where the 5th PMOS tube 3031.Fig. 5 is illustrative, and showing arithmetic element includes two the 4th PMOS tube 3022
The case where with two the 5th 3031 pipes of PMOS tube.
It should be noted that the second current mirror unit 302 is made of third PMOS tube 3021 and the 4th PMOS tube 3022,
Wherein the second current mirror unit 302 may include at least one the 4th PMOS tube 3022.The embodiment of the present invention is for the second electricity
The particular number of the 4th PMOS tube 3022 is not construed as limiting in traffic mirroring unit, and related technical personnel can according to need concrete condition
Determine the quantity of the 4th PMOS tube 3022.With the increasing for 3022 quantity of the 4th PMOS tube that the second current mirror unit 302 includes
Add, in reference current, the ratio of negative temperature parameter current is risen with it.
Third current mirror unit 303 is made of the first PMOS tube 3011 and the 5th PMOS tube 3031, wherein third electric current
Mirror image unit 303 may include at least one the 5th PMOS tube 3031.The embodiment of the present invention is in third current mirror unit
The particular number of 5th PMOS tube 3031 is not construed as limiting, and related technical personnel can according to need concrete condition and determine the 5th PMOS
The quantity of pipe 3031.With the increase for 3031 quantity of the 5th PMOS tube that third current mirror unit 303 includes, reference current
In, the ratio of positive temperature coefficient electric current rises with it.
Referring to Fig. 6, it should be noted that read operation is that flash memory is most basic, while being also most important operation, and reads logical
Road design be also it is sufficiently complex, read path design superiority and inferiority directly determine read behaviour's function it is whether normal, the property of read path
It can directly determine the reading speed of chip.The storage unit of flash memory is deposited since its unique FGS floating gate structure can store data
Charge difference stored by the floating gate of storage unit means different threshold voltages.If at four ends of storage unit: control gate,
Upper plus suitable voltage, the storage unit of corresponding different threshold voltages have different reading electricity respectively for source electrode, drain electrode and body area
Stream.The storage unit that storage unit can be divided into programmed storage unit according to the difference for reading electric current and be wiped free of.
Corresponding different logical value " 0 " and " 1 " in other words.Therefore the read operation of flash memory really chooses the storage unit to be read to exist
On its control gate plus a voltage, drain electrode add a voltage.The drain current of the storage unit is converted to voltage again, and with a standard
Voltage is compared by a sensitive comparator 600, to obtain a logical value " 0 " or " 1 ".As shown in figure 5, in figure
Icell indicates that the reading electric current of selected storage unit, Iref indicate the reference current that reference circuit generates, and Iref is one
Reference electric current, current/voltage-converted module 500 are the circuit for electric current to be converted to voltage, current/voltage-converted mould
The reading electric current Icell and reference circuit of storage unit the reference current Iref two-way electric current generated are converted to correspondence by block 500
Voltage.
It should be noted that flash memory reference circuit determines storage using reference unit and its reference current in the prior art
Unit state in which in read-write operation.However, reference unit may be subjected to the influence of various factors, for example, power supply
Disturbance is likely to result in the variation for the voltage being added on reference unit, so as to cause the variation of reference cell current.It is even more serious
, since reference unit itself may be after multi-pass operation, performance changes, and designed reference current will occur
Drift, causes memory can not work normally, greatly reduces the service life of memory.
Flash memory reference circuit provided in an embodiment of the present invention replaces reference memory unit with resistance using metal-oxide-semiconductor to produce
The problem of raw reference current, the threshold voltage for solving multiple reading reference memory unit change, and threshold voltage becomes larger.
And the reference current in the present embodiment due to be positive temperature coefficient electric current and negative temperature coefficient electric current adduction operation, also
It can produce the different reference current of temperature coefficient, so that when being read to storage unit, the temperature of reference current
Coefficient with read electric current temperature coefficient be able to maintain it is consistent so that the read operation for storage unit is more accurate.
Note that the above is only a better embodiment of the present invention and the applied technical principle.It will be appreciated by those skilled in the art that
The invention is not limited to the specific embodiments described herein, be able to carry out for a person skilled in the art it is various it is apparent variation,
It readjusts, be combined with each other and substitutes without departing from protection scope of the present invention.Therefore, although by above embodiments to this
Invention is described in further detail, but the present invention is not limited to the above embodiments only, is not departing from present inventive concept
In the case of, it can also include more other equivalent embodiments, and the scope of the invention is determined by the scope of the appended claims.
Claims (7)
1. a kind of flash memory reference circuit characterized by comprising
Positive temperature coefficient current module, the positive temperature coefficient current module are for generating the first electric current, first electric current
Positive temperature coefficient electric current；
Negative temperature parameter current module, the negative temperature parameter current module are for generating the second electric current, second electric current
Negative temperature parameter current；
Control module, the first end of the control module is electrically connected with the first end of the positive temperature coefficient current module, described
The second end of control module is electrically connected with the first end of the negative temperature parameter current module, the third end of the control module with
The second end of the negative temperature parameter current module is electrically connected, and the control module is used for according to first electric current and described the
Two electric currents generate reference current and are simultaneously exported by the 4th end of the control module, and the temperature coefficient of the reference current is positive temperature
Spend coefficient, negative temperature coefficient or zero-temperature coefficient.
2. circuit according to claim 1, which is characterized in that
The control module includes the first current mirror unit, the second current mirror unit, third current mirror unit and operation
Unit；
The first current mirror unit includes the first PMOS tube and the second PMOS tube；
The second current mirror unit includes third PMOS tube and the 4th PMOS tube；
The third current mirror unit includes first PMOS tube and the 5th PMOS tube；
The arithmetic element includes the 4th PMOS tube and the 5th PMOS tube；
The electrical connection of the grid of the grid of first PMOS tube and the 2nd PMOS；
The grid of the third PMOS tube and the electrical connection of the grid of the 4th PMOS tube；
The grid of first PMOS tube and the electrical connection of the grid of the 5th PMOS tube；
The source electrode of first PMOS tube, the source electrode of second PMOS tube, the source electrode of the third PMOS tube, the described 4th
The source electrode of PMOS tube and the source electrode of the 5th PMOS tube respectively with the first power electric connection；
First end of the drain electrode as the control module of first PMOS tube, the with the positive temperature coefficient current module
One end electrical connection；
Second end of the drain electrode as the control module of second PMOS tube, the with the negative temperature parameter current module
One end electrical connection；
Third end of the drain electrode as the control module of the third PMOS tube, the with the negative temperature parameter current module
The electrical connection of two ends；
The drain electrode of 4th PMOS tube and the drain electrode of the 5th PMOS tube are electrically connected, and the as the control module the 4th
End, for exporting the reference current；
The ratio of the corresponding breadth length ratio of channel of 5th PMOS tube breadth length ratio corresponding with the channel of first PMOS tube
For the first weighted value；
The ratio of the corresponding breadth length ratio of channel of 4th PMOS tube breadth length ratio corresponding with the channel of the third PMOS tube
For the second weighted value；
The reference current is the second electric current and described second described in the sum of products of first electric current and first weighted value
The sum of products of weighted value.
3. circuit according to claim 2, which is characterized in that
The positive temperature coefficient current module includes first resistor and the first NMOS tube；
The drain electrode of first NMOS tube is electrically connected with the drain and gate of first PMOS tube respectively；
The source electrode of first NMOS tube is electrically connected with the first end of the first resistor；
The second end of the first resistor is grounded；
The grid of first NMOS tube is electrically connected with reference voltage source, and the reference voltage source is zero-temperature coefficient voltage source,
The reference voltage that the reference voltage source provides makes first NMOS tube be in sub-threshold region.
4. circuit according to claim 2, which is characterized in that
The negative temperature parameter current module includes the second NMOS tube, third NMOS tube and second resistance；
The source electrode of second NMOS tube is grounded, the drain electrode of second NMOS tube respectively with the drain electrode of second PMOS tube and
The grid of the third NMOS tube is electrically connected；
The drain electrode of the third NMOS tube is electrically connected with the grid of the third PMOS tube and drain electrode respectively；
First end of the source electrode of the third NMOS tube respectively with the grid of second NMOS tube and the second resistance is electrically connected
It connects；
The second end of the second resistance is grounded；
The third NMOS tube is in saturation region.
5. circuit according to claim 2, which is characterized in that
The corresponding length of channel of first PMOS tube equal length corresponding with the channel of the 5th PMOS tube；
The corresponding length of channel of third PMOS tube equal length corresponding with the channel of the 4th PMOS tube；
Ratio between the threshold voltage of first NMOS tube and the resistance value of the first resistor is third electric current；
The ratio of the resistance value of the threshold voltage and second resistance of second NMOS tube is the 4th electric current；
The product of the third electric current and first weighted value is equal to the product of the 4th electric current and second weighted value；
The temperature coefficient of the reference current is zero-temperature coefficient.
6. circuit according to claim 2, which is characterized in that
The corresponding length of channel of first PMOS tube equal length corresponding with the channel of the 5th PMOS tube；
The corresponding length of channel of third PMOS tube equal length corresponding with the channel of the 4th PMOS tube；
Ratio between the threshold voltage of first NMOS tube and the resistance value of the first resistor is third electric current；
The ratio of the resistance value of the threshold voltage and second resistance of second NMOS tube is the 4th electric current；
The product of the third electric current and first weighted value is greater than the product of the 4th electric current and second weighted value；
The temperature coefficient of the reference current is positive temperature coefficient.
7. circuit according to claim 2, which is characterized in that
The corresponding length of channel of first PMOS tube equal length corresponding with the channel of the 5th PMOS tube；
The corresponding length of channel of third PMOS tube equal length corresponding with the channel of the 4th PMOS tube；
Ratio between the threshold voltage of first NMOS tube and the resistance value of the first resistor is third electric current；
The ratio of the resistance value of the threshold voltage and second resistance of second NMOS tube is the 4th electric current；
The product of the third electric current and first weighted value is less than the product of the 4th electric current and second weighted value；
The temperature coefficient of the reference current is negative temperature coefficient.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711230684.4A CN109841256B (en) | 2017-11-29 | 2017-11-29 | Flash memory reference circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711230684.4A CN109841256B (en) | 2017-11-29 | 2017-11-29 | Flash memory reference circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109841256A true CN109841256A (en) | 2019-06-04 |
| CN109841256B CN109841256B (en) | 2021-01-15 |
Family
ID=66882458
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711230684.4A Active CN109841256B (en) | 2017-11-29 | 2017-11-29 | Flash memory reference circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109841256B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112286337A (en) * | 2020-10-30 | 2021-01-29 | 广州鸿博微电子技术有限公司 | Low-power-consumption bandgap circuit for MCU and implementation method thereof |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5777509A (en) * | 1996-06-25 | 1998-07-07 | Symbios Logic Inc. | Apparatus and method for generating a current with a positive temperature coefficient |
| CN101042591A (en) * | 2006-03-24 | 2007-09-26 | 智原科技股份有限公司 | Method for energy gap reference circuit with lowness supply electric voltage and supplying energy gap energy gap reference current |
| CN103529896A (en) * | 2012-07-02 | 2014-01-22 | 中芯国际集成电路制造(上海)有限公司 | Reference current source and reference current generating circuit |
| CN104460810A (en) * | 2014-12-25 | 2015-03-25 | 武汉众为信息技术有限公司 | Voltage reference circuit fixable in temperature coefficient |
| US20160041571A1 (en) * | 2013-04-01 | 2016-02-11 | Freescale Semiconductor, Inc. | Current generator circuit and method of calibration thereof |
| CN107390771A (en) * | 2017-08-28 | 2017-11-24 | 北京智芯微电子科技有限公司 | The Fiducial reference source circuit with gap of various temperature characteristic reference electric current is produced simultaneously |
-
2017
- 2017-11-29 CN CN201711230684.4A patent/CN109841256B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5777509A (en) * | 1996-06-25 | 1998-07-07 | Symbios Logic Inc. | Apparatus and method for generating a current with a positive temperature coefficient |
| CN101042591A (en) * | 2006-03-24 | 2007-09-26 | 智原科技股份有限公司 | Method for energy gap reference circuit with lowness supply electric voltage and supplying energy gap energy gap reference current |
| CN103529896A (en) * | 2012-07-02 | 2014-01-22 | 中芯国际集成电路制造(上海)有限公司 | Reference current source and reference current generating circuit |
| US20160041571A1 (en) * | 2013-04-01 | 2016-02-11 | Freescale Semiconductor, Inc. | Current generator circuit and method of calibration thereof |
| CN104460810A (en) * | 2014-12-25 | 2015-03-25 | 武汉众为信息技术有限公司 | Voltage reference circuit fixable in temperature coefficient |
| CN107390771A (en) * | 2017-08-28 | 2017-11-24 | 北京智芯微电子科技有限公司 | The Fiducial reference source circuit with gap of various temperature characteristic reference electric current is produced simultaneously |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112286337A (en) * | 2020-10-30 | 2021-01-29 | 广州鸿博微电子技术有限公司 | Low-power-consumption bandgap circuit for MCU and implementation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109841256B (en) | 2021-01-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101800601B1 (en) | Circuits and methods of producing a reference current or voltage | |
| TWI532047B (en) | Bias generator for flash memory and control method thereof | |
| US10013006B2 (en) | Low power tunable reference voltage generator | |
| US7994849B2 (en) | Devices, systems, and methods for generating a reference voltage | |
| KR101027304B1 (en) | Low voltage cmos bandgap reference | |
| US7885132B2 (en) | Semiconductor memory device enhancing reliability in data reading | |
| KR101888724B1 (en) | Curvature compensated band-gap design trimmable at a single temperature | |
| ITRM20060675A1 (en) | TEMPERATURE SENSOR ON CHIP | |
| CN102193578A (en) | Current-mode programmable reference circuits and methods therefor | |
| TWI400884B (en) | Clock integrated circuit | |
| CN109976425A (en) | A kind of low-temperature coefficient reference source circuit | |
| CN102393785A (en) | Low-offset band-gap reference voltage source | |
| CN105280233B (en) | Negative reference voltage generating circuit and negative reference voltage generation system | |
| KR20150079909A (en) | Low voltage current reference generator for a sensing amplifier | |
| TW202135465A (en) | Reference generator and method for providing voltage reference signal at output node using reference signal generator | |
| CN109841256A (en) | Flash memory reference circuit | |
| KR102542290B1 (en) | nA level reference current generation circuit with zero temperature coefficient | |
| CN105786072A (en) | Low dropout regulator, regulation device and driving method thereof | |
| CN109841255A (en) | The selection method and device of the temperature coefficient of flash memory reference current | |
| CN110377095A (en) | A kind of subthreshold value reference voltage generating circuit of super low-power consumption low-voltage Low Drift Temperature | |
| JP2016048871A (en) | Semiconductor device | |
| US10497449B2 (en) | Apparatus and process for controlling sense current in a non-volatile memory | |
| CN105739586A (en) | Current reference source circuit | |
| CN109074115A (en) | The system and method for reference voltage or electric current are provided | |
| US20210012814A1 (en) | Regulated Negative Charge Pump Circuitry and Methods |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: Room 101, Floor 1-5, Building 8, Yard 9, Fenghao East Road, Haidian District, Beijing 100094 Patentee after: Zhaoyi Innovation Technology Group Co.,Ltd. Patentee after: HEFEI GEYI INTEGRATED CIRCUIT Co.,Ltd. Address before: 100083 12 Floors, Block A, Tiangong Building, Science and Technology University, 30 College Road, Haidian District, Beijing Patentee before: GIGADEVICE SEMICONDUCTOR(BEIJING) Inc. Patentee before: HEFEI GEYI INTEGRATED CIRCUIT Co.,Ltd. |