CN109831195B - Key control circuit and mobile terminal - Google Patents
Key control circuit and mobile terminal Download PDFInfo
- Publication number
- CN109831195B CN109831195B CN201910086616.8A CN201910086616A CN109831195B CN 109831195 B CN109831195 B CN 109831195B CN 201910086616 A CN201910086616 A CN 201910086616A CN 109831195 B CN109831195 B CN 109831195B
- Authority
- CN
- China
- Prior art keywords
- key control
- voltage
- control switch
- mos tube
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000003990 capacitor Substances 0.000 claims description 31
- 238000012545 processing Methods 0.000 claims description 13
- 238000000034 method Methods 0.000 abstract description 18
- 238000010586 diagram Methods 0.000 description 13
- 102100036285 25-hydroxyvitamin D-1 alpha hydroxylase, mitochondrial Human genes 0.000 description 10
- 101000875403 Homo sapiens 25-hydroxyvitamin D-1 alpha hydroxylase, mitochondrial Proteins 0.000 description 10
- 238000007599 discharging Methods 0.000 description 5
- 230000001960 triggered effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000009499 grossing Methods 0.000 description 2
- 230000001052 transient effect Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Landscapes
- Electronic Switches (AREA)
Abstract
The application discloses a key control circuit and a mobile terminal, wherein the key control circuit comprises a key control switch, a voltage control unit and an MOS tube, and the voltage control unit is connected in series between the key control switch and the grid electrode of the MOS tube; and the voltage control unit is used for controlling the grid voltage of the MOS tube to be a first potential when the key control switch is closed, triggering the MOS to be conducted, and controlling the grid voltage of the MOS tube to be a second potential when the key control switch is opened, and controlling the MOS tube to be cut off. The key control circuit and the mobile terminal can eliminate the phenomenon that the input voltage of the MOS tube shakes in the process that a user presses or removes the key control switch, and further can avoid the problem that an entity key is misoperation for many times.
Description
Technical Field
The present application relates to the field of terminals, and in particular, to a key control circuit and a mobile terminal.
Background
In order to meet the personalized needs of users and improve the user experience, smart terminal manufacturers are working to produce personalized smart terminals, for example, to produce mobile phones specifically directed to security, mobile phones specifically directed to specific groups of people (e.g., the elderly), and so on.
In order to make users obtain better use experience from these personalized intelligent terminals, manufacturers start to replace part of virtual keys with physical keys, and design corresponding key control circuits to control these physical keys. However, the existing key control circuit has such a drawback that: after the operation of pressing or removing the physical key once is performed, the key control switch in the key control circuit can vibrate for a plurality of times, so that the key control circuit is triggered by mistake instead of only one time, and thus a plurality of times of misoperation on the physical key occurs, and the use experience of a user is reduced.
Fig. 1 shows a conventional key control circuit, which comprises a power supply VDD, a key control switch K1, an NMOS (N-channel metal-oxide-semiconductor) field effect transistor (NMOS for short) N1, a resistor R1 and a central processing unit, wherein a gate of the NMOS N1 is connected in parallel with one end of the resistor R1 and then connected to the power supply VDD, the key control switch K1 is connected in series between the power supply VDD and the gate of the parallel NMOS N1 and the resistor R1, the other end of the resistor R1 and the source of the NMOS N1 are grounded, and a drain of the NMOS N1 is connected with the power supply VDD and the central processing unit respectively; when the key control switch K1 is closed, the power supply VDD supplies voltage to the grid electrode of the NMOS tube N1 to control the NMOS tube to be conducted; when the key control switch K1 is disconnected, the grid electrode of the NMOS tube is grounded to control the NMOS tube to be cut off, and the NMOS tube is turned on or off to trigger the central processing unit to obtain an electric signal for controlling the key to be pressed or removed. Fig. 2 is a diagram showing a comparison of theoretical waveforms and actual waveforms of the input voltage of the NMOS transistor N1 when the user presses or removes the key control switch K1 in the key control circuit shown in fig. 1. As shown in fig. 2, theoretically, when the user's hand presses the key control switch K1, the gate voltage of the NMOS transistor N1 is continuously high to control the NMOS transistor to be turned on, and when the user's hand removes the key control switch K1, the gate voltage of the NMOS transistor N1 is continuously low (equal to zero) to control the NMOS transistor to be turned off, but in practice, when the user's hand presses (closes) or removes (opens) the key control switch K1, the input voltage of the NMOS transistor N1 is dithered due to the mechanical vibration of the key control switch K1, which causes the NMOS transistor N1 to be frequently and erroneously triggered.
Disclosure of Invention
The embodiment of the application provides a key control circuit and a mobile terminal, which are used for solving the problem that in the prior art, a physical key is subjected to multiple misoperation caused by input voltage jitter of an MOS tube.
In order to solve the technical problems, the application is realized as follows:
in a first aspect, a key control circuit is provided, including: a key control switch, a voltage control unit and an MOS tube,
the voltage control unit is connected in series between the key control switch and the grid electrode of the MOS tube;
when the key control switch is turned on, the voltage control unit controls the grid voltage of the MOS tube to be a first potential and triggers the MOS tube to be turned on, and when the key control switch is turned off, the voltage control unit controls the grid voltage of the MOS tube to be a second potential and controls the MOS tube to be turned off.
In a second aspect, there is provided a mobile terminal comprising: the key control circuit of the first aspect.
According to the key control circuit provided by the embodiment of the application, the voltage control unit is connected in series between the grid electrode of the MOS tube and the key control switch, so that the key control circuit can control the grid electrode voltage of the MOS tube to be a first potential when the key control switch is closed, trigger the MOS tube to be conducted, and can control the grid electrode voltage of the MOS tube to be a second potential when the key control switch is disconnected, and control the MOS tube to be cut off. Therefore, the phenomenon that the input voltage of the MOS tube shakes in the process that the user presses or removes the key control switch can be eliminated, and the problem that the entity key is misoperation for many times can be avoided.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the application and do not constitute a limitation on the application. In the drawings:
fig. 1 is a schematic diagram of a key control circuit in the prior art.
Fig. 2 is a diagram showing a comparison between a theoretical waveform and an actual waveform of an input voltage of the NMOS transistor N1 when a user presses or removes the key control switch K1 in the key control circuit shown in fig. 1.
Fig. 3 is a schematic diagram of a key control circuit according to an embodiment of the present application.
Fig. 4 is a schematic diagram of a detailed structure of a key control circuit according to an embodiment of the present application.
Fig. 5 is a schematic diagram of waveforms of input voltage and output voltage of the schmitt trigger.
Fig. 6 is a schematic diagram illustrating a voltage change of the capacitor C1 in the key control circuit shown in fig. 4 during a charge-discharge process.
Fig. 7 is a schematic diagram of the key control circuit shown in fig. 4 for eliminating jitter of the input voltage of the MOS transistor.
Fig. 8 is a second detailed schematic diagram of a key control circuit according to an embodiment of the present application.
Fig. 9 is a second schematic diagram of a key control circuit according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The problem that in the prior art, the entity keys are subjected to multiple misoperation caused by input voltage jitter of the MOS tube is solved. The application provides a key control circuit and a mobile terminal, wherein the mobile terminal comprises, but is not limited to, a mobile phone, an IPAD, a tablet personal computer, a wearable device and other terminal devices for receiving and transmitting wireless communication signals.
The key control circuit provided by the embodiment of the application comprises a first power supply, a second power supply, a key control switch, an MOS tube, a first resistor and a central processing unit, and can also comprise a voltage control unit.
The voltage control unit is connected in series between the key control switch and the grid electrode of the MOS tube; when the key control switch is turned on, the voltage control unit controls the grid voltage of the MOS tube to be a first potential and triggers the MOS tube to be turned on, and when the key control switch is turned off, the voltage control unit controls the grid voltage of the MOS tube to be a second potential and controls the MOS tube to be turned off.
Specifically, one end of the first resistor is connected with the input end of the voltage control unit in parallel and then connected to one end of the key control switch, the other end of the key control switch is connected with the first power supply, and the output end of the voltage control unit is connected with the grid electrode of the MOS tube; the source electrode of the MOS tube and the other end of the first resistor are respectively grounded; and the drain electrode of the MOS tube is respectively connected with the second power supply and the central processing unit.
Alternatively, the first power source and the second power source may be the same power source or may be different power sources.
Optionally, the key control circuit provided by the embodiment of the application may further include a second resistor. The second resistor is connected in series between the second power supply and the drain electrode of the MOS tube, and the second resistor is connected in parallel with the central processing unit.
In the embodiment of the present disclosure, when the key control switch is turned on, it means when the finger of the user presses the key control switch; when the key control switch is turned off, the key control switch is turned off when the finger of the user is removed.
According to the key control circuit provided by the embodiment of the application, the voltage control unit is connected in series between the grid electrode of the MOS tube and the key control switch, so that the key control circuit can control the grid electrode voltage of the MOS tube to be a first potential when the key control switch is closed, trigger the MOS tube to be conducted, and can control the grid electrode voltage of the MOS tube to be a second potential when the key control switch is disconnected, and control the MOS tube to be cut off. Therefore, the phenomenon that the input voltage of the MOS tube shakes in the process that the user presses or removes the key control switch can be eliminated, and the problem that the entity key is misoperation for many times can be avoided.
The key control circuit provided by the embodiment of the application is described in detail below with reference to the accompanying drawings.
In the embodiment of the present application, the MOS transistor may be an NMOS transistor or a PMOS transistor, which is not limited in the embodiment of the present application. However, for convenience of explanation, the description of each embodiment will be made below using the MOS transistor as an NMOS transistor.
Referring to fig. 3, fig. 3 shows one of schematic structural diagrams of a key control circuit according to an embodiment of the present application. As shown in fig. 3, the key control circuit may further include a voltage control unit 3 in addition to the first power supply VDD1, the second power supply VDD2, the key control switch K1, the NMOS transistor N1, the first resistor R1, and the central processing unit 4.
The voltage control unit 3 is connected in series between the key control switch K1 and the grid electrode of the NMOS tube N1; the voltage control unit 3 is configured to control the gate voltage of the NMOS transistor N1 to be a first potential when the key control switch K1 is turned on (i.e., when the user's finger presses the key control switch K1), trigger the NMOS transistor N1 to be turned on, and control the gate voltage of the NMOS transistor N1 to be a second potential when the key control switch K1 is turned off (i.e., when the user's finger removes the key control switch K1), and control the NMOS transistor N1 to be turned off.
Generally, the first potential is greater than the second potential. Specifically, the conduction condition of the NMOS tube is U g ＞U s The cut-off condition of the NMOS tube is U g ＝U s Wherein U is g Is the gate voltage of NMOS tube, U s The source voltage of the NMOS transistor is, as shown in fig. 3, and in the embodiment of the present disclosure, the source of the NMOS transistor N1 is grounded, so in the embodiment of the present disclosure, the first potential may be any potential greater than zero, and the second potential may be equal to zero.
Specifically, as shown in fig. 3, one end of the first resistor R1 is connected in parallel with the input end of the voltage control unit 3 and then connected to one end of the key control switch K1, the other end of the key control switch K1 is connected with the first power supply VDD1, and the output end of the voltage control unit 3 is connected with the gate of the NMOS transistor N1; the source electrode of the NMOS tube N1 and the other end of the first resistor R1 are respectively grounded; the drain electrode of the NMOS tube N1 is respectively connected with the second power supply VDD2 and the central processing unit 4, and the second power supply VDD2 and the central processing unit 4 are in a parallel connection state.
In the embodiment of the present disclosure, the first resistor R1 may play two roles, namely, when the key control switch K1 is turned off, the gate of the NMOS transistor N1 is grounded through the first resistor R1, so that the U of the NMOS transistor N1 g ＝U s =0, thereby turning off the NMOS transistor N1, or controlling the NMOS transistor N1 to be turned off; on the other hand, a voltage dividing circuit is formed on the key control switch K1 side.
Optionally, as shown in fig. 3, a key control circuit provided in an embodiment of the present application may further include a second resistor R2. The second resistor R2 is connected in series between the second power supply VDD2 and the drain of the NMOS transistor N1, and the second resistor R2 is connected in parallel with the cpu 4.
In the embodiment of the present disclosure, the second resistor R2 may also serve as a pull-up resistor to pull up the output voltage of the NMOS transistor N1; on the other hand, it may act as a shunt, limiting the current input into the cpu 4, to protect the cpu 4 from the impact of large currents when the key control switch K1 is closed.
In the embodiment shown in fig. 3, the first power supply VDD1 and the second power supply VDD2 may be the same power supply or different power supplies. In order to simplify the structure of the key control circuit provided by the embodiment of the present application, the first power supply VDD1 and the second power supply VDD2 may be the same power supply.
In the key control circuit provided in the embodiment shown in fig. 3, since a voltage control unit is connected in series between the gate of the MOS transistor and the key control switch, the key control circuit can control the gate voltage of the MOS transistor to be a first potential when the key control switch is turned on, trigger the MOS transistor to be turned on, and can control the gate voltage of the MOS transistor to be a second potential when the key control switch is turned off, and control the MOS transistor to be turned off. Therefore, the phenomenon that the input voltage of the MOS tube shakes in the process that the user presses or removes the key control switch can be eliminated, and the problem that the entity key is misoperation for many times can be avoided.
The key control circuit and the voltage control unit thereof according to the embodiments of the present application are described in more detail below with reference to two more detailed embodiments shown in fig. 4 and 8.
In a first more detailed embodiment, as shown in fig. 4, the voltage control unit 3 in the embodiment shown in fig. 3 may comprise an RC integrating circuit and a schmitt trigger T1.
The input end of the RC integrating circuit is connected in parallel with one end of a first resistor R1 (the first resistor R1 may also be considered as a part of the RC integrating circuit) and then connected to the key control switch K1, the output end of the RC integrating circuit is connected with the input end of the schmitt trigger T1, and the output end of the schmitt trigger T1 is connected with the gate of the NMOS tube N1.
As an example, as shown in fig. 4, the RC integrating circuit may specifically include a third resistor R3 and a capacitor C1. One end of the third resistor R3 is connected with one end of the first resistor R1 in parallel and then connected to the key control switch K1, and the other end of the third resistor R3 is connected with the input end of the Schmitt trigger T1; one pole (positive pole or negative pole) of the capacitor C1 is respectively connected with the other end of the third resistor R3 and the input end of the Schmitt trigger T1, and the other pole (negative pole or positive pole) of the capacitor C1 is grounded.
As can be seen from fig. 4, the RC integrating circuit may further include a first resistor R1, where in the integrating circuit formed by the first resistor R1, the third resistor R3 and the capacitor C1, when the user presses the key control switch K1 with a finger, the key control switch K1 is closed, the RC integrating circuit is turned on, and the capacitor C1 is charged; when the user's finger moves away from the key control switch K1, the key control switch K1 is turned off, the capacitor C1 is discharged through the first resistor R1 and the third resistor R3, and the RC integrating circuit can smooth the change in the high-low potential (level) caused by the vibration of the key control switch K1 during the pressing or moving away process (the specific principle will be explained later).
Specifically, in the embodiment shown in fig. 4, when the key control switch K1 is turned on, the first power supply VDD1 charges the RC integrating circuit and provides an input voltage to the schmitt trigger T1, where the input voltage is used to control the output voltage of the schmitt trigger T1 to be the first potential, so as to control the gate voltage of the NMOS transistor N1 to be the first potential (because the output end of the schmitt trigger T1 is connected to the gate of the NMOS transistor N1, the output voltage of the schmitt trigger T1 is the gate voltage of the NMOS transistor N1); when the key control switch K1 is turned off, the RC integrating circuit provides an input voltage to the schmitt trigger T1 to control the output voltage of the schmitt trigger T1 to be the second potential, thereby controlling the gate voltage of the NMOS transistor N1 to be the second potential.
The charge/discharge time of the capacitor C1 in fig. 4 will be described below.
In the charging phase (when the user presses the key control switch K1 with his finger and the key control switch K1 is closed), assuming that the initial voltage of the capacitor C1 is u=0, the constant charging current is Ir, and the formula of the voltage across the capacitor C1 over time can be expressed as:
accordingly, the calculation formula of the charging time Tr of the capacitor C1 may be:
here, uc is the rated voltage of the capacitor C1, t1 is the charging start time (time when the user just presses the key control switch K1 with his finger), and t2 is the charging end time.
In the discharging phase (when the user removes the finger from the key control switch K1 and the key control switch K1 is turned off), assuming that the capacitor voltage is U, the voltage across the capacitor C1 can be expressed as a formula of time change by discharging the constant current source If:
accordingly, the calculation formula of the discharge time Tf of the capacitor C1 may be:
where Uc is the rated voltage of the capacitor C1, t3 is the discharge start time (the time when the user's finger just removes the key control switch K1), and t4 is the discharge end time.
It will be appreciated that the circuit structure of the RC integrating circuit described above may be not limited to the structure described in the above-mentioned example, but may be other structures, which are not limited in this embodiment of the present application.
Schmitt trigger is the most importantOne of the commonly used shaping circuits, schmitt trigger, has the following characteristics: (1) There are two stable states, the maintenance and transition of which are entirely dependent on the magnitude of the input voltage; (2) Specific voltage transmission characteristics, having two different threshold voltages, one being the forward threshold voltage V T+ The other is the negative threshold voltage V T- The method comprises the steps of carrying out a first treatment on the surface of the (3) The state is inverted with positive feedback process, thus outputting rectangular pulse with steep edge.
FIG. 5 shows the input voltage of the Schmitt trigger (with V I Represented by waveform and output voltage (in V O Represented) a typical schematic of waveforms. As shown in FIG. 5, if the input voltage of the Schmitt trigger is smaller than the forward threshold voltage V during the forward increase T+ The output voltage of the schmitt trigger is maintained at a high level if the input voltage is greater than the forward threshold voltage V T+ The output voltage of the schmitt trigger is turned to a low level; during a negative decrease of the input voltage of the schmitt trigger, if the input voltage is greater than the negative threshold voltage V T- The output voltage of the schmitt trigger is maintained at a low level if the input voltage is less than the negative threshold voltage V T- The output voltage of the Schmitt trigger is turned to a high level, so that the purpose of outputting stable rectangular waves is achieved.
The present embodiment utilizes the above characteristics of the schmitt trigger to achieve the purpose of eliminating the phenomenon that the gate voltage of the NMOS transistor N1 shakes.
Specifically, as can be seen from fig. 4 and 6, when the key control switch K1 is turned on or off, a jitter is generated at a high-low level V R1 When the current level is high, the first power supply VDD1 charges the capacitor C1 through the third resistor R3, and when the current level is low, the charge accumulated on the capacitor C1 is discharged through the first resistor R1 and the third resistor R3, and the resistance value of r1+r3 is greater than the value of R3, so that the discharging time of the capacitor C1 is longer than the charging time, and fig. 6 shows a voltage change diagram of the capacitor C1 in the key control circuit shown in fig. 4 during charging and discharging.
As can be seen from fig. 6When the key control switch K1 is rapidly switched when jittering occurs, the capacitor C1 converts the high and low levels into an analog signal V with a certain waveform through integration C1 An effect of smoothing the jitter level is obtained. In order to better show the smoothing effect, the period of the jitter level is schematically reduced (in practical application, the jitter period may be larger), but the period of the high and low level of the final desired ideal waveform (such as the theoretical waveform shown in fig. 2) will be significantly higher than the period of the jitter, the charging time of the capacitor C1 will also be significantly longer than the period of the high and low level during the jitter, that is, the voltage of the capacitor C1 will be higher than the voltage shown in fig. 6, when the voltage output by the capacitor C1 is input into the schmitt trigger T1, the voltage of the capacitor C1 is output by setting a suitable forward threshold voltage V T+ And negative threshold voltage V T- The fluctuating voltage waveform with a shorter fluctuating period in the jitter period can be converted into a stable high-low voltage waveform (rectangular wave) with a longer period.
Fig. 7 is a schematic diagram illustrating the principle of the key control circuit shown in fig. 4 to eliminate the jitter of the input voltage of the MOS transistor. Referring to fig. 7, when the key control switch K1 is turned on, i.e. in the period from t1 to t2, the first power supply VDD1 generates a continuously oscillating voltage V on the first resistor R1 due to the mechanical vibration of the key control switch K1 R1 At the same time, the first power supply VDD1 charges the capacitor C1, and the capacitor C1 continuously shakes the voltage V R1 Converted to a smooth analog signal, and the first power supply VDD1 provides the Schmitt trigger T1 with a forward threshold voltage V smaller than the Schmitt trigger T1 T+ The output voltage of the schmitt trigger T1 is at a high level (first potential); when the key control switch K1 is turned off, i.e., after time t2, the first power supply VDD1 generates a jitter voltage V on the first resistor R1 due to mechanical vibration of the key control switch K1 R1 While the capacitor C1 provides the Schmitt trigger T1 with a negative threshold voltage V having a maximum value greater than that of the Schmitt trigger T1 by discharging T- And the minimum value is smaller than the negative threshold voltage V of the Schmitt trigger T1 T- The output voltage of the Schmitt trigger T1 is enabled to be low level (second potential), thereby eliminating the jitter of the input voltage of the MOS tubeThe phenomenon of the key press can be further avoided, and the problem that the entity key is operated by multiple times in a misoperation mode can be further avoided.
That is, in the embodiment shown in fig. 4, the first power supply is configured to provide, when the key control switch is turned on, an input voltage smaller than a forward threshold voltage of the schmitt trigger to the schmitt trigger, so as to control an output voltage of the schmitt trigger to be the first potential, thereby ensuring that an input voltage of the NMOS N1 is the first potential; and the RC integrating circuit is used for providing an input voltage with the maximum value larger than the positive threshold voltage of the Schmitt trigger and the minimum value larger than the negative threshold voltage of the Schmitt trigger for the Schmitt trigger when the key control switch is turned off so as to control the output voltage of the Schmitt trigger to be the second potential, thereby ensuring the input voltage of the NMOS tube N1 to be the second potential.
In a second more detailed embodiment, as shown in fig. 8, the voltage control unit 3 in the embodiment shown in fig. 3 may comprise a monostable flip-flop D1.
The input end of the monostable trigger D1 is connected with one end of the first resistor R1 in parallel and then connected to the key control switch K1, and the output end of the monostable trigger D1 is connected with the grid electrode of the NMOS tube N1.
The monostable trigger D1 outputs the first potential when the key control switch K1 is closed, controls the grid voltage of the NMOS tube N1 to be the first potential, and outputs the second potential when the key control switch K1 is opened, and controls the grid voltage of the NMOS tube N1 to be the second potential.
The monostable flip-flop includes a steady state and a transient steady state. Under the action of the external pulse, the monostable trigger can be turned over from a stable state to a temporary stable state, and returns to the stable state after the temporary stable state is maintained for a period of time.
In the embodiment of the present application, when the key control switch K1 is turned on, the monostable trigger D1 may be triggered to turn to a temporary steady state, and output a high potential (the first potential) and maintain the temporary steady state for a period of time, and then when the key control switch K1 is turned off, the monostable trigger D1 is returned to a stable state, and output a low potential (the second potential). The time length for the monostable trigger D1 to maintain in the transient state may be set according to the time length when the key control switch K1 is turned on.
Similarly, in the embodiment shown in fig. 8, since a monostable trigger D1 is connected in series between the gate of the NMOS transistor N1 and the key control switch K1, the key control circuit can control the gate voltage of the NMOS transistor N1 to be a first potential when the key control switch K1 is turned on, trigger the MOS transistor to be turned on, and can control the gate voltage of the NMOS transistor N1 to be a second potential when the key control switch K1 is turned off, and control the MOS transistor to be turned off. Therefore, the phenomenon that the input voltage of the MOS tube shakes in the process that the user presses or removes the key control switch can be eliminated, and the problem that the entity key is misoperation for many times can be avoided.
It should be noted that, in addition to the two embodiments of the voltage control unit shown in fig. 4 and 8, those skilled in the art may extend further embodiments of the voltage control unit according to the technical concept of the present application, and are not limited to the two embodiments.
Alternatively, on the basis of any of the above embodiments, as shown in fig. 9, the key control circuit provided in the embodiment of the present specification may further include an impedance amplifier 5.
The impedance amplifier 5 may be connected in series between the drain of the NMOS transistor N1 and the central processor 4. Optionally, an impedance amplifier 5 is connected in parallel with the second resistor R2.
As an example, the impedance amplifier 5 may be specifically a buffer B1.
In the present embodiment, the purpose of introducing the impedance amplifier 5 is to increase the impedance in the branch where the cpu 4 is located, thereby reducing the current in the branch where the cpu 4 is located, so as to protect the cpu 4 from the impact of a large current when the key control switch K1 is closed.
On the basis of the key control circuit provided by the embodiment of the application, the embodiment of the application also provides a mobile terminal, which can comprise: the key control circuit provided by any embodiment of the application.
The mobile terminal provided by the embodiment of the application comprises the key control circuit provided by the embodiment of the application, and the key control circuit provided by the embodiment of the application can eliminate the phenomenon that the input voltage of the MOS tube shakes in the process of pressing or removing the key control switch by a user, so that the problem that the entity key is misoperation for many times can be avoided, and the mobile terminal provided by the embodiment of the application can also avoid the problem that the entity key is misoperation for many times.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
From the above description of the embodiments, it will be clear to those skilled in the art that the above-described embodiment method may be implemented by means of software plus a necessary general hardware platform, but of course may also be implemented by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) comprising instructions for causing a terminal (which may be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to perform the method according to the embodiments of the present application.
The embodiments of the present application have been described above with reference to the accompanying drawings, but the present application is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many forms may be made by those having ordinary skill in the art without departing from the spirit of the present application and the scope of the claims, which are to be protected by the present application.
Claims (9)
1. A key control circuit is characterized by comprising a first power supply, a key control switch, a voltage control unit and an MOS tube,
one end of the key control switch is connected with the first power supply, and the voltage control unit is connected in series between the other end of the key control switch and the grid electrode of the MOS tube;
the voltage control unit comprises an RC integral circuit and a trigger, wherein the input end of the RC integral circuit is connected to the key control switch, the output end of the RC integral circuit is connected with the input end of the trigger, and the output end of the trigger is connected with the grid electrode of the MOS tube;
during the closing period of the key control switch, the first power supply charges the RC integrating circuit, the RC integrating circuit converts the shaking voltage generated by the mechanical vibration of the key control switch during the closing period into the input voltage of an analog signal and provides the input voltage to the trigger, and the input voltage controls the output voltage of the trigger to be a first potential so as to control the grid voltage of the MOS tube to be the first potential and control the MOS tube to be conducted; and in the key control switch off period, the RC integrating circuit converts the dithering voltage generated by the mechanical vibration of the key control switch in the off period into the input voltage of an analog signal and provides the input voltage for the trigger, and the input voltage controls the output voltage of the trigger to be a second potential so as to control the grid voltage of the MOS tube to be the second potential and control the MOS tube to be cut off.
2. The key control circuit of claim 1, wherein the key control circuit further comprises: a second power supply, a first resistor and a central processing unit, wherein,
one end of the first resistor is connected with the input end of the RC integrating circuit in parallel and then connected to one end of the key control switch, and the other end of the key control switch is connected with the first power supply;
the source electrode of the MOS tube and the other end of the first resistor are respectively grounded;
and the drain electrode of the MOS tube is respectively connected with the second power supply and the central processing unit.
3. The key control circuit according to claim 2, wherein,
the first power supply and the second power supply are the same power supply.
4. The key control circuit of claim 2, wherein the key control circuit further comprises: a second resistor, wherein,
the second resistor is connected in series between the second power supply and the drain electrode of the MOS tube, and the second resistor is connected in parallel with the central processing unit.
5. The key control circuit of claim 2, wherein the trigger comprises a Schmitt trigger,
during the closing period of the key control switch, the first power supply provides an input voltage smaller than the forward threshold voltage of the schmitt trigger for the schmitt trigger so as to control the output voltage of the schmitt trigger to be the first potential;
during the key control switch off period, the RC integrating circuit provides an input voltage with a maximum value larger than a positive threshold voltage of the Schmitt trigger and a minimum value larger than a negative threshold voltage of the Schmitt trigger for the Schmitt trigger so as to control the output voltage of the Schmitt trigger to be the second potential.
6. The key control circuit of claim 5, wherein the RC integrating circuit comprises a third resistor and capacitor, wherein,
one end of the third resistor is connected with one end of the first resistor in parallel and then connected to the key control switch, and the other end of the third resistor is connected with the input end of the Schmitt trigger;
one electrode of the capacitor is respectively connected with the other end of the third resistor and the input end of the Schmitt trigger, and the other electrode of the capacitor is grounded.
7. The key control circuit of claim 2, wherein the flip-flop comprises a monostable flip-flop, wherein,
the input end of the monostable trigger is connected with one end of the first resistor in parallel and then connected to the key control switch, and the output end of the monostable trigger is connected with the grid electrode of the MOS tube;
the monostable trigger outputs the first potential during the closing period of the key control switch, controls the grid voltage of the MOS tube to be the first potential, outputs the second potential during the opening period of the key control switch, and controls the grid voltage of the MOS tube to be the second potential.
8. The key control circuit of any of claims 2-7, further comprising an impedance amplifier, wherein,
the impedance amplifier is connected in series between the drain electrode of the MOS tube and the central processing unit.
9. A mobile terminal, comprising: the key control circuit according to any one of claims 1 to 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910086616.8A CN109831195B (en) | 2019-01-29 | 2019-01-29 | Key control circuit and mobile terminal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910086616.8A CN109831195B (en) | 2019-01-29 | 2019-01-29 | Key control circuit and mobile terminal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109831195A CN109831195A (en) | 2019-05-31 |
| CN109831195B true CN109831195B (en) | 2023-12-12 |
Family
ID=66862843
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910086616.8A Active CN109831195B (en) | 2019-01-29 | 2019-01-29 | Key control circuit and mobile terminal |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109831195B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| RU2752761C1 (en) * | 2020-10-08 | 2021-08-02 | Общество с ограниченной ответственностью "ПАРАМЕРУС" | Method for generating control pulses with low jitter level for semiconductor switching devices |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000019574A1 (en) * | 1998-09-25 | 2000-04-06 | Conexant Systems, Inc. | Triggering circuit for esd protection clamp |
| WO2013167027A2 (en) * | 2013-03-04 | 2013-11-14 | 中兴通讯股份有限公司 | Power switching circuit and terminal |
| CN103676746A (en) * | 2013-12-20 | 2014-03-26 | 青岛歌尔声学科技有限公司 | Control circuit of startup and shutdown machine and electronic equipment |
| CN204948048U (en) * | 2015-09-07 | 2016-01-06 | 上海斐讯数据通信技术有限公司 | A kind of button false-touch prevention Power Generation Road |
| CN105302653A (en) * | 2015-11-18 | 2016-02-03 | 合肥宝龙达光电技术有限公司 | Circuit structure used for preventing start of tablet computer caused by mistakenly touching power key |
| CN105450203A (en) * | 2015-11-13 | 2016-03-30 | 得理电子(上海)有限公司 | Interference filtering device and interference filtering method for rapid on-off mechanical switches |
| CN106484064A (en) * | 2016-11-22 | 2017-03-08 | 深圳市长龙铁路电子工程有限公司 | A kind of power control circuit of SCM system |
| CN207010642U (en) * | 2017-06-14 | 2018-02-13 | 无锡市中健科仪有限公司 | Key switch circuit |
| CN107817734A (en) * | 2017-12-05 | 2018-03-20 | 无锡市瀚为科技有限公司 | A kind of super low-power consumption key control circuit |
-
2019
- 2019-01-29 CN CN201910086616.8A patent/CN109831195B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000019574A1 (en) * | 1998-09-25 | 2000-04-06 | Conexant Systems, Inc. | Triggering circuit for esd protection clamp |
| WO2013167027A2 (en) * | 2013-03-04 | 2013-11-14 | 中兴通讯股份有限公司 | Power switching circuit and terminal |
| CN103676746A (en) * | 2013-12-20 | 2014-03-26 | 青岛歌尔声学科技有限公司 | Control circuit of startup and shutdown machine and electronic equipment |
| CN204948048U (en) * | 2015-09-07 | 2016-01-06 | 上海斐讯数据通信技术有限公司 | A kind of button false-touch prevention Power Generation Road |
| CN105450203A (en) * | 2015-11-13 | 2016-03-30 | 得理电子(上海)有限公司 | Interference filtering device and interference filtering method for rapid on-off mechanical switches |
| CN105302653A (en) * | 2015-11-18 | 2016-02-03 | 合肥宝龙达光电技术有限公司 | Circuit structure used for preventing start of tablet computer caused by mistakenly touching power key |
| CN106484064A (en) * | 2016-11-22 | 2017-03-08 | 深圳市长龙铁路电子工程有限公司 | A kind of power control circuit of SCM system |
| CN207010642U (en) * | 2017-06-14 | 2018-02-13 | 无锡市中健科仪有限公司 | Key switch circuit |
| CN107817734A (en) * | 2017-12-05 | 2018-03-20 | 无锡市瀚为科技有限公司 | A kind of super low-power consumption key control circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109831195A (en) | 2019-05-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20100176892A1 (en) | Ultra Low Power Oscillator | |
| CN109983691B (en) | Charge pump input current limiter | |
| CN101673136A (en) | Power control unit and on/off method | |
| CN109831195B (en) | Key control circuit and mobile terminal | |
| WO2010054177A1 (en) | Dual current switch detection circuit with selective activation | |
| JP6950608B2 (en) | Control device, power receiving device and electronic device | |
| US20070157004A1 (en) | Multi purpose switching circuit and electronic apparatus including same | |
| CN109756000B (en) | Switching charging circuit, charger, load terminal, system and charging method | |
| CN109039315B (en) | Analog switch circuit for adjusting turn-on time | |
| CN112928736B (en) | Delay adjustable circuit and lithium battery protection circuit thereof | |
| US20030122531A1 (en) | Switched mode power supply device adapted for low current drains, and cellular phone equipped with such a device | |
| US20040232895A1 (en) | Low noise fast stable voltage regulator circuit | |
| US9391600B2 (en) | Voltage level shift with charge pump assist | |
| TWI731465B (en) | Method and apparatus of an acoustic energy detection circuit for a pulse density modulation microphone | |
| JPH01195720A (en) | Semiconductor integrated circuit | |
| CN102547530B (en) | Audio squelch system with hysteresis comparison circuit | |
| WO2001050602A1 (en) | Switched capacitor filter with integrated voltage multiplier | |
| CN204013456U (en) | Switching circuit | |
| CN202374436U (en) | Pop noise suppression circuit | |
| CN112117785B (en) | Charging circuit, charging chip, mobile terminal and charging system | |
| CN202475746U (en) | Audio squelch system | |
| CN216981879U (en) | Earphone delay reset circuit and wireless headphone | |
| CN111595494A (en) | Capacitance detection circuit, integrated circuit, electronic device, and capacitance detection method | |
| US20130106510A1 (en) | Audio-output amplifier circuit for audio device, audio device, electronic device including audio device, and output control method for audio device | |
| CN102421051A (en) | Circuit and system for suppressing Pop noise |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |