CN109828938A - A kind of communication means and device based on chip - Google Patents
A kind of communication means and device based on chip Download PDFInfo
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Abstract
This application discloses a kind of communication means based on chip, comprising: extended chip receives corresponding first data frame that one or more serial equipments are sent；First data frame includes serial data；Extended chip obtains the second data frame according to the serial ports of the first data frame and the corresponding master chip of serial equipment mark, the device numbering of serial equipment；Extended chip sends the second data frame on the corresponding serial ports on master chip；Extended chip is stored with the device numbering of the serial ports mark of master chip, serial equipment.The application can be improved communication efficiency.
Description
Technical field
This application involves technical field of data transmission more particularly to a kind of communication means and device based on chip.
Background technique
With the development of communication technology, core board becomes the key for improving communication efficiency to the processing capacity of data
The master chip of core board includes multiple serial ports, is connected by the pin in serial ports with serial equipment.
However, master chip serial ports is limited, when the serial equipment of access is excessive, so that master chip does not have enough serial ports to connect
Other prior serial equipments are connect, to reduce communication efficiency.
Summary of the invention
To solve the above-mentioned problems, in a first aspect, present applicant proposes a kind of communication means, comprising:
Extended chip receives corresponding first data frame from one or more serial equipments；First data frame includes serial ports
Data；
Extended chip identifies according to the serial ports of the first data frame and the corresponding master chip of serial equipment, serial equipment
Device numbering obtains the second data frame；Extended chip sends the second data frame on the corresponding serial ports on master chip；Extend core
Piece is stored with the device numbering of the serial ports mark of master chip, serial equipment.
In one example, extended chip receives the third data frame from master chip, and third data frame includes master chip
The instruction sent to multiple serial equipments and device numbering；When extended chip calibration equipment number is correct, instruction is extracted, and will refer to
Order is sent to the corresponding serial equipment of device numbering；Wherein, third data frame further include: data frame head, data length, data side
To, check value and data postamble.
In one example, extended chip successively verify data frame head, data length, data direction, device numbering, verification
Whether value and data postamble are preset value, if so, extracting instruction.
In one example, extended chip determines the corresponding quantity of quantity of the data frame from each serial equipment respectively
The type identification of class information, the priority level information of multiple serial equipments, the data frame that extended chip receives is corresponding
Handle the time grade information of data；
Extended chip calculates the corresponding priority level information of the data frame received according to following formula:
S=α S1+ β S2+ γ S3；
Wherein, S is the corresponding priority level information of data frame, and S1 is quantitative levels information, and S2 is the excellent of serial equipment
First grade class information, S3 are time grade information, α, the corresponding weight parameter of β, γ S1, S2, S3, and alpha+beta+γ=1.
In one example, extended chip calculates the processing class information of the data frame received according to following formula, and
According to processing class information, priority level information and default processing time, data frame is handled:
S≥SMarkAnd t≤tMarkWhen, f=0；
S≥SMarkAnd t > tMark, or S < SMarkWhen,
Wherein, S is priority level information, SMarkFor priority level threshold value, t is default processing time, tMarkWhen to handle
Between threshold value, f be the corresponding processing class information of data；The default processing time is the time needed for the data frame that processing receives,
It is corresponding with time grade information.
In one example, extended chip determines the priority level information of each element in each data acquisition system respectively
With the default processing time；
Extended chip handles the time with default according to the priority level information of each element, and the data frame received
Priority level information determines the waiting time of corresponding data set respectively；
Extended chip is according to the processing class information of the data frame received, when the data frame received is distributed to waiting
Between the corresponding processing unit of the smallest data acquisition system；Wherein, extended chip includes multiple processing units, and each processing unit pair
A data acquisition system is answered, the element in data acquisition system is data frame；
Processing unit is according to priority level information, corresponding second data frame of the data frame received.
Second aspect, the embodiment of the present application provide another communication means, comprising:
Master chip receives the second data frame that extended chip is sent, and includes the corresponding main core of serial equipment in the second data frame
Piece serial ports mark, serial equipment device numbering and serial data；Serial ports mark and the device numbering for verifying master chip are correct
When, extract serial data.
In one example, master chip generates third data frame and third data frame is sent to extended chip, wherein the
Three data frames include the instruction and device numbering that master chip is sent to multiple serial equipments.
In one example, the second data frame further include: data frame head, data length, data direction, check value and data
Postamble；
Master chip successively verify data frame head, data length, data direction, master chip mark, device numbering, check value and
Whether data postamble is preset value, if so, extracting serial data.
The third aspect, the embodiment of the present application provide a kind of extended chip, comprising: receiving module, data processing module, transmission
Module and memory module；
Receiving module, for receiving corresponding first data frame from one or more serial equipments, the first data frame packet
Include serial data；
Data processing module, the first data frame and the corresponding master of serial equipment for being received according to receiving module
Chip serial ports mark, serial equipment device numbering, obtain the second data frame；
Sending module, the second data frame for obtaining data processing module are sent to corresponding serial ports on master chip
On；
Memory module, for storing the serial ports mark of master chip, the device numbering of serial equipment.
In one example, receiving module is also used to receive the third data frame from master chip, and third data frame includes master
The instruction and device numbering that chip is sent to multiple serial equipments；
Data processing module be also used to calibration equipment number it is correct when, extract instruction, and send an instruction to device numbering
Corresponding serial equipment；Wherein, third data frame further include: data frame head, data length, data direction, check value and data
Postamble.
In one example, data processing module is also used to determine the quantity of the data frame from each serial equipment respectively
Corresponding quantitative levels information, the priority level information of multiple serial equipments, the type for the data frame that extended chip receives
Identify the time grade information of corresponding processing data；
Extended chip calculates the corresponding priority level information of the data frame received according to following formula:
S=α S1+ β S2+ γ S3；
Wherein, S is the corresponding priority level information of data frame, and S1 is quantitative levels information, and S2 is the excellent of serial equipment
First grade class information, S3 are time grade information, α, the corresponding weight parameter of β, γ S1, S2, S3, and alpha+beta+γ=1.
In one example, data processing module is also used to calculate the processing of the data frame received according to following formula
Class information, and according to processing class information, priority level information and default processing time, handle data frame:
S≥SMarkAnd t≤tMarkWhen, f=0；
S≥SMarkAnd t > tMark, or S < SMarkWhen,
Wherein, S is priority level information, SMarkFor priority level threshold value, t is default processing time, tMarkWhen to handle
Between threshold value, f be the corresponding processing class information of data；The default processing time is the time needed for the data frame that processing receives,
It is corresponding with time grade information.
In one example, data processing module, comprising: multiple processing units, the corresponding data of each processing unit
Gather, the element in data acquisition system is data frame；
Data processing module be also used to determine respectively in each data acquisition system the priority level information of each element and
The default processing time；According to the priority level information of element and preset the preferential of the data frame for handling the time, and receive
Grade class information, determines the waiting time of each data acquisition system；According to the processing class information of the data frame received, will receive
To data frame distribute to the corresponding processing unit of waiting time the smallest data acquisition system；
Processing unit is used for according to priority level information, corresponding second data frame of the data frame received.
Fourth aspect, the embodiment of the present application provide a kind of master chip, comprising:
Master chip is used to receive the second data frame of extended chip transmission, includes the corresponding master of serial equipment in the second data frame
Chip serial ports mark, serial equipment device numbering and serial data；The serial ports mark and device numbering for verifying master chip are just
When true, serial data is extracted.
In one example, master chip is used to generate third data frame and third data frame is sent to extended chip,
In, third data frame includes the instruction and device numbering that master chip is sent to multiple serial equipments.
The application proposes that communication means can increase the serial ports quantity of master chip by extended chip, more to connect
Serial equipment, and can be realized the interaction of extended chip Yu serial equipment, master chip, improve communication efficiency.
Detailed description of the invention
The drawings described herein are used to provide a further understanding of the present application, constitutes part of this application, this Shen
Illustrative embodiments and their description please are not constituted an undue limitation on the present application for explaining the application.In the accompanying drawings:
Fig. 1 is a kind of method flow diagram of the communication means based on chip provided by the embodiments of the present application；
Fig. 2 is a kind of method flow diagram of load-balancing method provided by the embodiments of the present application；
Fig. 3 is a kind of structural schematic diagram of extended chip provided by the embodiments of the present application；
Fig. 4 is a kind of structural schematic diagram of the data interaction system based on chip provided by the embodiments of the present application.
Specific embodiment
For the clearer general idea for illustrating the application, carry out in an illustrative manner with reference to the accompanying drawings of the specification detailed
It describes in detail bright.
As shown in Figure 1, embodiments herein discloses a kind of communication means based on chip.
Step 101, extended chip receives corresponding first data frame from one or more serial equipments.
In the embodiment of the present application, the first data frame includes: serial data；Serial data includes but is not limited to serial equipment
One of request message, chart, number and text sent to master chip is a variety of.
Step 102, extended chip determines that serial ports mark, the equipment of serial equipment of the corresponding master chip of serial equipment are compiled
Number.
In the embodiment of the present application, extended chip can determine the serial ports mark of master chip, master by following two ways
The device numbering of chip:
1, corresponding from the first data frame serial equipment according to communication protocol preset between extended chip and serial equipment
Master chip serial ports mark, serial equipment device numbering；
2, the communication protocol between extended chip and master chip is preset, sets the serial ports mark of master chip in the protocol
Know, the corresponding relationship of the device numbering of the serial ports mark and serial equipment of the device numbering of serial equipment and chip.Work as extension
When chip receives the first data frame, the serial ports mark of chip, the device numbering of serial equipment are determined according to communication protocol.
In the embodiment of the present application, employing mode 2 realizes that extended chip determines the serial ports mark and serial equipment of master chip
Device numbering.
Step 103, it is identified according to the serial ports of master chip, extended chip sends the second data frame to corresponding on master chip
On serial ports.
Second data frame includes the serial ports mark of master chip, device numbering and serial data, in order to master chip verifying the
Whether the data in two data frames are correct.In the embodiment of the present application, for the safety and stability of improve data transfer,
Joined other parameters in second data frame includes data frame head, data length, data direction, check value and data postamble.
Step 104, master chip receives the second data frame that extended chip is sent.
Step 105, master chip time verify data frame head, data length, data direction, master chip mark, device numbering, school
Test whether value and data postamble are preset value, if so, executing step 106；Otherwise, terminate current process.
In the embodiment of the present application, data frame head, data length, data direction, check value and data postamble are directly written in
In communication protocol, master chip determines whether above-mentioned data are true directly according to communication protocol.
For example, the data in the second data frame are as follows: 0xA5 0x5A0x00 0x07 0x05 0xA1 0x03 0x010x02
0x03 0x04CRCH CRCL 0x68 0x86.Wherein, 0XA5 0x5A is data frame head, and 0x000x07 is data length, 0x05
Indicating that data direction is that master chip is sent to from serial equipment, 0xA1 is that the serial ports of master chip identifies, and 0x03 is device numbering,
0x01 0x02 0x03 0x04 is serial data, and CRCH CRCL is data check value, and check value can be formulated voluntarily, 0x68
0x86 is data postamble.
Master chip successively verifies whether 0xA5 0x5A is correct data frame head according to agreement, and whether 0x00 0x07 is positive
Whether true data length, 0x05 are correct data direction, 0xA1 whether be correct master chip serial ports mark, 0x03 is
No is correct device numbering, and whether CRCH CRCL is correct data check value, and whether 0x68 0x86 is correct data
Postamble.
Wherein, the whether correct judgment basis of data length is the number of character string in serial data.For example, serial data
For 0x01 0x02 0x03 0x04, then data length is 4, master chip first determines device numbering pair when verifying data length
The position for the character string answered, then started counting from character late, until finding data check value and corresponding to character string, detection
Whether count results are 4, if it is, data length is correct；Otherwise, data length is incorrect.Other parameters are then to communicate
It is set in agreement, master chip can be compared directly when detecting.
Step 106, master chip extracts serial data.
Step 107, master chip generates the third data frame containing instruction and device numbering.
Step 108, third data frame is sent to extended chip by master chip.
In the embodiment of the present application, third data frame further include: data frame head, data length, data direction, check value and
Data postamble.
Step 109, extended chip receives the third data frame that master chip is sent.
Step 110, extended chip successively verify data frame head, data length, data direction, device numbering, check value and
Whether data postamble is preset value, if so, executing step 111；Otherwise, terminate current process.
Since third data frame is issued from master chip, the string that master chip is added in third data frame is not needed
Mouth mark.Compared with master chip, extended chip verify data frame head, data length, data direction, device numbering, check value and
The method and sequence of data postamble are all the same.
Step 111, extended chip extracts instruction.
Step 112, extended chip sends an instruction to the corresponding serial equipment of device numbering.
In the embodiment of the present application, master chip and extended chip are mainly used on Medical Devices.With the development of science and technology,
In ward, Medical Devices will not only help sufferer to transmit the state of an illness, get in touch with medical staff, also relate to the daily life of sufferer.
For example, Medical Devices connect printer, convenient for printing result of laboratory test；Medical Devices connect radio frequency induction device, and sufferer is facilitated to pay
Expense and verifying identity information.
In above-mentioned scene, extended chip problem of load balancing will necessarily occur because of the multiple serial equipments of connection.Doctor
Some very important data, such as the urgent call of sufferer can be transmitted by treating equipment, if these data cannot transmit meeting in time
Influence the state of an illness or even life threatening of sufferer.Therefore, the method for solving the load balancing of Medical Devices cannot only resourceoriented
Distribution, it is also contemplated that the service quality of Medical Devices.As shown in Fig. 2, the embodiment of the present application provides a kind of load-balancing method,
Applied to extended chip, and for handling a data frame.
Step 201, extended chip determines the corresponding quantitative levels of quantity of the data frame from each serial equipment respectively
Information, the priority level information of multiple serial equipments, the corresponding processing of the type identification for the data frame that extended chip receives
The time grade information of data.
The corresponding priority level information of data frame includes three parts, is the priority level information of serial equipment respectively,
Time grade information and quantity class information.Wherein, the priority level information of serial equipment is set for serial equipment,
For example, the priority level information of call button is greater than printer；Time grade information is likely to occur some for sufferer
Emergency case setting, need medical staff to rush to as early as possible for example, the state of an illness deteriorates suddenly, and common dressing does not need that tightly
It is anxious.Therefore compared to common dressing, the state of an illness deteriorates suddenly needs acceleration to handle, therefore its time class information can be greater than commonly
Dressing；For some special sufferers, Medical Devices need high frequency to medical staff send present case, therefore be arranged number
Class information is measured, so that medical staff can look after sufferer in time.
Step 202, extended chip is according to the corresponding priority level information of the received data frame of calculating.
In the priority level information for determining serial equipment, after time grade information and quantity class information, utilization is following
Formula calculates the corresponding priority level information of data frame received:
S=α S1+ β S2+ γ S3；
Wherein, S is the priority level information, and S1 is the priority level information of the serial equipment, and S2 is described
Time grade information, S3 are the quantitative levels information, α, the corresponding weight parameter of β, γ S1, S2, S3, and alpha+beta+γ=1.
In order to guarantee that important data can be timely transmitted to medical staff, the default of each data frame received is set
The time is handled, the default processing time is corresponding with time grade information, and time grade information is higher, and it is shorter to preset the processing time.
Step 203, extended chip calculates the processing class information of the data frame received.
According to following formula calculation processing class informations:
S≥SMarkAnd t≤tMarkWhen, f=0；
S≥SMarkAnd t > tMark, or S < SMarkWhen,
Wherein, S is priority level information, SMarkFor priority level threshold value, t is default processing time, tMarkFor for processing
Time threshold, f are the corresponding processing class information of first data.
When the priority level information of the data frame received not less than priority level threshold value and presets the processing time not
When greater than processing time threshold, illustrates that the corresponding event of the first data frame is important and urgent, need to solve at first.For example, sufferer
The state of an illness deteriorates suddenly, and whatsoever thing is life-critical not as good as sufferer at this time, therefore to guarantee that the sufferer state of an illness deteriorates pair suddenly
The the first data frame priority processing answered.
Step 204, extended chip determines in each data acquisition system the priority level information of each element and pre- respectively
If handling the time.
In order to the high data frame of priority processing priority level information, and the processing of other data frames cannot be influenced,
One data acquisition system is set for each processing unit, when the high data frame of processing unit priority processing priority level information
When, first temporarily other data frames are stored in data acquisition system.Later, processing unit can successively be located according to priority level information
Manage other data frames in data acquisition system.
Step 205, priority level information and default processing time of the extended chip according to element, and the number received
According to the priority level information of frame, the waiting time of each data acquisition system is determined respectively.
In the embodiment of the present application, the waiting time is that priority level information is not less than the data received in data acquisition system
The sum of default processing time of each element of the priority level information of frame.
For example, data acquisition system includes tri- data frames of A1, A2 and A3, the default processing time is respectively 1s, 2s, 3s, preferentially
Grade class information is respectively 3,2,1, if the priority level information of the first data frame received is 4, the waiting time
It is 0；If priority level information is 3, waiting time 3s；If priority level information is 2 or 1, correspond to
Waiting time be respectively 5s and 6s.
Step 206, extended chip distributes the data frame received according to the processing class information of the data frame received
Give waiting time the smallest data acquisition system corresponding processing unit.
It is single that the data frame of processing class information f=0 is preferentially given the corresponding processing of data acquisition system that the waiting time is 0
Member.The data acquisition system that waiting time is 0, comprising: aggregate type is the greatest priority grade in null set data acquisition system and set
Not little Yu the corresponding priority-level of received data frame, and the least data acquisition system of number of elements in gathering.Pass through above-mentioned side
Method, which is realized, priority processing significant data and not to influence other Frame processes efficiency as far as possible.
Processing class information f is not 0 data frame, since importance is relatively poor, distributes to number of elements in set
The corresponding processing unit of data acquisition system.When there are multiple such data acquisition systems, waiting time least data set is distributed to
Close corresponding processing unit.
As shown in figure 3, a kind of extended chip provided by the embodiments of the present application, comprising: receiving module 301, data processing mould
Block 302, sending module 303 and memory module 304；
Receiving module 301, for receiving corresponding first data frame from one or more serial equipments, first number
It include serial data according to frame；
Data processing module 302, first data frame and the string for being received according to receiving module 301
The corresponding master chip of jaws equipment serial ports mark, the serial equipment device numbering, obtain the second data frame；
Sending module 303, it is right on master chip that second data frame for obtaining data processing module 302 is sent to
On the serial ports answered；
Memory module 304, for storing the serial ports mark of the master chip, the device numbering of the serial equipment.
Due to the case where sending data frame to master chip simultaneously there are multiple serial equipments, data processing module 302 is also wrapped
Include: multiple processing units 3021, each processing subelement 3021 correspond to a data acquisition system, and the element in data acquisition system is data
Frame；
Data processing module 302 is used to be connect according to processing class information, priority level information and default processing time
It receives data frame and distributes to processing unit 3021.
Processing unit 3021 is used to respectively obtain each data frame in data acquisition system corresponding the according to priority level information
Two data frames.
As shown in figure 4, a kind of data interaction system based on chip provided by the embodiments of the present application, comprising: master chip
401, the serial ports 4011 of master chip, extended chip 402, processing unit 3021 and extended chip serial ports 4021.
Master chip 401 connects extended chip by the serial ports 4011 of master chip, and the serial ports 4011 of each master chip is corresponding
One or more extended chip serial ports 4021, each extended chip serial ports 4022 connect a serial equipment, serial equipment tool
Body are as follows: IC card identifies that equipment, two dimensional code identify equipment, infrared remote control equipment.
When serial equipment sends data to master chip, serial equipment first sends a dataframe to point extended chip 402, extension
Chip 402 determines that data frame is corresponding according to the priority level information of serial equipment, quantitative levels information and time grade information
Priority level information；The corresponding processing class information of data frame is calculated according to following formula:
S≥SMarkAnd t≤tMarkWhen, f=0；
S≥SMarkAnd t > tMark, or S < SMarkWhen,
Wherein, S is priority level information, SMarkFor preset priority level threshold value, t is default processing time, tMarkFor
Preset processing time threshold, f are the corresponding processing class information of the first data.
Processing class information is 0 to illustrate that data frame is the data frame of imperious necessity, needs priority processing, extended chip 402
Data frame is distributed into the processing unit of free time or meets the corresponding processing unit of data acquisition system of following conditions:
1, the greatest priority rank in set is less than the corresponding priority-level of data frame received；
2, the least data acquisition system of number of elements in set.
Processing class information is not 0 to illustrate that data frame is non-emergent necessary data frame, and extended chip 402 is by data frame point
The corresponding processing unit of the least data acquisition system of number of elements in dispensing set.
Processing unit 3021 successively obtains the first data frame in data acquisition system is corresponding according to priority level information
Second data frame, and the second data frame is sent to master chip.
When master chip sends data to serial equipment, master chip 401 will be to serial equipment by the serial ports 4011 of master chip
The instruction of transmission and device numbering are packaged into third data frame, and third data frame is sent to extended chip.Extended chip 402
Third data frame is verified after receiving third data frame；After verifying successfully, extended chip extracts instruction, and passes through correspondence
Extended chip serial ports 4021 send an instruction to corresponding serial equipment.
All the embodiments in this specification are described in a progressive manner, same and similar portion between each embodiment
Dividing may refer to each other, and each embodiment focuses on the differences from other embodiments.Especially for system reality
For applying example, since it is substantially similar to the method embodiment, so being described relatively simple, related place is referring to embodiment of the method
Part explanation.
The above description is only an example of the present application, is not intended to limit this application.For those skilled in the art
For, various changes and changes are possible in this application.All any modifications made within the spirit and principles of the present application are equal
Replacement, improvement etc., should be included within the scope of the claims of this application.
Claims (10)
1. a kind of communication means based on chip characterized by comprising
Extended chip receives corresponding first data frame from one or more serial equipments；First data frame includes serial ports
Data；
The extended chip is according to the serial ports of first data frame and the corresponding master chip of serial equipment mark, institute
The device numbering for stating serial equipment obtains the second data frame；
The extended chip sends second data frame on the corresponding serial ports of the master chip；The extended chip storage
The master chip serial ports mark, the serial equipment device numbering.
2. the method according to claim 1, wherein
Before corresponding first data frame that the extended chip receives that one or more serial equipments are sent, or in the extension
After chip sends second data frame on the corresponding serial ports on the master chip, further includes:
The extended chip receives the third data frame from the master chip, the third data frame include the master chip to
The instruction and device numbering that the multiple serial equipment is sent；When the extended chip verification device numbering is correct, institute
It states extended chip and extracts described instruction, and described instruction is sent to the corresponding serial equipment of the device numbering；Wherein, described
Third data frame further include: data frame head, data length, data direction, check value and data postamble.
3. according to the method described in claim 2, it is characterized in that,
When the verification device numbering is correct, described instruction is extracted, comprising:
The extended chip verifies the data frame head, data length, the data direction, the device numbering, described
Whether check value and the data postamble are preset value, if so, extracting described instruction.
4. the method according to claim 1, wherein
In the case where multiple serial equipments send data frame to the master chip, in the extended chip by described second
Before data frame is sent on the corresponding serial ports of the master chip, the method also includes:
The extended chip determines the corresponding quantitative levels information of quantity of the data frame from each serial equipment respectively,
The priority level information of the multiple serial equipment, the corresponding place of the type identification for the data frame that the extended chip receives
Manage the time grade information of data；
The extended chip calculates the corresponding priority level information of the data frame received according to following formula:
S=α S1+ β S2+ γ S3；
Wherein, S is the corresponding priority level information of the data frame, and S1 is the quantitative levels information, and S2 is the serial ports
The priority level information of equipment, S3 are the time grade information, α, the corresponding weight parameter of β, γ S1, S2, S3, and α+
+ γ=1 β.
5. according to the method described in claim 4, it is characterized in that, corresponding excellent in the extended chip calculating data frame
After first grade class information, further includes:
The extended chip is according to following formula, the processing class information of the data frame received described in calculating, and according to described
Class information, the priority level information and default processing time are handled, the data frame is handled:
S≥SMarkAnd t≤tMarkWhen, f=0；
S≥SMarkAnd t > tMark, or S < SMarkWhen,
Wherein, S is the priority level information, SMarkFor priority level threshold value, t is the default processing time, tMarkFor place
Time threshold is managed, f is the corresponding processing class information of the data；The default processing time is the number received described in processing
It is corresponding with the time grade information according to the time needed for frame.
6. according to the method described in claim 5, it is characterized in that, described according to the processing class information, the priority
Class information and default processing time, handle the data frame, which comprises
When the extended chip determines the priority level information of each element in each data acquisition system respectively and presets processing
Between；
The extended chip is according to the priority level information of each element and default processing time and described receives
The priority level information of data frame determines the waiting time of the corresponding data acquisition system respectively；
The processing class information for the data frame that the extended chip is received according to distributes the data frame received
Give waiting time the smallest data acquisition system corresponding processing unit；Wherein, the extended chip includes multiple processing units,
And each processing unit corresponds to a data acquisition system, the element in the data acquisition system is the data frame；
The processing unit obtains corresponding second data of data frame received according to the priority level information
Frame.
7. a kind of extended chip characterized by comprising receiving module, data processing module, sending module and memory module；
The receiving module, for receiving corresponding first data frame from one or more serial equipments, first data
Frame includes serial data；
The data processing module, first data frame and the serial ports for being received according to the receiving module
The corresponding master chip of equipment serial ports mark, the serial equipment device numbering, obtain the second data frame；
The sending module, second data frame for obtaining the data processing module are sent on master chip corresponding
Serial ports on；
The memory module, for storing the serial ports mark of the master chip, the device numbering of the serial equipment.
8. extended chip according to claim 7, which is characterized in that
The data processing module is also used to determine the corresponding number of quantity of the data frame from each serial equipment respectively
Measure class information, the priority level information of the multiple serial equipment, the type for the data frame that the extended chip receives
Identify the time grade information of corresponding processing data；
The extended chip calculates the corresponding priority level information of the data frame received according to following formula:
S=α S1+ β S2+ γ S3；
Wherein, S is the corresponding priority level information of the data frame, and S1 is the quantitative levels information, and S2 is the serial ports
The priority level information of equipment, S3 are the time grade information, α, the corresponding weight parameter of β, γ S1, S2, S3, and α+
+ γ=1 β.
9. extended chip according to claim 8, which is characterized in that
The data processing module is also used to according to following formula, the processing class information of the data frame received described in calculating,
And according to the processing class information, the priority level information and default processing time, the data frame is handled:
S≥SMarkAnd t≤tMarkWhen, f=0；
S≥SMarkAnd t > tMark, or S < SMarkWhen,
Wherein, S is the priority level information, SMarkFor priority level threshold value, t is the default processing time, tMarkFor place
Time threshold is managed, f is the corresponding processing class information of the data；The default processing time is the number received described in processing
It is corresponding with the time grade information according to the time needed for frame.
10. extended chip according to claim 9, which is characterized in that
The data processing module, comprising: multiple processing units, each corresponding data acquisition system of the processing subelement, institute
Stating the element in data acquisition system is the data frame；
The data processing module be also used to determine respectively in each data acquisition system the priority level information of each element and
The default processing time；According to the priority level information of the element and default processing time and the data received
The priority level information of frame determines the waiting time of each data acquisition system；According to the place of the data frame received
Class information is managed, the data frame received is distributed into the corresponding processing unit of waiting time the smallest data acquisition system；
The processing unit, for according to the priority level information, obtaining the data frame corresponding second received
Data frame.
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