CN109814925A - A kind of method and device of the general self-configuring of hardware module - Google Patents
A kind of method and device of the general self-configuring of hardware module Download PDFInfo
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- CN109814925A CN109814925A CN201811582776.3A CN201811582776A CN109814925A CN 109814925 A CN109814925 A CN 109814925A CN 201811582776 A CN201811582776 A CN 201811582776A CN 109814925 A CN109814925 A CN 109814925A
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Abstract
The invention discloses a kind of method and devices of the general self-configuring of hardware module, method includes the following steps: step 1: the work of CPU configuration register is converted to descriptor；Task is packaged into descriptor and writes memory outside piece by step 2:CPU；Step 3: the first address of configures descriptor to accelerating engine, after reading in task descriptor complete to self-configure by accelerating engine；Step 4: starting to execute corresponding task.The present invention compared with prior art the advantages of be: the present invention by CPU by configures descriptor be written piece outside memory, and configures descriptor is written memory outside piece and can concurrently executed with the upper task of accelerating engine execution by CPU, effectively raises the performance of system.The present invention is high relative to the interface efficiency of common CPU configuration accelerating engine.
Description
Technical field
The present invention relates to chip processor technical field more particularly to the methods and dress of a kind of general self-configuring of hardware module
It sets.
Background technique
The abbreviation of SoC:System on Chip, referred to as system level chip, also there is title system on chip, it is intended that it is a production
Product are the integrated circuits for having application-specific target, wherein including holonomic system and the full content for having embedded software.Such as Fig. 1 institute
It is shown as a simple SOC functional unit schematic diagram, the accelerating engine can also be GPU, coding and decoding video engine, nerve in figure
Network accelerator, I/O controller can also be for USB, I2C, UART etc., now by taking Video coding task as an example, and CPU first will be to
1. the image information of coding is by being allocated to coding and decoding video engine, then coding and decoding video engine starts phase according to configuration information
The video encoding job answered, task pass through interrupt notification CPU again after the completion.It is illustrated in figure 2 the execution of prior art Video coding
Mission flow diagram, the task are divided into image one by one and are encoded, every one frame of configuration coding and decoding video engine of CPU, depending on
Frequency encoding and decoding engine encodes a frame, and if it is the register for directly configuring coding and decoding video engine, CPU will be unable to execute it at this time
Its task.The defect of the working method are as follows: executing the time will be the time of CPU configuration accelerating engine plus accelerating engine itself
The time is executed, if the time that CPU configures accelerating engine at this time still cannot be ignored in the case of configuration register is more
's.
Summary of the invention
Technical problem to be solved of the invention is the defect for overcoming the above prior art to propose, provides a kind of hard
The method and device of the general self-configuring of part module.
The present invention is achieved by the following technical solutions: a kind of method of the general self-configuring of hardware module, this method packet
Include following steps:
Step 1: the work of CPU configuration register is converted to descriptor；
Task is packaged into descriptor and writes memory outside piece by step 2:CPU；
Step 3: to accelerating engine, accelerating engine is read in be completed self after task descriptor and matches the first address of configures descriptor
It sets；
Step 4: starting to execute corresponding task.
As one of preferred embodiment of the invention, the descriptor includes several unit, the structure of each unit
Is defined as:
TERM:63bit indicates that current unit is the last one unit of descriptor, and hardware module is according to reading
This bit judges whether to need to read more unit；
N/C:62:48bit, Not cared；
CIDX:47:32bit, configures index, and CDATA is configured to the configuration that internal CIDX is indexed and posted by hardware module
Storage；
CDATA:31:0bit configures data.
As one of preferred embodiment of the invention, storage mode of the descriptor in external memory are as follows: Mei Gesuo
Unit is stated to be stored sequentially in some continuous address section.
As one of preferred embodiment of the invention, when the descriptor is defined as in the initial address that external memory is stored
When DHA,
Configuration register is as follows:
REG0, hardware read descriptor according to position of this register since external momory DHA；
REG1, internal certain functional configuration information A；
REG2, internal certain functional configuration information B；
REG3, internal certain functional configuration information C；
...
REGN, internal certain functional configuration information N；
Corresponding descriptor is as shown in the table at this time:
The invention also discloses a kind of devices of the general self-configuring of hardware module, comprising:
Conversion module: for the work of CPU configuration register to be converted to descriptor；
Package module: task is packaged by descriptor by CPU and writes memory outside piece；
Configuration module: to accelerating engine, accelerating engine reads in complete after task descriptor the first address for configures descriptor
At self-configuration；
Execution module: corresponding task is executed for starting.
The present invention compared with prior art the advantages of be: the present invention by CPU will configures descriptor be written piece outside
Memory, and configures descriptor is written memory outside piece and can concurrently executed with the upper task of accelerating engine execution by CPU,
Effectively raise the performance of system.The present invention is high relative to the interface efficiency of common CPU configuration accelerating engine.
Detailed description of the invention
Fig. 1 is the simple SOC functional unit schematic diagram mentioned in background of invention；
Fig. 2 is that the prior art Video coding of background of invention mentioned executes mission flow diagram；
Fig. 3 is improved general execution mission flow diagram of the invention；
Fig. 4 is the hardware module configuration of the invention using after this mechanism and work flow diagram.
Specific embodiment
It elaborates below to the embodiment of the present invention, the present embodiment carries out under the premise of the technical scheme of the present invention
Implement, the detailed implementation method and specific operation process are given, but protection scope of the present invention is not limited to following implementation
Example.
Improvement principle of the invention: the interface efficiency that in general CPU configures accelerating engine is usually lower, will compared to CPU
It is slow that configures descriptor is written the outer memory of piece, and CPU by configures descriptor be written outside piece memory can and accelerating engine
It executes a task concurrently to execute, thus can effectively improve the performance of system.Based on this, now by CPU configuration register
Work be converted to descriptor, task is packaged into descriptor and writes memory outside piece by CPU, then only needs the head of configures descriptor
To accelerating engine, accelerating engine is completed to self-configure after reading in task descriptor for address, then starts to execute corresponding task,
Based on principles above: as shown in Figure 3: a kind of method of the general self-configuring of hardware module, this method includes following step
It is rapid:
Step 1: the work of CPU configuration register is converted to descriptor；The descriptor includes several unit, often
The structure of a unit is defined as shown in following table:
Task is packaged into descriptor and writes memory outside piece by step 2:CPU；Table specific as follows:
Step 3: to accelerating engine, accelerating engine is read in be completed self after task descriptor and matches the first address of configures descriptor
It sets；When the descriptor is when the initial address that external memory is stored is defined as DHA, in order to facilitate illustrating, it is assumed that match
Confidence breath is tri- kinds of A, B, C, and configuration register is as follows:
Corresponding descriptor is as shown in the table at this time:
Step 4: starting to execute corresponding task；Using after this mechanism hardware module configuration and workflow such as Fig. 4.
REG1~REG3 was originally needed to configure in upper example and just completes configuration to hardware module, after the solution of the present invention
REG0 only need to be configured, configuration information is usually much more many than in upper example in truth, thus to system performance and release CPU
Load it is still very considerable.
In addition from the structure of unit can be seen that may the configuration register within the scope of the CIDX to any 16bit carry out
Configuration, and configuration sequence can flexibly change, also there is no limit so the present invention has stronger versatility to the quantity of unit.
In addition the invention also discloses a kind of devices of the general self-configuring of hardware module, comprising:
Conversion module: for the work of CPU configuration register to be converted to descriptor；
Package module: task is packaged by descriptor by CPU and writes memory outside piece；
Configuration module: to accelerating engine, accelerating engine reads in complete after task descriptor the first address for configures descriptor
At self-configuration；
Execution module: corresponding task is executed for starting.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention
Made any modifications, equivalent replacements, and improvements etc., should all be included in the protection scope of the present invention within mind and principle.
Claims (5)
1. a kind of method of the general self-configuring of hardware module, which is characterized in that method includes the following steps:
Step 1: the work of CPU configuration register is converted to descriptor；
Task is packaged into descriptor and writes memory outside piece by step 2:CPU；
Step 3: the first address of configures descriptor to accelerating engine, after reading in task descriptor complete to self-configure by accelerating engine；
Step 4: starting to execute corresponding task.
2. the method for the general self-configuring of hardware module according to claim 1, which is characterized in that if the descriptor includes
Dry unit, the structure of each unit is defined as:
TERM:63bit indicates that current unit is the last one unit of descriptor, and hardware module is according to this bit read
Judge whether to need to read more unit；
N/C:62:48bit, Not cared；
CIDX:47:32bit, configures index, and CDATA is configured to the configuration that internal CIDX is indexed and deposited by hardware module
Device；
CDATA:31:0bit configures data.
3. the method for the general self-configuring of hardware module according to claim 2, which is characterized in that the descriptor is in outside
Storage mode in memory are as follows: each Unit is stored sequentially in some continuous address section.
4. the method for the general self-configuring of hardware module according to claim 3, which is characterized in that when the descriptor outside
When the initial address of portion memory storage is defined as DHA,
Configuration register is as follows:
REG0, hardware read descriptor according to position of this register since external momory DHA；
REG1, internal certain functional configuration information A；
REG2, internal certain functional configuration information B；
REG3, internal certain functional configuration information C；
...
REGN, internal certain functional configuration information N；
Corresponding descriptor is as shown in the table at this time:
5. a kind of device of the general self-configuring of hardware module according to claim 1 to 4 characterized by comprising
Conversion module: for the work of CPU configuration register to be converted to descriptor；
Package module: task is packaged by descriptor by CPU and writes memory outside piece；
Configuration module: the first address for configures descriptor to accelerating engine, complete certainly after reading in task descriptor by accelerating engine
I configures；
Execution module: corresponding task is executed for starting.
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| CN102521179A (en) * | 2011-11-28 | 2012-06-27 | 曙光信息产业股份有限公司 | Achieving device and achieving method of direct memory access (DMA) reading operation |
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2018
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| US9158713B1 (en) * | 2010-04-07 | 2015-10-13 | Applied Micro Circuits Corporation | Packet processing with dynamic load balancing |
| CN102521179A (en) * | 2011-11-28 | 2012-06-27 | 曙光信息产业股份有限公司 | Achieving device and achieving method of direct memory access (DMA) reading operation |
| CN103428099A (en) * | 2013-08-21 | 2013-12-04 | 中国人民解放军国防科学技术大学 | Flow control method for universal multi-core network processor |
| CN103885840A (en) * | 2014-04-04 | 2014-06-25 | 华中科技大学 | FCoE protocol acceleration engine IP core based on AXI4 bus |
| CN105323184A (en) * | 2015-10-08 | 2016-02-10 | 盛科网络（苏州）有限公司 | Method and device for saving RAM resource and realizing traffic statistics |
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Application publication date: 20190528 |