CN109144853B - Software defined radio SoC chip debugging system - Google Patents

Software defined radio SoC chip debugging system Download PDF

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CN109144853B
CN109144853B CN201810832363.XA CN201810832363A CN109144853B CN 109144853 B CN109144853 B CN 109144853B CN 201810832363 A CN201810832363 A CN 201810832363A CN 109144853 B CN109144853 B CN 109144853B
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message
debugging
query
information
debugging information
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CN109144853A (en
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卢山
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CETC 54 Research Institute
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/362—Software debugging
    • G06F11/3644—Software debugging by instrumenting at runtime
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/3664—Environments for testing or debugging software
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/544—Buffers; Shared memory; Pipes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/546—Message passing systems or structures, e.g. queues

Abstract

The invention discloses a software defined radio SoC chip debugging system, and belongs to the technical field of software defined radio SoC chip waveform development. The invention utilizes the global variable in the SoC chip baseband processor to store the debugging information and sends an instruction through the application processor to obtain the debugging information. The invention does not need other hardware debugging tools when debugging the baseband processor, is convenient to use, does not frequently generate interruption in the process of acquiring debugging information, and does not influence the execution efficiency of the baseband processor.

Description

Software defined radio SoC chip debugging system
Technical Field
The invention relates to the technical field of software defined radio SoC chip waveform development, which is suitable for a waveform development process based on a software defined radio SoC chip with an application processor and a baseband processor as an architecture, in particular to a software defined radio SoC chip debugging system.
Background
At present, a software defined radio SoC chip is gradually a preferred architecture of a small-sized low-power consumption device due to the advantages of high integration level and high bus throughput. In the process of developing the waveform based on the software defined radio SoC chip, debugging information needs to be acquired for querying data in the processing process and recording the program running process.
The traditional debugging tool needs the support of special hardware, such as Trace32, JBOX and the like, however, the special tool is expensive in selling price and needs a hardware reserved debugging interface, and the cost and the area of a hardware board card are increased. In addition, a heterogeneous multi-core architecture is adopted in the software defined radio SoC chip, and a traditional debugging tool usually only supports a certain type of core, for example, JBOX only supports DSP debugging, so that multiple debugging tools are needed to be used in a cross manner in the debugging process, and the debugging requirements of engineers cannot be well met.
Disclosure of Invention
The invention aims to provide a software defined radio SoC chip debugging system aiming at the defects of the prior art, which has the characteristics of convenient use and no influence on the execution efficiency of a baseband processor.
In order to achieve the purpose, the invention adopts the following technical scheme:
a software defined radio SoC chip debugging system comprises an upper computer and a SoC chip, wherein the SoC chip comprises an application processor and a baseband processor, a debugging information query thread runs in the application processor, and a debugging information recovery thread runs in the baseband processor;
the debugging information query thread is used for executing the following steps:
(A1) receiving a query instruction through the upper computer, sending a message serial number and query information to a debugging information recovery thread in a mode of query information through a debugging channel according to a pre-defined debugging protocol, and simultaneously outputting the message serial number and query content queried at this time through standard output equipment of the upper computer; the message sequence number is a random number, and the query information is used for specifying the address and the length of debugging information to be queried in the baseband processor;
(A2) receiving a reply message of the debugging information reply thread, extracting a message serial number and debugging information from the reply message, and outputting the message serial number and the debugging information through standard output equipment of an upper computer;
the debugging information recovery line is used for executing the following steps:
(B1) receiving a query message sent by a debugging information query thread, extracting a message serial number and query information, and acquiring debugging information according to an address and length specified by the query information;
(B2) and sending the debugging information and the corresponding message sequence number to a debugging information query thread through a debugging channel in a reply message mode according to a pre-defined debugging protocol.
Optionally, the query message and the reply message are both in the form of a structure, and the structure includes a message sequence number, a message ID, and a message content; the message sequence number is a random number generated by the application processor, and the sequence number is stored when the baseband processor receives the message and is added when replying the message, so as to determine the attribution of the reply message; the message ID is used for marking the debugging type corresponding to the query or reply action; the message content is used for storing query information or debugging information.
Optionally, the implementation manner of the debug channel is as follows:
when the application/baseband processor sends a message to the baseband/application processor, the inquiry/reply message is stored in a designated address of the shared memory of the SoC chip, then the baseband/application processor is triggered to interrupt, and the baseband/application processor acquires the inquiry/reply message from the designated address after responding to the interrupt.
Compared with the prior art, the invention has the following beneficial effects:
(1) compared with a baseband processor debugging system of a traditional SoC chip, the debugging system does not need other hardware debugging tools and is convenient to use;
(2) compared with other debugging tools based on interaction of the application processor and the baseband processor, the debugging tool does not frequently generate interrupt in the process of acquiring the debugging information and does not influence the execution efficiency of the baseband processor.
Drawings
Fig. 1 is a block diagram of an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
As shown in fig. 1, a software-defined radio SoC chip debugging system includes an upper computer and an SoC chip, where the SoC chip includes an application processor and a baseband processor, where the application processor creates a debugging information query thread by adding an application, and the baseband processor adds a debugging information recovery thread by modifying a kernel;
the debugging information query thread is used for executing the following steps:
(A1) receiving a query instruction through the upper computer, sending a message serial number and query information to a debugging information recovery thread in a mode of query information through a debugging channel according to a pre-defined debugging protocol, and simultaneously outputting the message serial number and query content queried at this time through standard output equipment of the upper computer; the message sequence number is a random number, and the query information is used for specifying the address and the length of debugging information to be queried in the baseband processor;
(A2) receiving a reply message of the debugging information reply thread, extracting a message serial number and debugging information from the reply message, and outputting the message serial number and the debugging information through standard output equipment of an upper computer;
the debugging information recovery line is used for executing the following steps:
(B1) receiving a query message sent by a debugging information query thread, extracting a message serial number and query information, and acquiring debugging information according to an address and length specified by the query information;
(B2) and sending the debugging information and the corresponding message sequence number to a debugging information query thread through a debugging channel in a reply message mode according to a pre-defined debugging protocol.
Optionally, the query message and the reply message are both in the form of a structure, and the structure includes a message sequence number, a message ID, and a message content; the message sequence number is a random number generated by the application processor, and the sequence number is stored when the baseband processor receives the message and is added when replying the message, so as to determine the attribution of the reply message; the message ID is used for marking the debugging type corresponding to the query or reply action; the message content is used for storing query information or debugging information.
Optionally, the implementation manner of the debug channel is as follows:
when the application/baseband processor sends a message to the baseband/application processor, the inquiry/reply message is stored in a designated address of the shared memory of the SoC chip, then the baseband/application processor is triggered to interrupt, and the baseband/application processor acquires the inquiry/reply message from the designated address after responding to the interrupt.
Specifically, in order to construct the debugging system, the cores of the baseband processor and the application processor in the SoC chip need to be modified in advance, and a new thread is added into each core. The modification mode is as follows:
(1) defining a communication instruction set of an application processor and a baseband processor;
the communication instruction set specifies a debugging protocol for the application processor and the baseband processor. The application processor determines the type of the debugging information according to the information to be inquired, and the baseband processor performs corresponding processing according to different types of the debugging information. The communication instruction set is defined by a user according to the content needing debugging, and takes version information and working state as an example, the communication instruction set comprises the following steps:
version information
Type of debug information 1 st to 4 th bytes Bytes 5 to N
Querying information 0x0001 Invalidation Invalidation
Reply message 0x0001 Version numbers, e.g. 0x20180323 Invalidation
Working state
Type of debug information Byte 1 Bytes 2 to N
Querying information 0x0002 Invalidation Invalidation
Reply message 0x0002 0x00IDLE；0x01INIT；0x02NORM Invalidation
(2) Defining a debugging message structure body of an application processor and a baseband processor;
the debug message structure needs to contain a message sequence number, a message ID, and message content. The message sequence number is a group of random numbers generated by the application processor, the sequence number is stored when the baseband processor receives the message, and the sequence number is added during reply and is used for determining the attribution of the reply message; the message ID sets a corresponding fixed ID according to different types of debugging information to be inquired, and the fixed ID is used for identifying the type of the debugging information; the message content mainly stores query information or debug information.
The debug message structure is described as follows:
Figure BDA0001743801740000051
Figure BDA0001743801740000061
wherein u16_ seq represents the message sequence number, u16_ command represents the message ID, and vp _ msg _ body points to the message content.
(3) Determining debugging channels of an application processor and a baseband processor;
if the application processor and the baseband processor have a message mechanism, the message mechanism can be used for the debugging channel, and if the message mechanism does not exist, the debugging channel needs to be established. The debugging channel is realized by adopting an interrupt and a shared memory, when the application/baseband processor sends a message to the baseband/application processor, the message length and the message can be stored in a designated address in the shared memory, then the baseband/application processor is triggered to be interrupted, and the baseband/application processor responds to the interrupt and then acquires the message length and the message of the designated address.
(4) Establishing a debugging information query task in an application processor;
the debugging information query task of the application processor is divided into two parts of sending query messages and receiving reply messages, and a plurality of branches are respectively arranged according to the debugging instruction set in the step (1) and with reference to different debugging information types. When the task is in a state of sending the query message, each branch generates a 16-bit random number as a message sequence number to be filled in u16_ seq of the debugging message structure body and outputs the message sequence number by using standard output equipment when executing; then representing the type of the debugging information corresponding to the branch by a message ID and filling the type of the debugging information into u16_ command of a debugging message structure body; and finally, filling query information in the address pointed by the vp _ msg _ body of the message structure body and sending the message through the debugging channel in the step (3). When the task is in a state of receiving the reply message, analyzing the reply message, and entering a corresponding branch according to the message ID; then, analyzing the reply message according to the debugging instruction set in the step (1); and finally, outputting the replied debugging information and the message sequence number by using standard output equipment.
(5) Establishing a debugging information reply task in a baseband processor;
and the debugging information reply task of the baseband processor analyzes the query information after receiving the query information, and transfers the query information to a corresponding branch for processing according to the information ID. In the branch, firstly, the message sequence number is recorded; then, filling the debugging information to be replied to the address pointed by vp _ msg _ body in the reply message according to the debugging instruction set in the step (1); and finally, filling the recorded message sequence number and the message ID into u16_ seq and u16_ command in the reply message respectively and sending the message through the debugging channel in the step (3).
The system can directly read the global variable in the baseband processor so as to obtain the debugging information to be obtained, and the debugging information is sent to the application processor through the debugging channel when the application processor sends an instruction. The invention realizes the debugging function of the baseband processor in the application processor, the debugging information is stored in the local and is acquired when needing to be checked, and the interruption can not be frequently generated, thereby ensuring the execution efficiency of the baseband processor.
In conclusion, the system is convenient to use, does not affect the execution efficiency of the baseband processor, and is an important improvement on the prior art.

Claims (2)

1. A software-defined radio SoC chip debugging system is characterized by comprising an upper computer and a SoC chip, wherein the SoC chip comprises an application processor and a baseband processor, a debugging information query thread runs in the application processor, and a debugging information recovery thread runs in the baseband processor;
the debugging information query thread is used for executing the following steps:
(A1) receiving a query instruction through the upper computer, sending a message serial number and query information to a debugging information recovery thread in a mode of query information through a debugging channel according to a pre-defined debugging protocol, and simultaneously outputting the message serial number and query content queried at this time through standard output equipment of the upper computer; the message sequence number is a random number, and the query information is used for specifying the address and the length of debugging information to be queried in the baseband processor;
(A2) receiving a reply message of the debugging information reply thread, extracting a message serial number and debugging information from the reply message, and outputting the message serial number and the debugging information through standard output equipment of an upper computer;
the debugging information recovery line is used for executing the following steps:
(B1) receiving a query message sent by a debugging information query thread, extracting a message serial number and query information, and acquiring debugging information according to an address and length specified by the query information;
(B2) according to a pre-defined debugging protocol, sending debugging information and a message serial number corresponding to the debugging information to a debugging information query thread through a debugging channel in a reply message mode;
the debugging channel is realized in the following mode:
when the application processor sends a message to the baseband processor, storing the query message in a designated address of the shared memory of the SoC chip, then triggering the baseband processor to interrupt, and obtaining the query message from the designated address after the baseband processor responds to the interrupt;
when the baseband processor sends a message to the application processor, the reply message is stored in a designated address of the shared memory of the SoC chip, the application processor is triggered to interrupt, and the application processor acquires the reply message from the designated address after responding to the interrupt.
2. The software-defined radio SoC chip debugging system of claim 1, wherein the query message and the reply message are in the form of a fabric comprising a message sequence number, a message ID, and a message content; the message sequence number is a random number generated by the application processor, and is stored when the baseband processor receives the query message, and is added when replying the query message, so as to determine the attribution of the reply message; the message ID is used for marking the debugging type corresponding to the query or reply action; the message content is used for storing query information or debugging information.
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CN109857382B (en) * 2019-03-11 2022-02-18 中国电子科技集团公司第五十四研究所 SoC chip software defined radio decoupling design method
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