CN109408208A - Multi-task processing method, equipment, system and the storage medium of navigation chip - Google Patents
Multi-task processing method, equipment, system and the storage medium of navigation chip Download PDFInfo
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- CN109408208A CN109408208A CN201811106824.1A CN201811106824A CN109408208A CN 109408208 A CN109408208 A CN 109408208A CN 201811106824 A CN201811106824 A CN 201811106824A CN 109408208 A CN109408208 A CN 109408208A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
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Abstract
The present invention relates to a kind of multi-task processing method of navigation chip, equipment, system and storage mediums, comprising: establishes first task set and the second set of tasks respectively;Preset the dispatching priority of the first task set and second set of tasks in different working condition;Flow of navigation is decomposed into multiple navigation subtasks for belonging to the first task set;It is multiple read-write subtasks for belonging to second set of tasks by reading and writing data flowsheet simulation;According to dispatching priority corresponding to current working condition, is chosen in first task set and the second set of tasks and execute corresponding subtask.The present invention realizes navigation locating function and data read-write capability, under the premise of meeting function and perfect performance, can save a MCU processing chip, the convenience of exploitation is provided to client and developer, it saves development cost, the development cycle and exploits natural resources, reduce the size of product board.
Description
Technical field
The present invention relates to satellite navigation positioning technical field, more particularly to navigation chip multi-task processing method, set
Standby, system and storage medium.
Background technique
Currently, the consumer electronics product of navigation feature is had, navigator fix chip and realization reading and writing data functional chip
Be it is independent, need two MCU chips to be just able to achieve above-mentioned navigation locating function and data read-write capability, increase Design Navigation
The cost and complexity of equipment, while will increase the volume of portable electronic product.
Summary of the invention
Based on this, it is necessary to be directed to navigation equipment cost and capacity issue, provide a kind of multitasking of navigation chip
Method, equipment, system and storage medium.
A kind of multi-task processing method based on single navigation chip, which comprises
First task set and the second set of tasks are established respectively;
Preset the dispatching priority of the first task set and second set of tasks in different working condition;
Flow of navigation is decomposed into multiple navigation subtasks for belonging to the first task set;
It is multiple read-write subtasks for belonging to second set of tasks by reading and writing data flowsheet simulation;
According to dispatching priority corresponding to current working condition, selected in first task set and the second set of tasks
It takes and executes corresponding subtask.
The first task set and second set of tasks preset is in different works in one of the embodiments,
Make the dispatching priority step under state further include:
In navigational state, the dispatching priority for presetting the first task set is higher than the tune of second set of tasks
Spend priority;
In reading and writing data state, the dispatching priority of the first task set is preset lower than second set of tasks
Dispatching priority.
The dispatching priority according to corresponding to current working condition in one of the embodiments, first
It is chosen in business set and the second set of tasks and executes corresponding subtask step further include:
Judge the dispatching priority height of the first task set and second set of tasks,
If the dispatching priority of the first task set is higher than the dispatching priority of second set of tasks, described
First task set is first handled,
If the dispatching priority of the first task set is lower than the dispatching priority of second set of tasks, described
Second set of tasks is first handled.
A kind of navigation chip for multitasking, comprising:
Set of tasks module, for establishing first task set and the second set of tasks respectively;
Dispatching priority module, for presetting the first task set and second set of tasks in different operating shape
Dispatching priority in state;
Navigation module, for flow of navigation to be decomposed into multiple navigation subtasks for belonging to the first task set;
Data read-write module, for being multiple read-writes for belonging to second set of tasks by reading and writing data flowsheet simulation
Subtask;
Queue execution module, for the dispatching priority according to corresponding to current working condition, in first task set
With chosen in the second set of tasks and execute corresponding subtask.
The dispatching priority module includes: in one of the embodiments,
Navigational state unit, the dispatching priority for presetting the first task set are higher than second set of tasks
Dispatching priority;
Read-write state unit, for presetting the dispatching priority of the first task set lower than second set of tasks
Dispatching priority.
A kind of navigation equipment based on single navigation chip, including the navigation chip for multitasking, the navigation is set
Standby further includes the flash memory with navigation chip communication connection, and the flash memory is used in the reading and writing data process for the core that navigates
Piece is read or write-in data.
The navigation chip is provided with SQI interface in one of the embodiments, and the flash memory passes through the SQI interface
It is connect with the navigation chip.
A kind of multitasking system based on single navigation chip, it is described including the navigation equipment based on single navigation chip
Multitasking system based on single navigation chip further includes computer equipment, the computer equipment and the navigation equipment phase
It connects.
The navigation chip is provided with HID interface in one of the embodiments, and the computer equipment passes through described
HID interface is connect with the navigation chip.
A kind of computer readable storage medium, is stored thereon with computer program, and the computer program is held by processor
It is performed the steps of when row
First task set and the second set of tasks are established respectively;
Preset the dispatching priority of the first task set and second set of tasks in different working condition;
Flow of navigation is decomposed into multiple navigation subtasks for belonging to the first task set;
It is multiple read-write subtasks for belonging to second set of tasks by reading and writing data flowsheet simulation;
According to dispatching priority corresponding to current working condition, selected in first task set and the second set of tasks
It takes and executes corresponding subtask.
Multi-task processing method based on single navigation chip of the invention realizes navigation locating function and reading and writing data function
Can, under the premise of meeting function and perfect performance, a MCU processing chip can be saved, is provided to client and developer
The convenience of exploitation, saves development cost, the development cycle and exploits natural resources, and reduces the size of product board.
Detailed description of the invention
Fig. 1 is the applied environment figure of the multi-task processing method based on single navigation chip in one embodiment;
Fig. 2 is the module diagram in one embodiment for the navigation chip of multitasking;
Fig. 3 is the flow chart of the multi-task processing method based on single navigation chip in one embodiment;
Fig. 4 is the module diagram of the navigation equipment based on single navigation chip in one embodiment;
Fig. 5 is the workflow schematic diagram of the multitasking system based on single navigation chip in one embodiment.
Specific embodiment
It is with reference to the accompanying drawings and embodiments, right in order to which the objects, technical solutions and advantages of the application are more clearly understood
The application is further elaborated.It should be appreciated that specific embodiment described herein is only used to explain the application, not
For limiting the application.
Multi-task processing method provided by the present application based on single navigation chip, can be applied to application as shown in Figure 1
In environment.Wherein, navigation equipment 20 and computer equipment 10 communicate to connect.The navigation equipment 20 is using based on single navigation chip
Multi-task processing method, navigation locating function and reading and writing data function are realized by a navigation chip 200.
In one embodiment, it as shown in Fig. 2, providing a kind of navigation chip 200 for multitasking, is equipped with
Embedded OS FreeRTOS, comprising: set of tasks module, dispatching priority module, navigation module, data read-write module
With queue execution module, in which:
Set of tasks module 210, for establishing first task set and the second set of tasks respectively.
Dispatching priority module 220, for presetting the first task set and second set of tasks in different works
Make the dispatching priority in state.
Navigation module 230 is appointed for flow of navigation to be decomposed into multiple navigation for belonging to the first task set
Business.
Data read-write module 240, for being multiple to belong to second set of tasks by reading and writing data flowsheet simulation
Read and write subtask.
Queue execution module 250, for the dispatching priority according to corresponding to current working condition, in first task collection
It closes and is chosen in the second set of tasks and execute corresponding subtask.
The dispatching priority module 220 includes: navigational state unit 221 and read-write state unit 222.
The navigational state unit 221, the dispatching priority for presetting the first task set are higher than described second
The dispatching priority of set of tasks.
The read-write state unit 222, for presetting the dispatching priority of the first task set lower than described second
The dispatching priority of set of tasks.
The Data Data module for reading and writing 240 includes: data processing unit 241 and read-only memory unit 242.
The data processing unit 241, for realizing reading and writing data function.In one embodiment, the data processing
Unit 241 realizes reading and writing data function using HID.
The read-only memory unit 242, for realizing read-only store function.In one embodiment, the read-only storage
Unit 242 uses read-only memory (CDROM), prevents antivirus software from deleting the practical writing in read-only memory (CDROM) drive
Part.
The above-mentioned navigation chip 200 for multitasking realizes number by the multi-task mechanism of single navigation chip 200
According to coexisting for both read-write capability and navigation locating function, navigation locating function can also be realized without radio-frequency module, relative to existing
There is chip to need two reading and writing data function and navigation locating function just can be achieved, method of the invention passes through a navigation
Chip 200 can realize reading and writing data function and navigation locating function.
In one embodiment, as shown in figure 3, a kind of multi-task processing method based on single navigation chip is provided, with this
Method is applied to be illustrated for the navigation equipment 20 in Fig. 1, comprising the following steps:
Step 302, first task set and the second set of tasks are established respectively.
Step 304, the scheduling of the first task set and second set of tasks in different working condition is preset
Priority.
The step further include:
In navigational state, the dispatching priority for presetting the first task set is higher than the tune of second set of tasks
Spend priority;
In reading and writing data state, the dispatching priority of the first task set is preset lower than second set of tasks
Dispatching priority.
Step 306, flow of navigation is decomposed into multiple navigation subtasks for belonging to the first task set.
In the present embodiment, multiple navigation subtasks include:
Satellite-signal is received, by down coversion, filtering, mixing operation and analog-to-digital conversion, obtains digital signal;
Operation is captured and tracked according to the digital signal, realizes bit synchronization and frame synchronization;
The information of satellite-signal is resolved, location navigation result is exported.
The information of the satellite-signal includes the information such as signal strength, the elevation angle and azimuth.
It step 308, is multiple read-write subtasks for belonging to second set of tasks by reading and writing data flowsheet simulation.
In the present embodiment, multiple read-write subtasks include:
Symbol is described to enumerate, realizes that computer equipment 10 can identify HID and CDROM equipment interface;
HID and CDROM equipment complex drive is shown in the computer equipment 10.
Step 310, the dispatching priority according to corresponding to current working condition, in first task set and the second task
It is chosen in set and executes corresponding subtask.
The step further include:
Judge the dispatching priority height of the first task set and second set of tasks,
If the dispatching priority of the first task set is higher than the dispatching priority of second set of tasks, described
First task set is first handled, if the dispatching priority of the first task set is lower than the tune of second set of tasks
Priority is spent, then second set of tasks is first handled.This method using queue mechanism make the first task set and
Second set of tasks realizes the independent operating of the two, is not influenced by other side.
In the above-mentioned multi-task processing method based on single navigation chip, navigation locating function is handled by the way of multithreading
With data read-write capability, the two is set to be independent of each other, the respective task of complete independently.By presetting the scheduling in different working condition
Priority makes first task set and the second set of tasks using queue mechanism, real using multi signal mechanism by thread switching
It is existing, and then the independent operating of the two is realized, it is not influenced by other side, makes single navigation chip 200 while there is navigator fix function
It can be with data read-write capability.
It should be understood that although each step in the flow chart of Fig. 3 is successively shown according to the instruction of arrow, this
A little steps are not that the inevitable sequence according to arrow instruction successively executes.Unless expressly state otherwise herein, these steps
It executes there is no the limitation of stringent sequence, these steps can execute in other order.Moreover, at least part in Fig. 3
Step may include that perhaps these sub-steps of multiple stages or stage are executed in synchronization to multiple sub-steps
It completes, but can execute at different times, the execution sequence in these sub-steps or stage, which is also not necessarily, successively to be carried out,
But it can be executed in turn or alternately at least part of the sub-step or stage of other steps or other steps.
Specific restriction about the navigation chip for multitasking may refer to above to based on single navigation chip
Multi-task processing method restriction, details are not described herein.Modules in the above-mentioned navigation chip for multitasking
It can be realized fully or partially through software, hardware and combinations thereof.Above-mentioned each module can be embedded in the form of hardware or independently of
In processor in computer equipment, it can also be stored in a software form in the memory in computer equipment, in order to locate
It manages device and calls the corresponding operation of the above modules of execution.
In one embodiment, as shown in figure 4, providing a kind of navigation equipment 20 based on single navigation chip, comprising: use
In the navigation chip 200 of multitasking, the navigation equipment 20 further includes the flash memory with the navigation chip 200 communication connection
100, the flash memory 100 is used in the reading and writing data process that data to be read or be written for navigation chip 200.Specifically, institute
Stating flash memory 100 can be NORFlash, NANDFlash, SDCARD or other flash memories.In the present embodiment, the flash memory 100 is
NORFlash。
Optionally, the navigation chip 200 is provided with SQI interface, and the flash memory passes through the SQI interface and the navigation
Chip connection.
Optionally, the navigation chip 200 is additionally provided with peripheral interface.Specifically, the peripheral interface includes that UART connects
At least one of mouth, SPI interface or other interfaces.Peripheral equipment can be read in the flash memory 100 by the peripheral interface
Data realize that it realizes specified functional application.
In one embodiment, as shown in figure 5, providing a kind of multitasking system based on single navigation chip 200,
It further include computer equipment 10 including navigation equipment 20, the computer equipment 10 is connected with each other with the navigation equipment 20.
Optionally, the navigation chip 200 is provided with HID interface, the computer equipment 10 by the HID interface with
The navigation chip 200 connects.
When the computer equipment 10 is connect by HID interface with the navigation chip 200, the navigation chip 200
Internal reading and writing data function starting, realization is enumerated to be transmitted with data, can synchronize in the computer equipment 10 and data reading occurs
Write device interface and drive.
In the present embodiment, the computer equipment 10 is connected by usb bus and the HID interface of the navigation chip 200
It connects, the SQI interface of the navigation chip 200 is connect by SQI bus with the flash memory 100, realizes the reading of the flash memory 100
And write operation.The flash memory 100 is mapped as read-only memory (CDROM) drive in the computer equipment 10, for preventing
Only antivirus software deletes the application file in read-only memory (CDROM) drive.
Multi-task processing method based on single navigation chip of the invention realizes navigation locating function and reading and writing data function
Can, under the premise of meeting function and perfect performance, a MCU processing chip can be saved, is provided to client and developer
The convenience of exploitation, saves development cost, the development cycle and exploits natural resources, and reduces the size of product board.
Those of ordinary skill in the art will appreciate that realizing all or part of the process in above-described embodiment method, being can be with
Relevant hardware is instructed to complete by computer program, the computer program can be stored in a non-volatile computer
In read/write memory medium, the computer program is when being executed, it may include such as the process of the embodiment of above-mentioned each method.Wherein,
To any reference of memory, storage, database or other media used in each embodiment provided herein,
Including non-volatile and/or volatile memory.Nonvolatile memory may include read-only memory (ROM), programming ROM
(PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM) or flash memory.Volatile memory may include
Random access memory (RAM) or external cache.By way of illustration and not limitation, RAM is available in many forms,
Such as static state RAM (SRAM), dynamic ram (DRAM), synchronous dram (SDRAM), double data rate sdram (DDRSDRAM), enhancing
Type SDRAM (ESDRAM), synchronization link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM
(RDRAM), direct memory bus dynamic ram (DRDRAM) and memory bus dynamic ram (RDRAM) etc..
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned reality
It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, all should be considered as described in this specification.
The embodiments described above only express several embodiments of the present invention, and the description thereof is more specific and detailed, but simultaneously
It cannot therefore be construed as limiting the scope of the patent.It should be pointed out that coming for those of ordinary skill in the art
It says, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to protection of the invention
Range.Therefore, the scope of protection of the patent of the invention shall be subject to the appended claims.
Claims (10)
1. a kind of multi-task processing method based on single navigation chip, which comprises
First task set and the second set of tasks are established respectively;
Preset the dispatching priority of the first task set and second set of tasks in different working condition;
Flow of navigation is decomposed into multiple navigation subtasks for belonging to the first task set;
It is multiple read-write subtasks for belonging to second set of tasks by reading and writing data flowsheet simulation;
According to dispatching priority corresponding to current working condition, chosen simultaneously in first task set and the second set of tasks
Execute corresponding subtask.
2. the multi-task processing method according to claim 1 based on single navigation chip, which is characterized in that the default institute
State the dispatching priority step of first task set and second set of tasks under different working condition further include:
In navigational state, the dispatching priority for presetting the first task set is excellent higher than the scheduling of second set of tasks
First grade;
In reading and writing data state, the dispatching priority for presetting the first task set is lower than the tune of second set of tasks
Spend priority.
3. the multi-task processing method according to claim 1 based on single navigation chip, which is characterized in that the basis is worked as
Dispatching priority corresponding to preceding working condition is chosen in first task set and the second set of tasks and is executed corresponding
Subtask step further include:
Judge the dispatching priority height of the first task set and second set of tasks,
If the dispatching priority of the first task set be higher than second set of tasks dispatching priority, described first
Set of tasks is first handled,
If the dispatching priority of the first task set be lower than second set of tasks dispatching priority, described second
Set of tasks is first handled.
4. a kind of navigation chip for multitasking characterized by comprising
Set of tasks module, for establishing first task set and the second set of tasks respectively;
Dispatching priority module, for presetting the first task set and second set of tasks in different working condition
Dispatching priority;
Navigation module, for flow of navigation to be decomposed into multiple navigation subtasks for belonging to the first task set;
Data read-write module, for appointing reading and writing data flowsheet simulation for multiple read-write for belonging to second set of tasks
Business;
Queue execution module, for the dispatching priority according to corresponding to current working condition, in first task set and
It is chosen in two set of tasks and executes corresponding subtask.
5. the navigation chip according to claim 4 for multitasking, which is characterized in that the dispatching priority mould
Block includes:
Navigational state unit, the dispatching priority for presetting the first task set are higher than the tune of second set of tasks
Spend priority;
Read-write state unit, the dispatching priority for presetting the first task set are lower than the tune of second set of tasks
Spend priority.
6. a kind of navigation equipment based on single navigation chip, including claim 4~5 any one leading for multitasking
Navigate chip, which is characterized in that the navigation equipment further includes the flash memory with navigation chip communication connection, and the flash memory is used for
Data are read or are written for navigation chip in the reading and writing data process.
7. the navigation equipment according to claim 6 based on single navigation chip, which is characterized in that the navigation chip setting
There is SQI interface, the flash memory is connect by the SQI interface with the navigation chip.
8. a kind of multitasking system based on single navigation chip, including claim 6~7 is described in any item based on singly leading
The navigation equipment of boat chip, which is characterized in that the multitasking system based on single navigation chip further includes that computer is set
Standby, the computer equipment and the navigation equipment are connected with each other.
9. the multitasking system according to claim 8 based on single navigation chip, which is characterized in that the navigation core
Piece is provided with HID interface, and the computer equipment is connect by the HID interface with the navigation chip.
10. a kind of computer readable storage medium, is stored thereon with computer program, which is characterized in that the computer program
The method described in any one of claims 1 to 3 is realized when being executed by processor.
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112732424A (en) * | 2020-12-30 | 2021-04-30 | 北京明朝万达科技股份有限公司 | Multitasking method, system and medium |
CN114721602A (en) * | 2022-06-09 | 2022-07-08 | 泉州华中科技大学智能制造研究院 | Nor Flash rolling storage method and device based on FreeRTOS |
CN114862019A (en) * | 2022-05-05 | 2022-08-05 | 中国人民解放军国防科技大学 | Equal proportion average weight criterion-based navigation task planning method, system and equipment |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101339034A (en) * | 2007-07-02 | 2009-01-07 | 广信创新微电子技术(北京)有限公司 | Circuit system and method for receiving digital broadcasting signal and navigation positioning signal |
CN102567086A (en) * | 2010-12-30 | 2012-07-11 | 中国移动通信集团公司 | Task scheduling method, equipment and system |
CN202362822U (en) * | 2011-12-06 | 2012-08-01 | 肇庆全商联盟信息科技有限公司 | Multifunctional SIM (subscriber identity module) kernel driver |
CN102694740A (en) * | 2012-06-28 | 2012-09-26 | 迈普通信技术股份有限公司 | Method and device for scheduling queue |
CN102760082A (en) * | 2011-04-29 | 2012-10-31 | 腾讯科技(深圳)有限公司 | Method for managing task and mobile terminal |
CN103309734A (en) * | 2013-06-24 | 2013-09-18 | 哈尔滨工业大学 | Embedded task scheduling method based on priority grouping |
US20140245308A1 (en) * | 2013-02-25 | 2014-08-28 | Texas Instruments Incorporated | System and method for scheduling jobs in a multi-core processor |
CN107948229A (en) * | 2016-10-13 | 2018-04-20 | 腾讯科技(深圳)有限公司 | The method, apparatus and system of distributed storage |
-
2018
- 2018-09-21 CN CN201811106824.1A patent/CN109408208B/en active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101339034A (en) * | 2007-07-02 | 2009-01-07 | 广信创新微电子技术(北京)有限公司 | Circuit system and method for receiving digital broadcasting signal and navigation positioning signal |
CN102567086A (en) * | 2010-12-30 | 2012-07-11 | 中国移动通信集团公司 | Task scheduling method, equipment and system |
CN102760082A (en) * | 2011-04-29 | 2012-10-31 | 腾讯科技(深圳)有限公司 | Method for managing task and mobile terminal |
CN202362822U (en) * | 2011-12-06 | 2012-08-01 | 肇庆全商联盟信息科技有限公司 | Multifunctional SIM (subscriber identity module) kernel driver |
CN102694740A (en) * | 2012-06-28 | 2012-09-26 | 迈普通信技术股份有限公司 | Method and device for scheduling queue |
US20140245308A1 (en) * | 2013-02-25 | 2014-08-28 | Texas Instruments Incorporated | System and method for scheduling jobs in a multi-core processor |
CN103309734A (en) * | 2013-06-24 | 2013-09-18 | 哈尔滨工业大学 | Embedded task scheduling method based on priority grouping |
CN107948229A (en) * | 2016-10-13 | 2018-04-20 | 腾讯科技(深圳)有限公司 | The method, apparatus and system of distributed storage |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112732424A (en) * | 2020-12-30 | 2021-04-30 | 北京明朝万达科技股份有限公司 | Multitasking method, system and medium |
CN114862019A (en) * | 2022-05-05 | 2022-08-05 | 中国人民解放军国防科技大学 | Equal proportion average weight criterion-based navigation task planning method, system and equipment |
CN114721602A (en) * | 2022-06-09 | 2022-07-08 | 泉州华中科技大学智能制造研究院 | Nor Flash rolling storage method and device based on FreeRTOS |
CN114721602B (en) * | 2022-06-09 | 2022-08-23 | 泉州华中科技大学智能制造研究院 | Nor Flash rolling storage method and device based on FreeRTOS |
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