CN109805914B - Dynamic calibrator for non-invasive sphygmomanometer - Google Patents
Dynamic calibrator for non-invasive sphygmomanometer Download PDFInfo
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Abstract
The invention discloses a dynamic calibration instrument of a non-invasive sphygmomanometer, which comprises a power supply management module, a CPU control system, an input/output module and a blood pressure pulse simulation module; the input and output end of the CPU control system is in communication connection with the input and output end of the input and output module; the power management module supplies power to the CPU control system, the input and output module and the blood pressure pulse simulation module. The invention can solve the problem of magnitude transmission of the blood pressure measuring instrument for astronauts, and can be used as the basis for popularizing and applying the measuring standard device for verifying the blood pressure measuring instrument for the whole army and the whole country.
Description
Technical Field
The invention relates to the technical field of medical metering. In particular to a dynamic calibrator of a non-invasive sphygmomanometer.
Background
The blood pressure measuring instrument mainly refers to cuff type blood pressure measuring equipment such as a semi-automatic/full-automatic electronic sphygmomanometer, a blood pressure monitor (box), a multi-parameter monitor (including a non-invasive blood pressure detection system) and the like. At present, no blood pressure measuring instrument calibrating device and a quantity value transmission system exist in China. The research of the invention has the following important significance.
The needs of scientific research tasks are as follows: in the processes of manned space missions such as astronaut selection, astronaut training, astronaut daily inspection, space flight and the like, the blood pressure is one of important technical indexes for ensuring the physical health of astronauts and judging the physiological indexes of the astronauts, and the blood pressure measuring instrument is often used for medical supervision and medical insurance of the astronauts.
② the need of medical aid: blood pressure is one of the basic elements for ensuring vital activities and is also an important vital sign of the human body. Blood pressure is a very important pathological and physiological index of human body, so blood pressure measuring instruments are also one of the most frequently used medical instruments in medical institutions of various scales all over the world, and are generally used for clinical examination, diagnosis, first aid (including battlefield first aid), critical patients and postoperative care. The performance of the blood pressure measuring instrument and the accuracy of the diagnosis data play an important role in the life of the patient, and otherwise, the performance of the blood pressure measuring instrument and the accuracy of the diagnosis data can become killers of the patient. At present, the blood pressure measuring instruments used by most medical institutions are not listed in strong examination, so that many hospitals generally do not pay attention to the metrological examination and the metrological examination of the blood pressure measuring instruments, most of the blood pressure measuring instruments used in the medical institutions do not carry out quantity value transmission, and phenomena of air leakage of a leather hose, uneven inflation and deflation of an air pump and the like exist, so that many faults and hidden dangers exist, and medical treatment is seriously influenced.
(iii) need for military medical metrology development
Military medical measurement is carried out before local medical measurement, the magnitude transmission work of a blood pressure measuring instrument becomes a biomechanical measurement parameter which needs to be solved urgently through early investigation and analysis, and the research of the subject is carried out through the contact communication between the subject group and a liberation military biomechanical master station and a military medical measurement supervision and management office, and the magnitude transmission applied to the blood pressure measurement accords with the development direction of the military medical measurement.
At present, more than 70 manufacturers produce blood pressure measuring instruments globally, the models of the blood pressure measuring instruments can reach more than 500, the number of the blood pressure measuring instruments is large, the application range is wide, the status is important, the risk value is high, the total amount of various blood pressure measuring instruments imported in China is about 10 thousands, and the total amount of hospitals above the provincial level and the military level can reach more than one hundred. The army has 150 army hospital metering stations and more local hospital metering institutions, and a complete calibration device needs to be developed urgently, calibration regulations are compiled, and magnitude transmission is carried out. Therefore, the research of the subject can solve the problem of magnitude transmission of the blood pressure measuring instrument of the astronaut, and can be used as the basis for popularizing and applying the measuring standard device for verifying the blood pressure measuring instrument in the whole army and the whole country.
Disclosure of Invention
Therefore, the technical problem to be solved by the present invention is to provide a noninvasive sphygmomanometer that can solve the transmission of blood pressure measurement values.
In order to solve the technical problems, the invention provides the following technical scheme:
the noninvasive sphygmomanometer dynamic calibration instrument comprises a power management module, a CPU control system, an input/output module and a blood pressure pulse simulation module; the input and output end of the CPU control system is in communication connection with the input and output end of the input and output module; the power management module supplies power to the CPU control system, the input and output module and the blood pressure pulse simulation module.
The technical scheme of the invention achieves the following beneficial technical effects:
therefore, the blood pressure and pulse simulation system of the noninvasive sphygmomanometer dynamic calibrator can provide the functions of static pressure output and measurement, automatic leakage test, dynamic blood pressure simulation and automatic test simulation, can solve the magnitude transmission problem of a blood pressure measuring instrument for astronauts, and can be used as a basis for popularization and application of a metering standard device for testing the blood pressure measuring instrument for the whole army and the whole country.
The power management module reasonably configures the +24V step-down circuit to +22V step-down circuit, the +5V _ D step-down circuit to +3.3V _ D step-down circuit and the +3.3V _ D step-down circuit to +1.5V _ D step-down circuit, thereby providing accurate power supply support with different requirements for the blood pressure pulse simulation system of the noninvasive sphygmomanometer dynamic calibrator, preventing burning damage of components, coordinating the power supply requirements between the CPU control system and the input/output module as well as the blood pressure pulse simulation module, providing an omnibearing power supply solution for the noninvasive sphygmomanometer dynamic calibrator, and further realizing multiple functions of the noninvasive sphygmomanometer dynamic calibrator blood pressure pulse simulation system.
The CPU control system receives the instruction of the input and output module, then the core chip FPGA receives the instruction, and controls the corresponding circuits to drive the stepping motor, the photoelectric switch, the air release valve, the inflation air pump and the pressure sensor to work, so that the simulation of the blood pressure pulse wave of the blood pressure pulse simulation system of the noninvasive sphygmomanometer dynamic calibrator is completed, and the functions of static pressure output and measurement, automatic leakage test, dynamic blood pressure simulation and automatic test simulation are realized.
The blood pressure pulse simulation module senses the pressure in a test pipeline through a pressure sensor, precisely adjusts the pressure in the pipeline through a first air release valve, a second air release valve, a third air release valve and an inflator pump, simulates a blood pressure value and realizes a leakage test; the piston rod is driven by the skillfully designed stepping motor, so that the piston simulates pulse waves in the piston walking section, and whether the piston resets or reaches the maximum stroke is detected by installing an initial end photoelectric switch and a terminal photoelectric switch at the initial end and the terminal end of the piston walking section respectively, thereby preventing the damage of the calibrator.
The dynamic calibration instrument of the non-invasive sphygmomanometer of the invention has the following main technical indexes:
1. simulation technology: an oscillometric method.
2. Dynamic blood pressure analog value: measurable range: contracting pressure: (20-250) mmHg; diastolic pressure: (5-200) mmHg. Repeatability: 0.5 mmHg; there are 7 sets of pre-settable systolic/diastolic pressures.
3. Pressure measurement: pressure measurement range: 0-400 mmHg; and (3) measuring precision: 0.5 mmHg.
4. Pulse waveform: pulse amplitude: 2.0 mmHg; rise time: 80 ms; heart rate range: (1-200) BPM; step length: 1 BPM; heart rate accuracy: plus or minus 1 percent.
5. And (3) system leakage test: starting pressure: 200 mmHg; maximum pressure: 400 mmHg; operating time: 60 s; the leakage range can be measured: (0.25-400) mmHg; and (3) measuring results: and displaying the current pressure value, the starting pressure, the ending pressure, the running time and the leakage rate.
6. Pressure release test: measurement range: 0-400 mmHg; and (3) measuring results: the peak is displayed.
Drawings
FIG. 1 is a schematic diagram of the dynamic calibration instrument of the non-invasive sphygmomanometer;
FIG. 2a is a system diagram of the noninvasive sphygmomanometer dynamic calibration instrument of the present invention; FIG. 2b is a block diagram of the CPU control system of the non-invasive sphygmomanometer dynamic calibration apparatus of the present invention;
FIG. 3 is a circuit diagram of a +5V _ D buck to +3.3V _ D buck circuit of the voltage management module;
FIG. 4 is a circuit diagram of a +3.3V _ D buck to +1.5V _ D voltage management module;
FIG. 5 is a circuit diagram of a +24V buck to +22V buck circuit of the voltage management module;
FIG. 6 is a circuit diagram of the J5V interface of the voltage management module;
FIG. 7 is a circuit diagram of the J24V interface of the voltage management module;
FIG. 8 is a circuit diagram of the J22V interface of the voltage management module;
FIG. 9 is a circuit diagram of a bleed valve/inflation pump drive circuit;
FIG. 10 is a circuit diagram of a stepper motor driver;
FIG. 11 is a stepper motor driver circuit diagram;
FIG. 12 is a circuit diagram of a stepper motor driver interface Jm 1;
FIG. 13 is a circuit diagram of a stepper motor driver interface Jm 2;
FIG. 14 is a circuit diagram of BANK1 of FPGA chip EP1C3T100C 8;
FIG. 15 is a circuit diagram of BANK2 of FPGA chip EP1C3T100C 8;
FIG. 16 is a circuit diagram of BANK3 of FPGA chip EP1C3T100C 8;
FIG. 17 is a circuit diagram of BANK4 of FPGA chip EP1C3T100C 8;
FIG. 18 is a circuit diagram of U1FPGA _ E of the FPGA chip EP1C3T100C 8;
FIG. 19 is a power connection circuit diagram of an FPGA chip EP1C3T100C 8;
FIG. 20 is a circuit diagram of the ground of FPGA chip EP1C3T100C 8;
FIG. 21 is a conversion circuit diagram of + A5V of the sensor signal acquisition circuit;
FIG. 22 is a circuit diagram of the + D2.5V conversion circuit of the sensor signal acquisition circuit;
FIG. 23 is a circuit diagram of the + A2.5V conversion circuit of the sensor signal acquisition circuit;
FIG. 24 is a circuit diagram of a reference voltage output for the sensor signal acquisition circuit;
FIG. 25 is a diagram of a dual operational amplifier amplification circuit for a sensor signal acquisition circuit;
FIG. 26 is a filter circuit diagram of a sensor signal acquisition circuit;
FIG. 27 is a schematic diagram of an ADC conversion circuit of the sensor signal acquisition circuit;
SENSOR interface J1_ SENSOR of the SENSOR signal acquisition circuit of fig. 28;
FIG. 29 active crystal interface J3 — 40MHz of the sensor signal acquisition circuit;
FIG. 30 is a circuit diagram of a sensor circuit board interface J2 of the sensor signal acquisition circuit;
FIG. 31 is a circuit diagram of a sensor circuit board of the sensor signal acquisition circuit;
FIG. 32 is a circuit diagram of a DSP chip for an input/output module control circuit;
FIG. 33 is a circuit diagram of a passive crystal oscillator of the input-output module control circuit;
FIG. 34 is a circuit diagram of a debug circuit of the input-output module control circuit;
FIG. 35 is a circuit diagram of interface Jc2_ arm and interface Jc _ pc of the input/output module control circuit;
fig. 36 is a serial port circuit diagram of the input/output module control circuit;
FIG. 37 is a circuit diagram of a USB interface and a circuit diagram of a memory in the data output and memory circuit;
FIG. 38 is a circuit diagram of a photoelectric switch driving circuit of the CPU control system;
FIG. 39 is a circuit diagram of a program debug interface circuit 1 of the CPU control system;
FIG. 40 is a circuit diagram of a program debug interface circuit 2 of the CPU control system;
FIG. 41 is a circuit diagram of a CPU control system for providing a clock frequency of 24 MHz;
fig. 42 is a circuit diagram of a power supply circuit VCCA _ PLL1 of the CPU control system;
FIG. 43 is a circuit diagram of a status indication circuit of the CPU control system;
FIG. 44 is a schematic diagram of the structure of a blood pressure pulse simulation system;
FIG. 45 is a schematic diagram of a power management module;
FIG. 46 is a schematic diagram of a power management module;
FIG. 47 is a schematic view of a CPU control system;
FIG. 48 is a schematic diagram of a sensor signal acquisition circuit.
The reference numbers in the figures denote: 1-operating keyboard and LCD display window; 2-a power interface; 3-serial port; 4-external test interface; 5-a power switch; 61-a first bleed valve; 62-a second purge valve; 63-a third bleed valve; 71-blood pressure pulse simulation segment; 72-piston walking section; 8-an inflation pump; 9-a stepper motor; 10-a piston; 11-a piston rod; 12-a pressure sensor; 13-starting end photoelectric switch emitting end; 14-a starting end photoelectric switch receiving end; 15-terminal photoelectric switch transmitting terminal; 16-terminal opto-electronic switch receiving terminal.
Detailed Description
As shown in the system general principle block diagram 2a, the dynamic calibration instrument of the non-invasive sphygmomanometer comprises a power supply management module, a CPU control system, an input/output module and a blood pressure pulse simulation module; the input and output end of the CPU control system is in communication connection with the input and output end of the input and output module; the power management module supplies power to the CPU control system, the input and output module and the blood pressure pulse simulation module.
As shown in the schematic block diagram 44 of the blood pressure pulse simulation module, the blood pressure pulse simulation module includes a deflation valve, a test pipeline, an inflation air pump 8, a stepping motor 9, a piston 10, a piston rod 11 and a pressure sensor 12, the test pipeline comprises a blood pressure pulse simulation section 71 and a piston walking section 72, the air inlet end of the air release valve is communicated with the blood pressure pulse simulation section 71 through fluid, the air outlet end of the inflation air pump 8 is in fluid communication with the air inlet end of the blood pressure pulse simulation section 71, the piston 10 is located in the piston walking section 72, one end of the piston rod 11 is fixedly connected with the piston 10, the other end of the piston rod 11 is in driving connection with the power output end of the stepping motor 9, and the pressure sensor 12 is used for testing the gas pressure in the blood pressure pulse simulation section 71 and feeding back the test result to the CPU control system. The starting end of the piston walking section 72 is provided with a starting end photoelectric switch for detecting whether the piston 10 is reset or not, the starting end photoelectric switch feeds a detection result back to the CPU control system, the CPU control system judges whether the piston 10 is reset or not according to the feedback result when the test is started every time, if the piston 10 is not reset, the CPU control system sends a piston reset control signal to the stepping motor 9, and the stepping motor 9 drives the piston 10 to return to the starting end of the piston walking section 72 through the piston rod 11 so as to complete the reset; a terminal photoelectric switch for judging whether the piston 10 reaches the maximum stroke position is mounted at the terminal of the piston walking section 72, the terminal photoelectric switch feeds a detection result back to the CPU control system, the CPU control system judges whether the piston 10 reaches the maximum stroke according to the detection result, if the piston 10 reaches the maximum stroke, a control signal for stopping the advance or the retreat of the piston is sent to the stepping motor 9, and the stepping motor 9 stops driving the piston 10 to continue to advance or drives the piston 10 to retreat and reset; the starting-end photoelectric switch consists of a starting-end photoelectric switch transmitting end 13 and a starting-end photoelectric switch receiving end 14 used for receiving light emitted by the starting-end photoelectric switch transmitting end 13, and the terminal photoelectric switch consists of a terminal photoelectric switch transmitting end 15 and a terminal photoelectric switch receiving end 16 used for receiving the light emitted by the terminal photoelectric switch transmitting end 15.
As shown in fig. 45 and 46, the power management module includes a 220V ac power supply, a 24V switching power supply, a5V switching power supply, a +24V step-down to +22V step-down circuit, a +5V _ D step-down to +3.3V _ D step-down circuit, and a +3.3V _ D step-down to +1.5V _ D step-down circuit.
The current output end of the 220V alternating current power supply is respectively electrically connected with the current input end of the 24V switching power supply and the current input end of the 5V switching power supply, the current output end of the 24V switching power supply is electrically connected with the current input end of the +24V voltage reduction to +22V voltage reduction circuit, and the current output end of the +24V voltage reduction to +22V voltage reduction circuit respectively supplies power to the current input end of the first deflation valve 61, the current input end of the second deflation valve 62, the current input end of the third deflation valve 63, the current input end of the inflation air pump 8 and the current input end of the stepping motor 9.
The current output end of the 5V switching power supply respectively supplies power to the current input end of a starting-end photoelectric switch (a first photoelectric limit switch), the current input end of a terminal photoelectric switch (a second photoelectric limit switch), the current input end of the pressure sensor 12, the current input end of the stepping motor driver, the 5V current input end of the storage chip 24LC64 of the CPU control system, the 5V current input end of the USB interface chip FT245BM of the CPU control system and the current input end of a voltage step-down circuit from +5V _ D to +3.3V _ D.
The current output end of the +5V _ D voltage reduction to +3.3V _ D voltage reduction circuit is respectively used for supplying power to the 3.3V current input end of the USB interface chip FT245BM of the CPU control system, the 3.3V current input end of the ARM circuit of the CPU control system, the 3.3V current input end of the chip DSP of the CPU control system, the 3.3V current input end of the core chip FPGA of the CPU control system and the current input end of the +3.3V _ D voltage reduction to +1.5V _ D voltage reduction circuit, and the current output end of the +3.3V _ D voltage reduction to +1.5V _ D voltage reduction circuit is electrically connected with the 1.5V current input end of the core chip FPGA of the CPU control system.
As shown in fig. 3, the current output terminal of the 5V switching power supply is electrically connected to the input terminal pin 3 of the buck chip LM1117_3.3 of the +5V _ D buck-to- +3.3V _ D buck circuit, and the current output terminal pin 2 of the buck chip LM1117_3.3 of the +5V _ D buck-to- +3.3V _ D buck circuit outputs the +3.3V _ D voltage;
as shown in fig. 4, the current output terminal of the +5V _ D step-down to +3.3V _ D step-down circuit is electrically connected to the input terminal pin 3 of the step-down circuit chip LM1117_1.5 of the +3.3V _ D step-down to +1.5V _ D circuit, and the current output terminal pin 2 of the step-down circuit chip LM1117_1.5 of the +3.3V _ D step-down to +1.5V _ D circuit outputs a +1.5V voltage;
as shown in fig. 5, the current output terminal of the 24V switching power supply is electrically connected to the input terminal pin 2 of the voltage-reducing circuit chip TPS54160 of the +24V voltage-reducing to +22V voltage-reducing circuit, the output terminal pin 10 of the voltage-reducing circuit chip TPS54160 is electrically connected to the input terminal of the Lp5 filter inductor, and the output terminal of the Lp5 filter inductor is +22V voltage;
as shown in fig. 6, the 5V switching power supply supplies power to the +5V _ D to +3.3V _ D step-down circuit, the start-end photoelectric switch and the end photoelectric switch through the leg 1 of the J5V interface, the pressure sensor 12, the stepper motor driver, 24LC64 and FT245 provide 5V voltage; as shown in fig. 7, the 24V switching power supply supplies +24V voltage to the +24V step-down to +22V step-down circuit through the leg 1 of the J24V interface, and as shown in fig. 8, the +24V step-down to +22V step-down circuit supplies +22V voltage to the first deflation valve 61, the second deflation valve 62, the third deflation valve 63, the inflation air pump 8 and the stepping motor 9 through the leg 3 or the leg 4 of the J22V interface.
The input and output module includes an operation keypad and an LCD display window 1.
As shown in the functional block diagram 2b of the CPU control system, the CPU control system includes an FPGA, a step motor driving circuit, a bleed valve/inflation pump driving circuit, a step motor driver, a sensor signal acquisition circuit, a photoelectric switch driving circuit, an input/output module control circuit, and a data output and storage circuit. The input and output ends of the FPGA are in communication connection with the input and output ends of a deflation valve/inflation pump driving circuit, the input and output ends of a sensor signal acquisition circuit, the input and output ends of a photoelectric switch driving circuit, the input and output ends of an input and output module control circuit and the input and output ends of a data output and storage circuit; the current output end of the 24V switching power supply is electrically connected with the current input end of the +24V step-down to +22V step-down circuit, and the current output end of the +24V step-down to +22V step-down circuit is electrically connected with the current input end of the stepping motor driving circuit and the current input end of the deflation valve/inflation air pump driving circuit, so that +22V voltage is provided for the stepping motor 9, the first deflation valve 61, the second deflation valve 62, the third deflation valve 63 and the inflation air pump 8; the current output end of the 5V switching power supply is electrically connected with the current input end of the +5V _ D voltage reduction circuit to +3.3V _ D voltage reduction circuit, the input end of the photoelectric switch driving circuit, the current input end of the stepping motor driver, the current input end of the sensor signal acquisition circuit and the circuit input end of the data output and storage circuit; providing +5V _ D voltage for the starting end photoelectric switch, the terminal photoelectric switch, the stepping motor driver and the pressure sensor 12; the current output end of the voltage reduction circuit from +5V _ D to +3.3V _ D is electrically connected with the current input end of the voltage reduction circuit from +3.3V _ D to +1.5V _ D, the current input end of the FPGA, the current input end of the input/output module control circuit and the current input end of the data output circuit of the data output and storage circuit; and the current output end of the +3.3V _ D voltage reduction circuit to +1.5V _ D voltage reduction circuit is electrically connected with the current input end of the FPGA to provide +1.5V _ D voltage for the FPGA.
As shown in fig. 8 and 9, the current output end of the +24V step-down to +22V step-down circuit of the power management module is electrically connected to the input terminal leg 31, the leg 26, the leg 23, and the leg 18 of the deflation valve/inflation pump chip TAS5102, respectively, so as to provide +22V voltage for the first deflation valve 61, the second deflation valve 62, the third deflation valve 62, and the inflation pump 8, which are independent of each other.
As shown in fig. 9, the output terminal leg 30 of the deflation valve/inflation pump chip TAS5102 is electrically and communicatively connected with the input terminal interface Jemv1 of the first deflation valve 61, and a diode indicator lamp Dv1 is connected in parallel between the interface Jemv1 and the input terminal leg 30 of the deflation valve/inflation pump chip TAS5102 for indicating the working state of the first deflation valve 61; the output end pipe leg 27 of the deflation valve/inflation air pump chip TAS5102 is electrically connected and in communication connection with the input end interface Jemv2 of the second deflation valve 62, and a diode indicator lamp Dv2 is connected in parallel between the interface Jemv2 and the pipe leg 27 of the deflation valve/inflation air pump chip TAS5102 and is used for indicating the working state of the second deflation valve 62; the output end pipe leg 22 of the deflation valve/inflation air pump chip TAS5102 is electrically connected and in communication connection with an input end interface Jemv3 of the third deflation valve 63, and a diode indicator lamp Dv3 is connected in parallel between the interface Jemv2 and the pipe leg 22 of the deflation valve/inflation air pump chip TAS5102 and is used for indicating the working state of the third deflation valve 63; the output end pipe leg 19 of the deflation valve/inflation air pump chip TAS5102 is electrically connected and in communication connection with the input end interface Jemv4 of the inflation air pump 8, and a diode indicator lamp Dv1 is connected in parallel between the interface Jemv4 and the pipe leg 19 of the deflation valve/inflation air pump chip TAS 5102;
as shown in fig. 9 and 17, input/output terminal leg 7, leg 8, leg 9, leg 10 and leg 11 of the deflation valve/inflation pump chip TAS5102 are in communication connection with input/output terminal leg 48, leg 37, leg 36, leg 35 and leg 34 of the FPGA chip EP1C3T100C8, respectively. The FPGA controls the first deflation valve 61, the second deflation valve 62, the third deflation valve 62 and the inflation pump 8 to deflate and inflate through the deflation valve/inflation pump chip TAS5102, so that the simulation of the blood pressure is realized.
As shown in fig. 10, the current output end of the +24V to +22V step-down circuit of the power management module is electrically connected to the input terminal leg 31, the input terminal leg 26, the input terminal leg 23, and the input terminal leg 18 of the step motor chip TAS5102, respectively, so as to provide +22V voltage for the step motor 9; an output end pipe leg 30, a pipe leg 27, a pipe leg 22 and a pipe leg 19 of the stepping motor chip TAS5102 are electrically connected and in communication connection with an input end interface Jmotor of the stepping motor 9; as shown in fig. 16 and 17, input/output terminal leg 7, leg 8, leg 9, leg 10, and leg 11 of the stepper motor chip TAS5102 are electrically and communicatively connected to input/output terminal leg 53, leg 41, leg 40, leg 39, and leg 38 of the FPGA chip EP1C3T100C8, respectively; the FPGA controls the stepping motor 9 to rotate forwards and backwards through the stepping motor chip TAS5102, so that pulse simulation is realized.
As shown in fig. 38, in the optoelectronic switch driving circuit, a current output end of a5V switching power supply is electrically connected to an input terminal pin 1 and a pin 2 of the optoelectronic switch chip 74LVC 4245; the current output end of the 5V switching power supply is electrically connected with the input end leg 1 and the tube leg 4 of the start end photoelectric switch interface Jsw1 respectively, and the current output end of the 5V switching power supply is electrically connected with the input end leg 1 and the tube leg 4 of the terminal photoelectric switch interface Jsw2 respectively, so that +5V _ D voltage is provided for the start end photoelectric switch and the terminal photoelectric switch.
As shown in fig. 38, the input/output terminal leg 3 of the optoelectronic switch chip 74LVC4245 is communicatively connected to the input/output terminal leg 2 (start-end optoelectronic switch transmitting terminal 13) of the start-end optoelectronic switch interface Jsw1, and the input/output terminal leg 4 of the optoelectronic switch chip 74LVC4245 is communicatively connected to the input/output terminal leg 5 (start-end optoelectronic switch receiving terminal 14) of the start-end optoelectronic switch interface Jsw 1; an input/output terminal pin 5 of the photoelectric switch chip 74LVC4245 is in communication connection with a pin 2 (terminal photoelectric switch transmitting terminal 15) of the input/output terminal interface Jsw2 of the terminal photoelectric switch, and an input/output terminal pin 6 of the photoelectric switch chip 74LVC4245 is in communication connection with an input/output terminal pin 5 (terminal photoelectric switch receiving terminal 16) of the terminal photoelectric switch interface Jsw 2;
as shown in fig. 38 and 17, the input/output terminal leg 21 of the optoelectronic switch chip 74LVC4245 is communicatively connected to the input/output terminal leg 26 of the FPGA chip EP1C3T100C8, and a diode indicator lamp DSW1 is connected in parallel in a circuit between the leg 21 of the optoelectronic switch chip 74LVC4245 and the leg 26 of the FPGA chip EP1C3T100C 8; an input/output terminal pin 20 of the photoelectric switch chip 74LVC4245 is in communication connection with an input/output terminal pin 27 of the FPGA chip EP1C3T100C8, and a diode indicator lamp DSW2 is connected in parallel in a circuit between the pin 20 of the photoelectric switch chip 74LVC4245 and the pin 27 of the FPGA chip EP1C3T100C 8; an input/output terminal pin 19 of the photoelectric switch chip 74LVC4245 is in communication connection with an input/output terminal pin 28 of the FPGA chip EP1C3T100C8, and a diode indicator lamp DSW3 is connected in parallel in a circuit between the pin 19 of the photoelectric switch chip 74LVC4245 and the pin 28 of the FPGA chip EP1C3T100C 8; an input/output terminal pin 18 of the photoelectric switch chip 74LVC4245 is in communication connection with an input/output terminal pin 29 of the FPGA chip EP1C3T100C8, and a diode indicator lamp DSW4 is connected in parallel in a circuit between the pin 18 of the photoelectric switch chip 74LVC4245 and the pin 29 of the FPGA chip EP1C3T100C 8; the FPGA transmits and receives signals of the start-end photoelectric switch transmitting terminal 13 and the start-end photoelectric switch receiving terminal 14 of the start-end photoelectric switch and the terminal photoelectric switch transmitting terminal 15 and the terminal photoelectric switch receiving terminal 16 of the terminal photoelectric switch through the photoelectric switch chip 74LVC4245, thereby determining the reset state of the piston 10.
In the stepping motor driver circuit, as shown in fig. 11, the current output terminal of the 5V switching power supply is electrically connected to the input terminal pin 4 of the stepping motor driver chip am26lv31, so as to provide +5V voltage for the chip am26lv 31; the current output end of the 5V switching power supply is electrically connected with the input end pipe leg 1 of the stepping motor driver interface Jm1, and the current output end of the 5V switching power supply is electrically connected with the input end pipe leg 1 of the stepping motor driver interface Jm2, so that +5V voltage is provided for the stepping motor driver.
An output end pipe leg 2, a pipe leg 3, a pipe leg 5 and a pipe leg 6 of the stepping motor driver chip am26lv31 are in communication connection with the input end pipe leg 3, the pipe leg 5, the pipe leg 4 and the pipe leg 6 of the stepping motor driver interface Jm1 respectively; an output end pipe leg 14, a pipe leg 13, a pipe leg 11 and a pipe leg 10 of the motor driver chip am26lv31 are respectively in communication connection with an input end pipe leg 3, a pipe leg 5, a pipe leg 4 and a pipe leg 6 of the stepping motor driver interface Jm 2; as shown in fig. 11, 16 and 17, input and output terminal leg 1, leg 7, leg 9 and leg 15 of stepper motor driver chip am26lv31 are communicatively connected to input and output terminal leg 49, leg 50, leg 51 and leg 52 of FPGA chip EP1C3T100C8, respectively; the FPGA controls the stepping motor driver through a stepping motor driver chip am26lv31 to enhance the loading capacity of the stepping motor 9.
As shown in fig. 48, the sensor signal acquisition circuit includes a voltage conversion circuit, a filter circuit, a dual-operational amplifier circuit, an ADC conversion circuit, an active crystal oscillator circuit, and a reference voltage output circuit;
the voltage conversion circuit includes a + A5V conversion circuit, a + D2.5V conversion circuit, and a + A2.5V conversion circuit; as shown in fig. 21-23: the current output end of the 5V switching power supply is electrically connected with an input end tube leg 8 of a + A5V conversion circuit chip LT1762, an output end tube leg 1 of the + A5V conversion circuit chip LT1762 is electrically connected with an input end tube leg 7, a tube leg 21, a tube leg 25 and a tube leg 28 of an ADC conversion circuit chip Ad77625, and voltage of + A5V is provided for the ADC conversion circuit chip Ad 77625;
the current output end of the 5V switching power supply is electrically connected with an input end tube leg 8 of a + D2.5V conversion circuit chip LT1762, an output end tube leg 1 of the + D2.5V conversion circuit chip LT1762 is electrically connected with an input end tube leg 17 of an ADC conversion circuit chip AD7765, and a voltage of + D2.5V is provided for the chip AD 7765;
the current output end of the 5V switching power supply is electrically connected with an input end tube leg 8 of a + A2.5V conversion circuit chip LT1762, the output end tube leg 8 of the + A2.5V conversion circuit chip LT1762 is electrically connected with an input end tube leg 24 of an ADC conversion circuit chip AD7765, and a + A2.5V power supply is provided for the chip AD 7765;
as shown in fig. 29, the output terminal pin 1 of the + A5V switching circuit chip LT1762 is further electrically connected to the input terminal pin 4 of the interface J3 — 40MHZ of the active crystal oscillator circuit, so as to provide + A5V voltage for the external active crystal oscillator; the output terminal pipe leg 3 of the interface J3_40MHZ of the active crystal oscillator circuit is in communication connection with the input terminal pipe leg 19 of the ADC conversion circuit chip AD 7765.
As shown in fig. 24, the current output terminal of the 5V switching power supply is electrically connected to the input terminal leg 2 of the reference chip REF5040 of the reference voltage output circuit, the output terminal leg 6 of the reference chip REF5040 of the reference voltage output circuit is electrically connected to the input terminal leg 3 of the interface J1_ SENSOR of the pressure SENSOR 12 and the input terminal leg 27 of the ADC conversion circuit chip AD7765, respectively, the output terminal voltage of the reference chip REF5040 is +4.096V, and the excitation voltage and the reference input voltage are supplied to the pressure SENSOR 12 and the ADC conversion circuit chip AD7765, respectively;
as shown in fig. 28, the pressure SENSOR 12 is mounted on the interface J1_ SENSOR; as shown in fig. 25, 26 and 27, the output terminal leg 1 and the output terminal leg 2 of the interface J1_ SENSOR of the pressure SENSOR 12 are respectively in communication connection with the input terminal leg 3 and the input terminal leg 5 of the dual operational amplifier circuit chip LT6231, the output terminal leg 1 and the output terminal leg 7 of the dual operational amplifier circuit chip LT6231 are respectively in communication connection with the input terminal VIN + and the input terminal VIN-of the filter circuit, and the output terminal ADVIN + and the output terminal ADVIN-of the filter circuit are respectively in communication connection with the input terminal leg 6 and the input terminal leg 5 of the ADC conversion circuit chip AD 7765; as shown in fig. 30, output terminal leg 9, leg 10, leg 11, leg 12, leg 13, leg 14, leg 15, and leg 16 of ADC conversion circuit chip AD7765 are communicatively connected to input terminal leg 5, leg 7, leg 9, leg 11, leg 2, leg 4, leg 8, and leg 6 of sensor circuit board interface J2, respectively; as shown in fig. 31, the sensor circuit board interface J2 is communicatively connected to the sensor circuit board; as shown in fig. 14, input and output terminal leg 2, leg 4, leg 5, leg 6, leg 7, leg 8, leg 9, leg 10, leg 11, and leg 12 of the sensor circuit board are communicatively connected to input and output terminal leg 25, leg 24, leg 23, leg 22, leg 21, leg 20, leg 4, leg 3, leg 2, and leg 1 of FPGA chip EP1C3T100C8, respectively; the double operational amplifier circuit chip LT6231 constitutes an instrumentation amplifier for amplifying the signal of the pressure sensor 12, the resistance value of the adjusting resistor Ra3 of the double operational amplifier circuit obtains a proper voltage signal, and then the proper voltage signal is sent to the ADC conversion circuit chip AD7765 for AD conversion, and the AD value is sent to the FPGA chip EP1C3T100C8 for processing by the DC conversion circuit chip AD 7765.
The input/output module control circuit, as shown in fig. 32-36, includes a DSP chip, an ARM circuit, a passive crystal oscillator circuit, a debug circuit, and a serial port circuit;
an operation keyboard of the input/output module and an input/output end of an LCD display window 1 are in communication connection with an input/output end of the ARM circuit, and an input/output end interface Jc _1_ ARM 1 and a tube leg 2 of the ARM circuit are in communication connection with an input/output end tube leg 13 and a tube leg 14 of a chip MAX3232 of the serial port circuit; an input/output end pipe leg 11 and a pipe leg 12 of a chip MAX3232 of the serial port circuit are respectively in communication connection with an input/output end pipe leg 48 and a pipe leg 1 of a DSP chip TMS320F 28027; output ends X1 and X2 of the passive crystal oscillator circuit are in communication connection with an input end pin 45 and a pin 46 of the DSP chip TMS320F28027 respectively; as shown in fig. 34 and fig. 32, an output terminal pin 3, a pin 1, a pin 7, and a pin 9 of the debug circuit chip JTAG are in communication connection with an input terminal pin 20, a pin 21, a pin 22, and a pin 23 of the DSP chip TMS320F28027, respectively, for testing the internal test of the DSP chip; as shown in fig. 32, 16 and 17, the current output terminal of the +5V _ D step-down to +3.3V _ D step-down circuit is electrically connected to the current input terminal pin 11, pin 19, pin 22 and pin 35 of the DSP chip TMS320F 28027; input and output terminal leg 47, leg 42, leg 41, leg 40, leg 39, leg 38, leg 37, leg 36, leg 31, leg 29, leg 28, leg 27, leg 26, leg 25 and leg 24 of the DSP chip TMS320F28027 are in communication connection with input and output terminal leg 68, leg 47, leg 54, leg 55, leg 56, leg 57, leg 65, leg 69, leg 70, leg 71, leg 72, leg 77, leg 78, leg 79 and leg 84 of the FPGA chip EP1C3T100C8, respectively; the FPGA chip EP1C3T100C8 controls the DSP chip TMS320F28027, so that the input of the blood pressure pulse wave of the input and output module and the output display of the tested blood pressure pulse wave are realized.
As shown in fig. 37, the data output and storage circuit includes a data output circuit and a storage circuit;
the current output end of the 5V switching power supply is electrically connected with an input terminal tube leg 3, a tube leg 26 and a tube leg 30 of a USB interface chip FT245BM of the data output circuit, and the current output end of a +5V _ D step-down to +3.3V _ D step-down circuit is electrically connected with an input terminal tube leg 11 and a tube leg 13 of a USB interface chip FT245BM, as shown in fig. 15, an input terminal tube leg 25, a tube leg 24, a tube leg 23, a tube leg 22, a tube leg 21, a tube leg 20, a tube leg 19, a tube leg 18, a tube leg 16, a tube leg 15, a tube leg 14 and a tube leg 12 of the USB interface chip FT245BM are respectively in communication connection with an input terminal tube leg 85, a tube leg 86, a tube leg 87, a tube leg 88, a tube leg 89, a tube leg 90, a tube leg 91, a tube leg 92, a tube leg 97, a tube leg 98, a tube leg 99 and a tube leg 100 of the PFGA chip EP1C 100C; an input/output terminal leg 4 and a terminal leg 28 of the USB interface chip FT245BM are respectively in communication connection with an input/output terminal leg 1 of a USB interface J _ USB, an input/output terminal leg 8 of the USB interface circuit chip FT245BM is in communication connection with an input/output terminal leg 2 of the USB interface J _ USB, an input/output terminal leg 7 of the USB interface chip FT245BM is in communication connection with an input/output terminal leg 3 of the USB interface J _ USB, and an input/output terminal leg 6 and a terminal leg 27 of the USB interface chip FT245BM are in communication connection with an input/output terminal leg 4 of the USB interface J _ USB; an input/output terminal pin 32, a pin 1 and a pin 2 of the USB interface chip FT245BM are respectively in communication connection with an input/output terminal pin 1, a pin 2 and a pin 3 of a memory chip 24LC64 of the memory circuit; the current output terminal of the 5V switching power supply is electrically connected to the input terminal pin 8 of the memory chip 24LC64 of the memory circuit.
The CPU control system also comprises a programming and debugging interface circuit 1, a programming and debugging interface circuit 2, a 24MHZ clock frequency providing circuit and a status indicating circuit.
As shown in fig. 40 and fig. 16, input/output terminal pin 1, pin 3, pin 5, and pin 9 of JTAG chip Header 5X2 of program debug interface circuit 1 are communicatively connected to input/output terminal pin 62, pin 64, pin 63, and pin 67 of FPGA chip EP1C3T100C8, respectively;
as shown in fig. 39 and fig. 14, input/output terminal leg 5, leg 1, leg 6, and leg 2 of chip U2_ EPCSIN of program debug interface circuit 2 are communicatively connected to input/output terminal leg 17, leg 6, leg 16, and leg 7 of FPGA chip EP1C3T100C8, respectively; an input/output end pipe leg 1, a pipe leg 3, a pipe leg 5, a pipe leg 7, a pipe leg 9, a pipe leg 6 and a pipe leg 8 of a chip AS Header 5X2 of the programming and debugging interface circuit 2 are respectively in communication connection with an input/output end pipe leg 16, a pipe leg 60, a pipe leg 8, a pipe leg 7, a pipe leg 17, a pipe leg 13 and a pipe leg 6 of an FPGA chip EP1C3T100C 8; the current output end of the voltage reduction circuit from +5V _ D to +3.3V _ D is respectively electrically connected with the current input terminal pin 4 of the JTAG chip Header 5X2 of the programming and debugging interface circuit 1, the current input terminal pin 3, the current input terminal pin 7 and the current input terminal pin 8 of the chip U2_ EPCSIN of the programming and debugging interface circuit 2, and the current input terminal pin 4 of the chip AS Header 5X2 of the programming and debugging interface circuit 2 to provide +3.3V _ D voltage;
as shown in fig. 41, the current output terminal of the +5V _ D step-down to +3.3V _ D step-down circuit is electrically connected to the current input terminal pin 4 providing the 24MHZ clock frequency circuit chip Uf 224 MHZ, providing a +3.3V voltage; an input/output terminal pin 3 of a 24MHZ clock frequency circuit chip Uf 224 MHZ is provided to be in communication connection with an input/output terminal pin 10 of an FPGA chip EP1C3T100C 8;
as shown in fig. 19, the current output terminal of the +5V _ D step-down to +3.3V _ D step-down circuit is electrically connected to current output terminal pin 18, pin 80, pin 95, pin 59, pin 31, and pin 46 of FPGA chip EP1C3T100C8, providing a +3.3V power supply; the current output end of the +3.3V _ D voltage reduction to +1.5V _ D voltage reduction circuit is electrically connected with the current input end tube leg 33, the tube leg 44, the tube leg 82 and the tube leg 93 of the FPGA chip EP1C3T100C8 to provide a +1.5V power supply;
as shown in fig. 42, the output VCCA _ PLL1 of the voltage-reducing circuit chip LM1117_1.5V of the power management module is electrically connected to the pin 9 of the PFGA chip EP1C3T100C 8;
as shown in fig. 43, the input/output terminal of the diode indicator lamp Df1 of the status indicator circuit is communicatively connected to the input/output terminal pin 42 of the FPGA chip EP1C3T100C 8.
The working principle of the dynamic calibrator for the non-invasive sphygmomanometer is as follows:
1. connecting the sphygmomanometer to be tested to the external test interface 4 of the noninvasive sphygmomanometer dynamic calibration instrument, so that the first air release valve 61, the second air release valve 62, the third air release valve 63, the blood pressure pulse simulation section 71 of the test pipeline, and the pressure sensor 12 are communicated with the sphygmomanometer to be tested through fluid; the air outlet end of the inflation air pump 8 is in fluid communication with the air inlet end of the blood pressure pulse simulation section 71, the piston 10 is located in the piston walking section 72, one end of the piston rod 11 is fixedly connected with the piston 10, and the other end of the piston rod 11 is in driving connection with the power output end of the stepping motor 9.
2. 220V alternating current voltage is externally connected through a power supply interface 2 of the noninvasive sphygmomanometer dynamic calibrator.
3. And the serial port 3 of the dynamic calibration instrument of the non-invasive sphygmomanometer is connected with an external PC terminal.
4. Turning on a power switch 5, wherein the current output end of the power management module is respectively and electrically connected with the current input end of the CPU control system, the current input end of the input/output module and the current input end of the blood pressure pulse simulation module, so as to provide power support;
the power management module comprises a 220V alternating-current power supply, a 24V switching power supply, a5V switching power supply, a voltage reduction circuit from +24V to +22V, a voltage reduction circuit from +5V _ D to +3.3V _ D and a voltage reduction circuit from +3.3V _ D to +1.5V _ D;
as shown in fig. 45 and 46, the power management module includes a 220V ac power supply, a 24V switching power supply, a5V switching power supply, a +24V step-down to +22V step-down circuit, a +5V _ D step-down to +3.3V _ D step-down circuit, and a +3.3V _ D step-down to +1.5V _ D step-down circuit.
The current output end of the 220V alternating current power supply is respectively electrically connected with the current input end of the 24V switching power supply and the current input end of the 5V switching power supply, the current output end of the 24V switching power supply is electrically connected with the current input end of the +24V voltage reduction to +22V voltage reduction circuit, and the current output end of the +24V voltage reduction to +22V voltage reduction circuit respectively supplies power to the current input end of the first deflation valve 61, the current input end of the second deflation valve 62, the current input end of the third deflation valve 63, the current input end of the inflation air pump 8 and the current input end of the stepping motor 9.
The current output end of the 5V switching power supply is respectively electrically connected with the current input end of the starting-end photoelectric switch (the first photoelectric limit switch), the current input end of the terminal photoelectric switch (the second photoelectric limit switch), the current input end of the pressure sensor 12, the current input end of the stepping motor driver and the current input end of the CPU control system, and the current input end of the voltage reduction circuit from +5V _ D to +3.3V _ D is used for supplying power.
The current output end of the +5V _ D voltage reduction to +3.3V _ D voltage reduction circuit is electrically connected with the 3.3V current input end of the FT245, the current input end of the ARM serial port, the current input end of the DSP, the 3.3V current input end of the FPGA, and the current input end of the +3.3V _ D voltage reduction to +1.5V _ D voltage reduction circuit are electrically connected, and the current output end of the +3.3V _ D voltage reduction to +1.5V _ D voltage reduction circuit is electrically connected with the 1.5V current input end of the FPGA.
5. Sending an instruction to a CPU control system through an input/output module: the blood pressure and pulse wave needing to be simulated are set through an operation keyboard on a front panel, meanwhile, the setting result is displayed on an LCD display window, communication signals are transmitted to a TMS320F28027 tube leg 1 and a tube leg 48 of a DSP chip by an ARM output end through a tube leg 11 and a tube leg 12 of a serial port chip MAX3232, the blood pressure and pulse wave signals are processed by the DSP chip TMS320F28027, the signals of the simulated blood pressure and pulse wave needing to be generated are transmitted to a tube leg 68 of a CPU system chip EP1C3T100C8 through a tube leg 47, a tube leg 42, a tube leg 41, a tube leg 40, a tube leg 39, a tube leg 38, a tube leg 37, a tube leg 36, a tube leg 31, a tube leg 29, a tube leg 28, a tube leg 27, a tube leg 26, a tube leg 25 and a tube leg 24 of the DSP chip TMS320F28027, leg 47, leg 54, leg 55, leg 56, leg 57, leg 65, leg 69, leg 70, leg 71, leg 72, leg 77, leg 78, leg 79 and leg 84, which issue instructions to FPGA chip EP1C3T100C 8.
The CPU control system controls the first deflation valve 61, the second deflation valve 62, the third deflation valve 63 and the inflation air pump 8 to generate blood pressure simulation signals according to signals of simulated blood pressure and pulse waves generated as required, and the pressure sensor 12 tests the gas pressure in the blood pressure and pulse simulation section 71 and feeds back the test result to the CPU control system; controlling a stepping motor 9, a starting end photoelectric switch, a terminal photoelectric switch, a piston 10 and a piston rod 11 to generate a pulse wave analog signal, wherein the starting end of a piston walking section 72 is provided with the starting end photoelectric switch for detecting whether the piston 10 is reset, the starting end photoelectric switch feeds a detection result back to a CPU control system, the CPU control system firstly judges whether the piston 10 is reset according to the feedback result when the test is started, if the piston 10 is judged not to be reset, the CPU control system sends a piston reset control signal to the stepping motor 9, and the stepping motor 9 drives the piston 10 to return to the starting end of the piston walking section 72 through the piston rod 11 so as to complete the reset; the terminal photoelectric switch for judging whether the piston 10 reaches the maximum stroke position is mounted at the terminal of the piston walking section 72, the terminal photoelectric switch feeds a detection result back to the CPU control system, the CPU control system judges whether the piston 10 reaches the maximum stroke according to the detection result, if the piston 10 reaches the maximum stroke, a control signal for stopping the advance or the retreat of the piston is sent to the stepping motor 9, and the stepping motor 9 stops driving the piston 10 to continue to advance or drives the piston 10 to retreat and reset.
(1) Generating blood pressure analog signals
The FPGA chip EP1C3T100C8 makes blood pressure signals communicated with a tube leg 7, a tube leg 8, a tube leg 9, a tube leg 10 and a tube leg 11 of a deflation valve/inflation air pump chip TAS5102 through a tube leg 48, a tube leg 37, a tube leg 36, a tube leg 35 and a tube leg 34, an output end tube leg 18 of the deflation valve/inflation air pump chip TAS5102 is electrically connected with an air pump interface Jemv4 tube leg 2 and a diode indicator lamp Dv4, the diode indicator lamp Dv4 is lightened, an inflation air pump 8 is started to generate pressure, and the pressure signals are in fluid conduction with a sphygmomanometer to be tested and a pressure sensor 12 through a blood pressure pulse simulation section 71 of a test pipeline.
Meanwhile, the pressure SENSOR 12 transmits the sensed gas pressure to the input end pipe leg 3 and the pipe leg 5 of the chip LT6231 of the double operational amplifier amplifying circuit through the pipe leg 1 and the pipe leg 2 of the interface J1_ SENSOR to amplify the gas pressure signal, then the output end pipe leg 1 and the pipe leg 7 of the chip LT6231 of the double operational amplifier amplifying circuit are respectively connected with the input end VIN + and the input end VIN-end of the filter circuit to filter interference signals, and then the output end ADVIN + and the output end ADVIN-of the filter circuit are respectively in communication connection with the input end pipe leg 6 and the input end pipe leg 5 of the chip AD7765 of the ADC converting circuit, the chip AD7765 of the ADC converting circuit converts the gas pressure signal into digital signals, and then the sensed gas pressure signals are transmitted through the output end pipe leg 9, the pipe leg 10, the pipe leg 11, the pipe leg 12, the pipe leg 13, the pipe leg 14, the pipe leg 15 and the pipe leg 16 of the chip AD7765 of the ADC converting circuit, through output terminal leg 2, leg 4, leg 5, leg 6, leg 7, leg 8, leg 9, leg 10, leg 11, and leg 12 of the sensor circuit board, leg 25, leg 24, leg 23, leg 22, leg 21, leg 20, leg 4, leg 3, leg 2, and leg 1 of CPU system chip EP1C3T100C8 are transmitted.
At this time, the FPGA chip EP1C3T100C8 is based on the accurate air pressure information sensed by the pressure sensor 12:
on one hand, the accurate air pressure value sensed is displayed to an LCD display window of the input and output module through an FPGA chip EP1C3T100C8, and the static blood pressure value is obtained.
On the other hand, by comparing the FPGA chip EP1C3T100C8 with the set generated blood pressure value, if the sensed accurate air pressure value is smaller than the set generated blood pressure value, the FPGA chip EP1C3T100C8 continuously controls the inflation air pump 8 to inflate, and if the sensed accurate air pressure value is larger than the set generated blood pressure value, the FPGA chip EP1C3T100C8 continuously controls the first deflation valve 61, the second deflation valve 62 and the third deflation valve 63 to deflate slowly, and finally the set generated blood pressure value is reached through adjustment.
(2) Generating pulse analog signals
The FPGA chip EP1C3T100C8 transmits pulse signals to a tube leg 7, a tube leg 8, a tube leg 9, a tube leg 10 and a tube leg 11 of a step motor chip TAS5102 through a tube leg 53, a tube leg 41, a tube leg 40, a tube leg 39 and a tube leg 38, the tube leg 30, the tube leg 27, the tube leg 22 and the tube leg 19 at the output end of the step motor chip TAS5102 are connected with a step motor 9, the step motor 9 is started, the step motor 9 pushes a piston 10 to move in a piston walking section 72 through a piston rod 11 to generate pulse signals, meanwhile, a start-end photoelectric switch (which is composed of a start-end photoelectric switch transmitting end 13 and a start-end photoelectric switch receiving end 14) arranged at the start section of the piston walking section 72 is used for detecting whether the piston 10 is reset, and a terminal photoelectric switch (which is composed of a terminal photoelectric switch transmitting end 15 and a terminal photoelectric switch receiving end 16) arranged at the terminal of the piston walking section 72 is used for judging whether the piston 10 reaches the maximum stroke position. And a leg 18, a leg 19, a leg 20 and a leg 21 of the optoelectronic switch chip 74LVC4245 are fed back to a leg 29, a leg 28, a leg 27 and a leg 26 of the FPGA chip EP1C3T100C 8. Meanwhile, the FPGA controls the stepping motor driver through a stepping motor driver chip am26lv31 to enhance the loading capacity of the stepping motor 9.
7. Pressure leak test
After the inflation air pump 8 generates the reached air pressure value, the pressure leakage test starts, the pressure sensor 12 continues to sense the pressure value in the test pipeline, then the pressure value is transmitted to the FPGA chip EP1C3T100C8, the leakage rate is obtained through calculation of the FPGA chip EP1C3T100C8, the actually measured pressure value, leakage rate and sensing time (the tube leg 10 of the FPGA chip EP1C3T100C8 is in communication connection with the tube leg 3 providing the 24MHZ clock frequency circuit chip Uf 224 MHZ) are stored and transmitted to the external equipment through the data output and storage circuit, and the pressure value, the leakage rate and the sensing time are displayed on the LCD display window of the input and output module.
8. Static pressure output
The operating keyboard and the LCD display window through the input and output module set the set point value of static pressure output, then the set point value of pressure is transmitted to the FPGA chip EP1C3T100C8 through the DSP chip, the FPGA chip EP1C3T100C8 controls the inflation air pump 8, pressure is generated, and through a test pipeline, the fluid is conducted with the sphygmomanometer to be tested and the pressure sensor 12, the pressure sensor 12 senses the pressure in the test pipeline, the measured value is displayed on the LCD display window, and the measured value and the pressure value displayed by the sphygmomanometer to be tested are used for detecting whether the sphygmomanometer to be tested can reach the preset pressure value of static pressure.
9. Static pressure test
And the same step as 8, the pressure sensor 12 senses the pressure in the test pipeline, displays the measured value on the LCD display window, and compares the measured value on the LCD display window with the pressure value displayed by the blood pressure meter to be tested to detect whether the measured value of the blood pressure meter to be tested is the same as that of the calibrator or not, wherein the error is less than or equal to +/-5 mmHg.
10. Blood pressure simulation
The blood pressure simulation can be divided into standard blood pressure simulation and custom blood pressure simulation, wherein the standard blood pressure simulation comprises 7 groups of standard blood pressures (systolic pressure/diastolic pressure: 60/30, 80/50, 100/65, 120/80, 150/100, 200/150 and 255/195, the heart rate is default to 80bpm, and the pulse volume is default to 0.70cc), the simulation is output under the conditions of adult, newborn, arrhythmia, respiratory disturbance and the like, the simulation is stored in an FPGA chip EP1C3T100C8, and the systolic pressure, the diastolic pressure, the heart rate and the pulse can be custom-defined on an LCD display window through operating a keyboard. Either of the internal cuff or the external cuff is selected.
The user can make different selections according to the characteristics of the blood pressure meter to be measured.
Standard blood pressure simulation: and selecting one group of standard blood pressure settings, transmitting the selected settings to an FPGA chip EP1C3T100C8FPGA chip EP1C3T100C8 by the input module, controlling the inflation air pump 8, the first air release valve 61, the second air release valve 62 and the third air release valve 63 to simulate to generate corresponding blood pressure, simulating to generate pulse waves by the stepping motor 9, the start-end photoelectric switch and the terminal photoelectric switch, testing the sphygmomanometer to be tested by the pressure sensor 12 to measure, displaying the measurement result on an LCD display window, and storing the measurement result in the storage chip 24LC64 of the data output and storage circuit, thereby measuring the sphygmomanometer to be tested.
Self-defining blood pressure simulation: similar to standard blood pressure simulation, a user can define required systolic pressure, diastolic pressure, heart rate and pulse according to requirements, then the set requirements are transmitted to the FPGA chip EP1C3T100C8 through the input module, the FPGA chip EP1C3T100C8 controls the inflation air pump 8, the first air release valve 61, the second air release valve 62 and the third air release valve 63 to simulate and generate corresponding blood pressure, the stepping motor 9, the start end photoelectric switch and the terminal photoelectric switch simulate and generate pulse waves, the pressure sensor 12 tests the sphygmomanometer to be tested to perform measurement, the measured result is displayed on an LCD display window, and the measured result is stored in the storage chip 24LC64 of the data output and storage circuit, so that the sphygmomanometer to be tested is measured.
11. Automatic measurement mode
The user may also select an automatic measurement mode to complete the 7-10 measurement process. The FPGA chip EP1C3T100C8 may automatically perform measurements according to a stored test scheme.
12. Storage output
7-11, the measured result can be outputted and stored through the CFPGA chip EP1C3T100C8, the USB interface chip FT245BM of the data output and storage circuit and the storage chip 24LC 64.
Claims (9)
1. The noninvasive sphygmomanometer dynamic calibration instrument is characterized by comprising a power supply management module, a CPU control system, an input/output module and a blood pressure pulse simulation module; the input and output end of the CPU control system is in communication connection with the input and output end of the input and output module; the power supply management module supplies power to the CPU control system, the input and output module and the blood pressure pulse simulation module;
the blood pressure pulse simulation module comprises a deflation valve, a test pipeline, an inflation air pump (8), a stepping motor (9), a piston (10), a piston rod (11) and a pressure sensor (12), the test pipeline comprises a blood pressure pulse simulation section (71) and a piston walking section (72), the air inlet end of the deflation valve is in fluid communication with the blood pressure pulse simulation section (71), the air outlet end of the inflation air pump (8) is in fluid communication with the air inlet end of the blood pressure pulse simulation section (71), the piston (10) is positioned in the piston walking section (72), one end of the piston rod (11) is fixedly connected with the piston (10), the other end of the piston rod (11) is in driving connection with the power output end of the stepping motor (9), the pressure sensor (12) is used for testing the gas pressure in the blood pressure pulse simulation section (71) and feeding back a test result to the CPU control system; the starting end of the piston walking section (72) is provided with a starting end photoelectric switch for detecting whether the piston (10) is reset or not, the starting end photoelectric switch feeds a detection result back to the CPU control system, the CPU control system judges whether the piston (10) is reset or not according to the feedback result when the test is started every time, if the piston (10) is judged not to be reset, the CPU control system sends a piston reset control signal to the stepping motor (9), and the stepping motor (9) drives the piston (10) to return to the starting end of the piston walking section (72) through the piston rod (11) so as to complete the reset; a terminal photoelectric switch used for judging whether the piston (10) reaches the maximum stroke position is mounted at the terminal of the piston walking section (72), the terminal photoelectric switch feeds a detection result back to the CPU control system, the CPU control system judges whether the piston (10) reaches the maximum stroke according to the detection result, if the piston (10) reaches the maximum stroke, a control signal for stopping the advance or the retreat of the piston is sent to the stepping motor (9), and the stepping motor (9) stops driving the piston (10) to continue to advance or drives the piston (10) to retreat and reset; the starting-end photoelectric switch is composed of a starting-end photoelectric switch transmitting end (13) and a starting-end photoelectric switch receiving end (14) used for receiving light emitted by the starting-end photoelectric switch transmitting end (13), and the terminal photoelectric switch is composed of a terminal photoelectric switch transmitting end (15) and a terminal photoelectric switch receiving end (16) used for receiving the light emitted by the terminal photoelectric switch transmitting end (15).
2. The noninvasive sphygmomanometer according to claim 1, wherein the power management module comprises a 220V ac power supply, a 24V switching power supply, a5V switching power supply, a +24V buck-to- +22V buck circuit, a +5V _ D buck-to- +3.3V _ D buck circuit, and a +3.3V _ D buck-to- +1.5V _ D buck circuit;
the current output end of a 220V alternating current power supply is respectively and electrically connected with the current input end of a 24V switching power supply and the current input end of a5V switching power supply, the current output end of the 24V switching power supply is electrically connected with the current input end of a +24V voltage reduction to +22V voltage reduction circuit, and the current output end of the +24V voltage reduction to +22V voltage reduction circuit respectively supplies power to the current input end of a first deflation valve (61), the current input end of a second deflation valve (62), the current input end of a third deflation valve (63), the current input end of an inflation air pump (8) and the current input end of a stepping motor (9);
the current output end of the 5V switching power supply supplies power to the current input end of the starting-end photoelectric switch, the current input end of the terminal photoelectric switch, the current input end of the pressure sensor (12), the current input end of the stepping motor driver, the 5V current input end of the storage chip 24LC64 of the CPU control system, the 5V current input end of the USB interface chip FT245BM of the CPU control system and the current input end of the voltage reduction circuit from +5V _ D to +3.3V _ D respectively;
the current output end of the +5V _ D voltage reduction to +3.3V _ D voltage reduction circuit is respectively used for supplying power to the 3.3V current input end of the USB interface chip FT245BM of the CPU control system, the 3.3V current input end of the ARM circuit of the CPU control system, the 3.3V current input end of the chip DSP of the CPU control system, the 3.3V current input end of the core chip FPGA of the CPU control system and the current input end of the +3.3V _ D voltage reduction to +1.5V _ D voltage reduction circuit, and the current output end of the +3.3V _ D voltage reduction to +1.5V _ D voltage reduction circuit is electrically connected with the 1.5V current input end of the core chip FPGA of the CPU control system.
3. The noninvasive sphygmomanometer dynamic calibration instrument according to claim 1, wherein the CPU control system comprises a core chip FPGA, a stepper motor drive circuit deflation valve/inflation air pump drive circuit stepper motor driver, a sensor signal acquisition circuit, a photoelectric switch drive circuit, an input/output module control circuit, and a data output and storage circuit; the input and output ends of the FPGA are respectively in communication connection with the input and output ends of the deflation valve/inflation pump driving circuit, the input and output end of the sensor signal acquisition circuit, the input and output end of the photoelectric switch driving circuit, the input and output end of the input and output module control circuit and the input and output end of the data output and storage circuit.
4. The noninvasive sphygmomanometer according to claim 3, wherein the current output terminal of the 24V switching power supply is electrically connected to the current input terminal of the +24V step-down to +22V step-down circuit, and the current output terminal of the +24V step-down to +22V step-down circuit is electrically connected to the current input terminal of the stepping motor driving circuit and the current input terminal of the deflation valve/inflation pump driving circuit; the current output end of the 5V switching power supply is electrically connected with the current input end of the +5V _ D voltage reduction to +3.3V _ D voltage reduction circuit, the input end of the photoelectric switch driving circuit, the current input end of the stepping motor driver circuit, the current input end of the sensor signal acquisition circuit and the circuit input end of the data output and storage circuit; the current output end of the voltage reduction circuit from +5V _ D to +3.3V _ D is electrically connected with the current input end of the voltage reduction circuit from +3.3V _ D to +1.5V _ D, the current input end of the core chip FPGA, the current input end of the input/output module control circuit and the current input end of the data output circuit of the data output and storage circuit; and the current output end of the voltage reduction circuit from +3.3V _ D to +1.5V _ D is electrically connected with the current input end of the core chip FPGA to provide +1.5V _ D voltage for the core chip FPGA.
5. The noninvasive sphygmomanometer according to claim 4, wherein in the deflation valve/inflation pump driving circuit, the current output end of the voltage reduction circuit from +24V to +22V of the power management module is electrically connected with the current input end of the deflation valve/inflation pump chip TAS5102, namely the leg 31, the leg 26, the leg 23 and the leg 18 respectively; the output end pipe leg 30 of the deflation valve/inflation air pump chip TAS5102 is electrically connected and in communication connection with an input end interface Jemv1 of the first deflation valve (61), and a diode indicator lamp Dv1 is connected in parallel between the interface Jemv1 and the pipe leg 30 of the deflation valve/inflation air pump chip TAS5102 and is used for indicating the working state of the first deflation valve (61); the output end pipe leg 27 of the deflation valve/inflation air pump chip TAS5102 is electrically connected and in communication connection with the input end interface Jemv2 of the second deflation valve (62), and a diode indicator lamp Dv2 is connected in parallel between the interface Jemv2 and the pipe leg 27 of the deflation valve/inflation air pump chip TAS5102 and is used for indicating the working state of the second deflation valve (62); the output end pipe leg 22 of the deflation valve/inflation air pump chip TAS5102 is electrically connected and in communication connection with an input end interface Jemv3 of a third deflation valve (63), and a diode indicator lamp Dv3 is connected in parallel between the interface Jemv2 and the pipe leg 22 of the deflation valve/inflation air pump chip TAS5102 and is used for indicating the working state of the third deflation valve (63); the output end pipe leg 19 of the deflation valve/inflation air pump chip TAS5102 is electrically connected and in communication connection with the input end interface Jemv4 of the inflation air pump (8), and a diode indicator lamp Dv1 is connected in parallel between the interface Jemv4 and the pipe leg 19 of the deflation valve/inflation air pump chip TAS 5102; and a pipeline leg 7, a pipeline leg 8, a pipeline leg 9, a pipeline leg 10 and a pipeline leg 11 of the input and output end of the deflation valve/inflation air pump chip TAS5102 are respectively in communication connection with a pipeline leg 48, a pipeline leg 37, a pipeline leg 36, a pipeline leg 35 and a pipeline leg 34 of the input and output end of the FPGA chip EP1C3T100C 8.
6. The noninvasive sphygmomanometer according to claim 4, wherein in the stepping motor driving circuit, the current output end of the +24V step-down to +22V step-down circuit of the power management module is electrically connected with the current input end pin 31, the pin 26, the pin 23 and the pin 18 of the stepping motor chip TAS5102 respectively to provide +22V voltage for the stepping motor (9); an output end pipe leg 30, a pipe leg 27, a pipe leg 22 and a pipe leg 19 of the stepping motor chip TAS5102 are electrically connected and in communication connection with an input end interface Jmotor of a stepping motor (9); an output terminal pin 53, a pin 41, a pin 40, a pin 39 and a pin 38 of the FPGA chip EP1C3T100C8 are in communication connection with an input terminal pin 7, a pin 8, a pin 9, a pin 10 and a pin 11 of the stepper motor chip TAS5102, respectively;
in a stepper motor driver circuit: the current output end of the 5V switching power supply is electrically connected with a current input end tube leg 4 of a stepping motor driver chip am26lv31, and +5V voltage is provided for the chip am26lv 31; the current output end of the 5V switching power supply is electrically connected with a current input end pipe leg 1 of a stepping motor driver interface Jm1, and the current output end of the 5V switching power supply is electrically connected with a current input end pipe leg 1 of a stepping motor driver interface Jm2 to provide +5V voltage for the stepping motor driver; an output end pipe leg 2, a pipe leg 3, a pipe leg 5 and a pipe leg 6 of the stepping motor driver chip am26lv31 are in communication connection with the input end pipe leg 3, the pipe leg 5, the pipe leg 4 and the pipe leg 6 of the stepping motor driver interface Jm1 respectively; an output end pipe leg 14, a pipe leg 13, a pipe leg 11 and a pipe leg 10 of the motor driver chip am26lv31 are respectively in communication connection with an input end pipe leg 3, a pipe leg 5, a pipe leg 4 and a pipe leg 6 of the stepping motor driver interface Jm 2; output terminal leg 49, leg 50, leg 51, and leg 52 of FPGA chip EP1C3T100C8 are in communication with input terminal leg 1, leg 7, leg 9, and leg 15, respectively, of stepper motor driver chip am26lv 31.
7. The noninvasive sphygmomanometer according to claim 4, wherein in the photoelectric switch driving circuit, the current output end of the 5V switch power supply is electrically connected with the current input end tube leg 1 and the current input end tube leg 2 of the photoelectric switch chip 74LVC 4245; the current output end of the 5V switching power supply is respectively and electrically connected with a current input end tube leg 1 and a current input end tube leg 4 of the starting end photoelectric switch interface Jsw1, the current output end of the 5V switching power supply is respectively and electrically connected with a current input end tube leg 1 and a current input end tube leg 4 of the terminal photoelectric switch interface Jsw2, and +5V _ D voltage is provided for the starting end photoelectric switch and the terminal photoelectric switch; an input/output terminal pin 3 of the photoelectric switch chip 74LVC4245 is in communication connection with an input/output terminal pin 2 of the start-end photoelectric switch interface Jsw1, and an input/output terminal pin 4 of the photoelectric switch chip 74LVC4245 is in communication connection with a pin 5 of an input/output terminal of the start-end photoelectric switch interface Jsw 1; an input/output terminal pin 5 of the photoelectric switch chip 74LVC4245 is in communication connection with a pin 2 of the input/output terminal interface Jsw2 of the terminal photoelectric switch, and an input/output terminal pin 6 of the photoelectric switch chip 74LVC4245 is in communication connection with an input/output terminal pin 5 of the terminal photoelectric switch interface Jsw 2; an input-output terminal pin 21 of the photoelectric switch chip 74LVC4245 is in communication connection with an input-output terminal pin 26 of the FPGA chip EP1C3T100C8, and a diode indicator lamp DSW1 is connected in parallel in a circuit between the pin 21 of the photoelectric switch chip 74LVC4245 and the pin 26 of the FPGA chip EP1C3T100C 8; an input/output terminal pin 20 of the photoelectric switch chip 74LVC4245 is in communication connection with an input/output terminal pin 27 of the FPGA chip EP1C3T100C8, and a diode indicator lamp DSW2 is connected in parallel in a circuit between the pin 20 of the photoelectric switch chip 74LVC4245 and the pin 27 of the FPGA chip EP1C3T100C 8; an input/output terminal pin 19 of the photoelectric switch chip 74LVC4245 is in communication connection with an input/output terminal pin 28 of the FPGA chip EP1C3T100C8, and a diode indicator lamp DSW3 is connected in parallel in a circuit between the pin 19 of the photoelectric switch chip 74LVC4245 and the pin 28 of the FPGA chip EP1C3T100C 8; the input and output terminal pin 18 of the photoelectric switch chip 74LVC4245 is in communication connection with the input and output terminal pin 29 of the FPGA chip EP1C3T100C8, and a diode indicator lamp DSW4 is connected in parallel in a circuit between the pin 18 of the photoelectric switch chip 74LVC4245 and the pin 29 of the FPGA chip EP1C3T100C 8.
8. The non-invasive sphygmomanometer according to claim 4, wherein the sensor signal acquisition circuit includes a voltage conversion circuit, a filter circuit, a dual-operational amplifier circuit, an ADC conversion circuit, an active crystal oscillator circuit and a reference voltage output circuit; the voltage conversion circuit includes a + A5V conversion circuit, a + D2.5V conversion circuit, and a + A2.5V conversion circuit; the current output end of the 5V switching power supply is electrically connected with a current input end tube leg 8 of a + A5V conversion circuit chip LT1762, an output end tube leg 1 of the + A5V conversion circuit chip LT1762 is electrically connected with a current input end tube leg 7, a tube leg 21, a tube leg 25 and a tube leg 28 of an ADC conversion circuit chip Ad77625, and voltage of + A5V is provided for the ADC conversion circuit chip Ad 77625;
the current output end of the 5V switching power supply is electrically connected with a current input end tube leg 8 of a + D2.5V conversion circuit chip LT1762, a current output end tube leg 1 of the + D2.5V conversion circuit chip LT1762 is electrically connected with a current input end tube leg 17 of an ADC conversion circuit chip AD7765, and a voltage of + D2.5V is provided for the chip AD 7765;
the current output end of the 5V switching power supply is electrically connected with a current input end tube leg 8 of a + A2.5V conversion circuit chip LT1762, the current output end tube leg 8 of the + A2.5V conversion circuit chip LT1762 is electrically connected with a current input end tube leg 24 of an ADC conversion circuit chip AD7765, and a + A2.5V power supply is provided for the chip AD 7765; the current output terminal pin 1 of the + A2.5V conversion circuit chip LT1762 is also electrically connected with the current input terminal pin 4 of the interface J3-40 MHZ of the active crystal oscillator circuit, and provides + A5V voltage for the external active crystal oscillator; an output end pipe leg 3 of an interface J3_40MHZ of the active crystal oscillator circuit is in communication connection with an input end pipe leg 19 of an ADC conversion circuit chip AD 7765; the current output end of the 5V switching power supply is electrically connected with a current input end pipe leg 2 of a reference chip REF5040 of a reference voltage output circuit, a current output end pipe leg 6 of the reference chip REF5040 of the reference voltage output circuit is electrically connected with a current input end pipe leg 3 of an interface J1_ SENSOR of the pressure SENSOR (12) and a current input end pipe leg 27 of an ADC conversion circuit chip AD7765 respectively, the voltage of the output end of the reference chip REF5040 is +4.096V, and excitation voltage and reference input voltage are respectively provided for the pressure SENSOR (12) and the ADC conversion circuit chip AD 7765; an output end pipe leg 1 and a pipe leg 2 of an interface J1_ SENSOR of the pressure SENSOR (12) are respectively in communication connection with an input end pipe leg 3 and a pipe leg 5 of a double operational amplifier circuit chip LT6231, an output end pipe leg 1 and a pipe leg 7 of the double operational amplifier circuit chip LT6231 are respectively in communication connection with an input end VIN + and an input end VIN-end of a filter circuit, and an output end ADVIN + and an output end ADVIN-of the filter circuit are respectively in communication connection with an input end pipe leg 6 and an input end pipe leg 5 of an ADC conversion circuit chip AD 7765; an output end pipe leg 9, a pipe leg 10, a pipe leg 11, a pipe leg 12, a pipe leg 13, a pipe leg 14, a pipe leg 15 and a pipe leg 16 of the ADC conversion circuit chip AD7765 are respectively in communication connection with an input end pipe leg 5, a pipe leg 7, a pipe leg 9, a pipe leg 11, a pipe leg 2, a pipe leg 4, a pipe leg 8 and a pipe leg 6 of a sensor circuit board interface J2; the sensor circuit board interface J2 is in communication connection with the sensor circuit board; an input and output end pipe leg 2, a pipe leg 4, a pipe leg 5, a pipe leg 6, a pipe leg 7, a pipe leg 8, a pipe leg 9, a pipe leg 10, a pipe leg 11 and a pipe leg 12 of the sensor circuit board are respectively in communication connection with an input and output end pipe leg 25, a pipe leg 24, a pipe leg 23, a pipe leg 22, a pipe leg 21, a pipe leg 20, a pipe leg 4, a pipe leg 3, a pipe leg 2 and a pipe leg 1 of the FPGA chip EP1C3T100C 8;
the input and output module control circuit comprises a DSP chip, an ARM circuit, a passive crystal oscillator circuit, a debugging circuit and a serial port circuit; an operation keyboard of the input/output module and an input/output end of an LCD display window (1) are in communication connection with an input/output end of the ARM circuit, and an input/output end interface Jc _1_ ARM 1 and a tube leg 2 of the ARM circuit are in communication connection with an input/output end tube leg 13 and a tube leg 14 of a chip MAX3232 of the serial port circuit; an input/output end pipe leg 11 and a pipe leg 12 of a chip MAX3232 of the serial port circuit are respectively in communication connection with an input/output end pipe leg 48 and a pipe leg 1 of a DSP chip TMS320F 28027; output ends X1 and X2 of the passive crystal oscillator circuit are in communication connection with an input end pin 45 and a pin 46 of the DSP chip TMS320F28027 respectively; an output end pipe leg 3, a pipe leg 1, a pipe leg 7 and a pipe leg 9 of a debugging circuit chip JTAG are respectively in communication connection with an input end pipe leg 20, a pipe leg 21, a pipe leg 22 and a pipe leg 23 of a DSP chip TMS320F28027 and used for testing the internal test of the DSP chip; the current output end of the voltage reduction circuit from +5V _ D to +3.3V _ D is electrically connected with the current input end tube leg 11, the tube leg 19, the tube leg 22 and the tube leg 35 of the DSP chip TMS320F 28027; input and output terminal leg 47, leg 42, leg 41, leg 40, leg 39, leg 38, leg 37, leg 36, leg 31, leg 29, leg 28, leg 27, leg 26, leg 25 and leg 24 of the DSP chip TMS320F28027 are in communication connection with input and output terminal leg 68, leg 47, leg 54, leg 55, leg 56, leg 57, leg 65, leg 69, leg 70, leg 71, leg 72, leg 77, leg 78, leg 79 and leg 84 of the FPGA chip EP1C3T100C8, respectively;
the data output and storage circuit comprises a data output circuit and a storage circuit; the current output end of the 5V switching power supply is electrically connected with a current input end tube leg 3, a tube leg 26 and a tube leg 30 of a USB interface chip FT245BM of the data output circuit, the current output end of a +5V _ D step-down to +3.3V _ D step-down circuit is electrically connected with a current input end tube leg 11 and a tube leg 13 of a USB interface chip FT245BM, and the input end tube leg 25, the tube leg 24, the tube leg 23, the tube leg 22, the tube leg 21, the tube leg 20, the tube leg 19, the tube leg 18, the tube leg 16, the tube leg 15, the tube leg 14 and the tube leg 12 of the USB interface chip FT245BM are respectively in communication connection with an input end tube leg 85, a tube leg 86, a tube leg 87, a tube leg 88, a tube leg 89, a tube leg 90, a tube leg 91, a tube leg 92, a tube leg 97, a tube leg 98, a tube leg 99 and a tube leg 100 of the PFGA chip EP1C3T 100C; an input/output terminal leg 4 and a terminal leg 28 of the USB interface chip FT245BM are respectively in communication connection with an input/output terminal leg 1 of a USB interface J _ USB, an input/output terminal leg 8 of the USB interface circuit chip FT245BM is in communication connection with an input/output terminal leg 2 of the USB interface J _ USB, an input/output terminal leg 7 of the USB interface chip FT245BM is in communication connection with an input/output terminal leg 3 of the USB interface J _ USB, and an input/output terminal leg 6 and a terminal leg 27 of the USB interface chip FT245BM are in communication connection with an input/output terminal leg 4 of the USB interface J _ USB; an input/output terminal pin 32, a pin 1 and a pin 2 of the USB interface chip FT245BM are respectively in communication connection with an input/output terminal pin 1, a pin 2 and a pin 3 of a memory chip 24LC64 of the memory circuit; the current output terminal of the 5V switching power supply is electrically connected to the input terminal pin 8 of the memory chip 24LC64 of the memory circuit.
9. The non-invasive sphygmomanometer dynamic verification instrument according to claim 4, wherein the CPU control system further comprises a programming and debugging interface circuit 1, a programming and debugging interface circuit 2, a 24MHZ clock frequency providing circuit and a status indicating circuit;
the current output end of the +5V _ D voltage reduction circuit to +3.3V _ D voltage reduction circuit is electrically connected with a current output end tube leg 18, a tube leg 80, a tube leg 95, a tube leg 59, a tube leg 31 and a tube leg 46 of the FPGA chip EP1C3T100C8, and a +3.3V power supply is provided; the current output end of the +3.3V _ D voltage reduction to +1.5V _ D voltage reduction circuit is electrically connected with the current input end tube leg 33, the tube leg 44, the tube leg 82 and the tube leg 93 of the FPGA chip EP1C3T100C8 to provide a +1.5V power supply;
in the programming and debugging interface circuit 1, an input/output end pipe leg 1, a pipe leg 3, a pipe leg 5 and a pipe leg 9 of a JTAG chip Header 5X2 of the programming and debugging interface circuit 1 are respectively in communication connection with an input/output end pipe leg 62, a pipe leg 64, a pipe leg 63 and a pipe leg 67 of an FPGA chip EP1C3T100C 8;
in the programming and debugging interface circuit 2, an input/output terminal pipe leg 5, a pipe leg 1, a pipe leg 6 and a pipe leg 2 of a chip U2_ EPCSIN of the programming and debugging interface circuit 2 are respectively in communication connection with an input/output terminal pipe leg 17, a pipe leg 6, a pipe leg 16 and a pipe leg 7 of an FPGA chip EP1C3T100C 8; an input/output end pipe leg 1, a pipe leg 3, a pipe leg 5, a pipe leg 7, a pipe leg 9, a pipe leg 6 and a pipe leg 8 of a chip AS Header 5X2 of the programming and debugging interface circuit 2 are respectively in communication connection with an input/output end pipe leg 16, a pipe leg 60, a pipe leg 8, a pipe leg 7, a pipe leg 17, a pipe leg 13 and a pipe leg 6 of an FPGA chip EP1C3T100C 8; the current output end of the voltage reduction circuit from +5V _ D to +3.3V _ D is respectively electrically connected with the current input terminal pin 4 of the JTAG chip Header 5X2 of the programming and debugging interface circuit 1, the current input terminal pin 3, the current input terminal pin 7 and the current input terminal pin 8 of the chip U2_ EPCSIN of the programming and debugging interface circuit 2, and the current input terminal pin 4 of the chip AS Header 5X2 of the programming and debugging interface circuit 2 to provide +3.3V _ D voltage;
in the 24MHZ clock frequency circuit, the current output end of the +5V _ D voltage reduction circuit to the +3.3V _ D voltage reduction circuit is electrically connected with the current input end tube leg 4 of the 24MHZ clock frequency circuit chip Uf 224 MHZ, and the +3.3V voltage is provided; an input/output terminal pin 3 of a 24MHZ clock frequency circuit chip Uf 224 MHZ is provided to be in communication connection with an input/output terminal pin 10 of an FPGA chip EP1C3T100C 8;
the output end VCCA _ PLL1 of the voltage reduction circuit chip LM1117_1.5V of the power management module is electrically connected with the tube leg 9 of the PFGA chip EP1C3T100C 8;
the input/output end of the diode indicator lamp Df1 of the state indicating circuit is in communication connection with the input/output end pin 42 of the FPGA chip EP1C3T100C 8.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103222861A (en) * | 2013-05-20 | 2013-07-31 | 秦皇岛市康泰医学系统有限公司 | Non-invasive blood pressure simulation system and implementation method thereof |
| CN203677073U (en) * | 2014-01-26 | 2014-07-02 | 帕菲特（天津）检测科技有限公司 | Automatic verification equipment of noninvasive automatic measurement sphygmomanometer |
| CN104257371A (en) * | 2014-10-13 | 2015-01-07 | 天津工业大学 | Research of dynamic blood pressure detection and calibration method of radial artery |
| CN204274432U (en) * | 2014-11-10 | 2015-04-22 | 中国计量学院 | Can external pressure calibration electric sphygmomanometer |
| CN105193401A (en) * | 2015-08-24 | 2015-12-30 | 湖北科技学院 | High-precision arm-type electronic sphygmomanometer and detection method thereof |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7468038B2 (en) * | 2005-12-20 | 2008-12-23 | Shenzhen Mindray Bio-Medical Electronics Co., Ltd. | Non-invasive electronic method and apparatus for measuring blood pressure |
-
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103222861A (en) * | 2013-05-20 | 2013-07-31 | 秦皇岛市康泰医学系统有限公司 | Non-invasive blood pressure simulation system and implementation method thereof |
| CN203677073U (en) * | 2014-01-26 | 2014-07-02 | 帕菲特（天津）检测科技有限公司 | Automatic verification equipment of noninvasive automatic measurement sphygmomanometer |
| CN104257371A (en) * | 2014-10-13 | 2015-01-07 | 天津工业大学 | Research of dynamic blood pressure detection and calibration method of radial artery |
| CN204274432U (en) * | 2014-11-10 | 2015-04-22 | 中国计量学院 | Can external pressure calibration electric sphygmomanometer |
| CN105193401A (en) * | 2015-08-24 | 2015-12-30 | 湖北科技学院 | High-precision arm-type electronic sphygmomanometer and detection method thereof |
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