CN109768038B - Power module with low parasitic inductance - Google Patents
Power module with low parasitic inductance Download PDFInfo
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- CN109768038B CN109768038B CN201811494310.8A CN201811494310A CN109768038B CN 109768038 B CN109768038 B CN 109768038B CN 201811494310 A CN201811494310 A CN 201811494310A CN 109768038 B CN109768038 B CN 109768038B
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- bridge arm
- copper layer
- lower bridge
- positive electrode
- chip
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
Abstract
The invention discloses a power module with low parasitic inductance, which comprises a positive electrode, a negative electrode, an output electrode, a bottom plate and an insulating substrate arranged on the bottom plate, wherein a copper layer at the top of the insulating substrate comprises an upper bridge arm copper layer and a lower bridge arm copper layer which are separated from each other; at least part of the positive electrode is positioned between the upper bridge arm copper layer and the lower bridge arm copper layer, or at least part of the positive electrode is positioned above the part between the upper bridge arm copper layer and the lower bridge arm copper layer; the negative electrode is at least partially positioned between the upper bridge arm copper layer and the lower bridge arm copper layer, or at least partially positioned above the upper bridge arm copper layer and the lower bridge arm copper layer. The invention can reduce parasitic inductance.
Description
Technical Field
The present invention relates to power electronic power modules, and more particularly to a power module with low parasitic inductance.
Background
The power electronic technology occupies a very important position in the current rapidly-developed industrial field, and the power electronic power module is taken as a representative of the power electronic technology and is widely applied to industries such as electric automobiles, photovoltaic power generation, wind power generation, industrial frequency conversion and the like. With the rise of the industry in China, the power electronic power module has wider market prospect.
The parasitic inductance and the loop resistance of the conventional power electronic power module are large, so that the overshoot voltage is large and the loss is increased during the operation of a switch, the improvement of the conversion efficiency is influenced, and the application in high-switching-frequency occasions is limited. Silicon carbide (SiC) -based Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) have lower switching losses and faster switching speeds than silicon-based Insulated Gate Bipolar Transistors (IGBTs). At the moment, the high-speed switching process is very sensitive to parasitic parameters, high-frequency oscillation and voltage overshoot are easily excited, and adverse effects are brought to efficient and safe operation of devices and power electronic devices. The parasitic inductance of the existing power module causes that the SiC device can not work at high frequency, and the superior performance of the SiC device is difficult to be fully exerted.
Fig. 1 is a prior art power module including a positive electrode, a negative electrode, an output electrode, a base plate, and an insulating substrate disposed on the base plate. The insulating substrate comprises an upper bridge arm copper layer, a lower bridge arm copper layer, an output electrode copper layer and a negative electrode copper layer which are separated. And the upper bridge arm copper layer is provided with upper bridge arm chip units, and the lower bridge arm copper layer is provided with lower bridge arm chip units. The upper bridge arm chip unit comprises an upper bridge arm switch chip and an upper bridge arm diode chip, and the lower bridge arm chip unit comprises a lower bridge arm switch chip and a lower bridge arm diode chip. The positive electrode and the negative electrode are positioned on one side of the copper layer of the lower bridge arm, and the output electrode is positioned on one side of the copper layer of the upper bridge arm, so that the positive electrode is far away from the chip unit of the upper bridge arm, and the working current flowing out of the positive electrode can reach the chip unit of the upper bridge arm only through the long and narrow copper layer of the upper bridge arm, so that the current path is long, and the loop resistance and the parasitic inductance are large. And when the lower bridge arm chip unit works, the current needs to be in virtue of the bonding wire on the surface of the upper bridge arm chip unit, and at the moment, although the upper bridge arm chip unit does not work, the current also needs to flow through the bonding wire on the surface of the upper bridge arm chip unit, so that the current path is longer, and the loop resistance and the parasitic inductance are larger.
Disclosure of Invention
The purpose of the invention is as follows: the invention aims to provide a power module with low parasitic inductance, which can effectively solve the problem of high parasitic inductance of the power module in the prior art.
The technical scheme is as follows: the power module with low parasitic inductance comprises a positive electrode, a negative electrode, an output electrode, a bottom plate and an insulating substrate arranged on the bottom plate, wherein a copper layer on the top of the insulating substrate comprises an upper bridge arm copper layer and a lower bridge arm copper layer which are separated from each other; at least part of the positive electrode is positioned between the upper bridge arm copper layer and the lower bridge arm copper layer, or at least part of the positive electrode is positioned above the part between the upper bridge arm copper layer and the lower bridge arm copper layer; the negative electrode is at least partially positioned between the upper bridge arm copper layer and the lower bridge arm copper layer, or at least partially positioned above the upper bridge arm copper layer and the lower bridge arm copper layer.
Further, part or all of the positive electrode is parallel to part or all of the negative electrode. This enables a further reduction of the parasitic inductance of the power module.
Further, the positive electrode comprises a positive electrode welding foot electrically connected with the upper bridge arm chip unit, the positive electrode welding foot is connected with a positive electrode connecting part, and the positive electrode connecting part is connected with a positive electrode leading-out part; the negative electrode comprises a negative electrode welding foot which is electrically connected with the lower bridge arm chip unit, the negative electrode welding foot is connected with a negative electrode connecting part, and the negative electrode connecting part is connected with a negative electrode leading-out part; the positive electrode connecting part is parallel to the negative electrode connecting part. This enables a further reduction of the parasitic inductance of the power module.
Furthermore, the number of the upper bridge arm chip units is multiple, and a positive electrode welding foot is arranged between every two adjacent upper bridge arm chip units. The positive electrode welding foot is arranged between two adjacent upper bridge arm chip units, so that the current path can be further shortened, and the loop resistance and the parasitic inductance are further reduced.
Further, the lower bridge arm copper layer comprises a lower bridge arm main body copper layer and a lower bridge arm transition copper layer which are separated from each other, the lower bridge arm chip units are arranged on the lower bridge arm main body copper layer, negative electrodes are connected with the lower bridge arm transition copper layer, and the lower bridge arm transition copper layer is connected with the lower bridge arm chip units through bonding wires on the surfaces of the lower bridge arm chip units.
Furthermore, the number of the lower bridge arm chip units is multiple, and a lower bridge arm transition copper layer is arranged between every two adjacent lower bridge arm chip units.
Furthermore, the number of the upper bridge arm chip units is the same as that of the lower bridge arm chip units, the distance from each upper bridge arm chip unit to the positive electrode connecting part is the same, the distance from each lower bridge arm chip unit to the positive electrode connecting part is the same, the positive electrode weld leg is arranged between every two adjacent upper bridge arm chip units, and the negative electrode weld leg is arranged between every two adjacent lower bridge arm chip units. Therefore, for the combination formed by one upper bridge arm chip unit and one lower bridge arm chip unit, the loop areas between the working current and the follow current in all the combinations are almost equal, so that the consistency of parallel current branches in the aspects of resistance and parasitic inductance can be ensured, the current sharing among the parallel chips can be realized, and the service life of the power module can be prolonged.
Furthermore, the upper bridge arm chip unit is connected with the lower bridge arm copper layer through a bonding wire.
Further, the upper bridge arm chip unit comprises an upper bridge arm switch chip and an upper bridge arm diode chip, or the upper bridge arm chip unit comprises an upper bridge arm switch chip.
Further, the lower bridge arm chip unit comprises a lower bridge arm switch chip and a lower bridge arm diode chip, or the lower bridge arm chip unit comprises a lower bridge arm switch chip.
Has the advantages that: the invention discloses a power module with low parasitic inductance, which has the following beneficial effects compared with the prior art:
(1) the output electrode is connected with the copper layer of the lower bridge arm, so that the output electrode copper layer which is commonly used in the prior art is omitted, and the loop resistance and the parasitic inductance can be reduced;
(2) in the invention, at least part of the positive electrode is positioned between the upper bridge arm copper layer and the lower bridge arm copper layer, or at least part of the positive electrode is positioned above the upper bridge arm copper layer and the lower bridge arm copper layer; the negative electrode is at least partially positioned between the upper bridge arm copper layer and the lower bridge arm copper layer, or at least partially positioned above the upper bridge arm copper layer and the lower bridge arm copper layer. Therefore, the positive electrode and the negative electrode are close to the upper bridge arm copper layer and the lower bridge arm copper layer, long and narrow upper bridge arm copper layers are not needed, and current does not need to flow through a bonding wire on the surface of the upper bridge arm chip unit when the upper bridge arm chip unit does not work, so that the current path can be shortened, and the loop resistance and the parasitic inductance are reduced.
Drawings
FIG. 1 is a schematic diagram of a power module according to the prior art;
FIG. 2 is a schematic current path diagram of a prior art power module;
FIG. 3 is an external block diagram of a power module according to an embodiment of the present invention;
FIG. 4 is an internal block diagram of a power module according to an embodiment of the present invention;
fig. 5 is an internal structural view of a power module with a positive electrode, a negative electrode, and an output electrode removed in accordance with an embodiment of the present invention;
FIG. 6 is a schematic diagram of a housing of a power module in accordance with an embodiment of the present invention;
FIG. 7 is a cross-sectional view of section A-A of FIG. 6;
fig. 8 is a schematic diagram of a current path of a power module according to an embodiment of the invention.
Detailed Description
Fig. 1 is a prior art power module including three units having the same structure, each of which includes a positive electrode 951, a negative electrode 952, an output electrode 953, a base plate, and an insulating substrate provided on the base plate. The top copper layers of the insulating substrate include a separate upper arm copper layer 91, lower arm copper layer 93, output electrode copper layer 96 and negative electrode copper layer 97. The upper bridge arm copper layer 91 is provided with upper bridge arm chip units, and the lower bridge arm copper layer 93 is provided with lower bridge arm chip units. The upper bridge arm chip unit includes an upper bridge arm switch chip 921 and an upper bridge arm diode chip 922, and the lower bridge arm chip unit includes a lower bridge arm switch chip 941 and a lower bridge arm diode chip 942. The positive electrode 951 and the negative electrode 952 are located on one side of the lower bridge arm copper layer 93, and the output electrode 953 is located on one side of the upper bridge arm copper layer 91, so that the positive electrode 951 is far away from the upper bridge arm chip unit, and working current flowing out of the positive electrode 951 can reach the upper bridge arm chip unit only through the long and narrow upper bridge arm copper layer 91, so that the current path is long, and the loop resistance and the parasitic inductance are large. And when the lower bridge arm chip unit works, the current needs to be in virtue of the bonding wire on the surface of the upper bridge arm chip unit, at the moment, although the upper bridge arm chip unit does not work, the current also needs to flow through the bonding wire on the surface of the upper bridge arm chip unit, the diameter of the bonding wire is generally 15mil, the material is aluminum, a large loop resistance is usually introduced, the current path is also long, and the parasitic inductance is large.
The current path of the prior art power module is analyzed below. When the upper bridge arm switch chip 921 works, the path of the working current is positive electrode 951-upper bridge arm copper layer 91-upper bridge arm switch chip 921- (reached through a bonding wire on the surface of the upper bridge arm switch chip 921) output electrode copper layer 96-output electrode 953; after the upper bridge arm switch chip 921 is turned off, the current of the inductive load cannot change suddenly, and at this time, the lower bridge arm diode chip 942 performs freewheeling, and the path of the freewheeling current is negative electrode 952-negative electrode copper layer 97-lower bridge arm diode chip 942- (reached through the bonding wire on the surface of the upper bridge arm chip unit) output electrode copper layer 96-output electrode 953. When the lower bridge arm switch chip works, the path of the working current is output electrode 953-output electrode copper layer 96- (which is reached through a bonding wire on the surface of the upper bridge arm chip unit) lower bridge arm copper layer 93-lower bridge arm switch chip 941-negative electrode copper layer 97-negative electrode 952; when the lower arm switch chip 941 is closed, the current of the inductive load cannot change suddenly, at this time, the upper arm diode chip 922 performs follow current, and the path of the follow current is output electrode 953-output electrode copper layer 96-upper arm diode chip 922-upper arm copper layer 91-positive electrode 951.
Fig. 2 is a schematic diagram of a current path of a power module in the prior art, where fig. 2 only shows a schematic diagram of a current path when the upper arm switch chip 921 operates and the lower arm diode chip 942 continues to flow, and a current path when the lower arm switch chip 941 operates and the upper arm diode chip 922 continues to flow is also known in the same manner, and is not shown in fig. 2. In fig. 2, a solid line indicates a path of the operating current, a broken line indicates a path of the freewheel current, and hatching indicates an area of a circuit between the operating current and the freewheel current. The first unit shows the situation that the loop area between the working current and the freewheeling current is the smallest, that is, the loop area enclosed by the rightmost upper arm switch chip 921 and the rightmost lower arm diode chip 942 in the first unit when the chip operates and freewheels; the second unit shows the situation when the loop area between the working current and the freewheeling current is the maximum, that is, the loop area enclosed by the leftmost upper bridge arm switch chip 921 in the second unit when working and the leftmost lower bridge arm diode chip 942 when freewheeling; the third unit only shows the path of the working current and the free-wheeling current. As can be seen from fig. 2, the minimum and maximum loop areas between the operating current and the freewheel current differ significantly. When the upper bridge arm chip unit and the lower bridge arm chip unit are formed by connecting a plurality of groups of chips in parallel (each group of chips comprises an upper bridge arm chip unit and a lower bridge arm chip unit), the parallel chips are not uniform due to the fact that the lengths and areas of the circuits are different greatly, the chips with large currents often fail early, and the service life of the power module is influenced.
The present embodiment discloses a power module with low parasitic inductance, as shown in fig. 3 and fig. 6, which includes three units with the same structure, each unit includes a positive electrode 3, a negative electrode 4, an output electrode 5, a bottom plate 6 and an insulating substrate disposed on the bottom plate 6, which are disposed in a housing 8, and a cover plate 7 is disposed above the insulating substrate. The number of units may be one or more. The copper layer on the top of the insulating substrate comprises an upper bridge arm copper layer 11 and a lower bridge arm copper layer 12 which are separated from each other, as shown in fig. 4 and 5, three upper bridge arm chip units are arranged on the upper bridge arm copper layer 11, and three lower bridge arm chip units are arranged on the lower bridge arm copper layer 12. The number of the upper bridge arm chip units and the number of the lower bridge arm chip units can be other numbers. The upper arm chip unit includes an upper arm switch chip 111 and an upper arm diode chip 112, as shown in fig. 4. In addition, the upper arm chip unit may further include an upper arm switch chip 111, and does not include an upper arm diode chip 112, at this time, the upper arm switch chip 111 is a MOSFET chip, and when the upper arm chip unit needs to freewheel, a body diode inside the upper arm switch chip 111 freewheels. As shown in fig. 4, the upper bridge arm switch chip surface bonding wire 1111 is connected to the upper bridge arm diode chip surface bonding wire 1121, the upper bridge arm diode chip surface bonding wire 1121 is connected to the lower bridge arm copper layer 12, and the position of the upper bridge arm switch chip 111 may be exchanged with the position of the upper bridge arm diode chip 112. The lower arm chip unit includes a lower arm switch chip 121 and a lower arm diode chip 122, as shown in fig. 4. In addition, the lower arm chip unit may further include a lower arm switch chip 121, and does not include a lower arm diode chip 122, at this time, the lower arm switch chip 121 is a MOSFET chip, and when the lower arm chip unit needs to freewheel, a body diode inside the lower arm switch chip 121 freewheels. The lower bridge arm copper layer 12 comprises a lower bridge arm main copper layer and a lower bridge arm transition copper layer 123 which are separated from each other, the lower bridge arm chip units are arranged on the lower bridge arm main copper layer, and one lower bridge arm transition copper layer 123 is arranged between every two adjacent lower bridge arm chip units. The lower bridge arm transition copper layer 123 is connected to the lower bridge arm chip units through lower bridge arm chip unit surface bonding wires, specifically, as shown in fig. 4, the lower bridge arm switch chip surface bonding wire 1211 is connected to the lower bridge arm transition copper layer 123, and the lower bridge arm diode chip surface bonding wire 1221 is connected to the lower bridge arm transition copper layer 123. The upper arm switch chip 111 and the lower arm switch chip 121 may be insulated gate bipolar transistor IGBT chips or metal oxide field effect transistor MOSFET chips. The upper arm diode chip 112 and the lower arm diode chip 122 may be Si-based fast recovery diode chips, or SiC-based schottky diodes. The upper arm switch chip 111, the lower arm switch chip 121, the upper arm diode chip 112, and the lower arm diode chip 122 may be silicon-based chips or silicon carbide-based chips.
The positive electrode 3 is electrically connected to the upper bridge arm chip unit, and all connection modes conforming to "the positive electrode 3 is electrically connected to the upper bridge arm chip unit" may be adopted, and specifically in this embodiment, as shown in fig. 4 and 7, the positive electrode 3 includes a positive electrode fillet 33 connected to the upper bridge arm copper layer 11, the positive electrode fillet 33 is connected to the positive electrode connecting portion 32, and the positive electrode connecting portion 32 is connected to the positive electrode lead-out portion 31. The negative electrode 4 is electrically connected to the lower bridge arm chip unit, and all connection modes conforming to "the negative electrode 4 is electrically connected to the lower bridge arm chip unit" may be adopted, and specifically in this embodiment, as shown in fig. 4 and 7, the negative electrode 4 includes a negative electrode fillet 43 connected to the lower bridge arm transition copper layer 123, the negative electrode fillet 43 is connected to the negative electrode connection portion 42, and the negative electrode connection portion 42 is connected to the negative electrode lead-out portion 41. The output electrode 5 is connected with the lower bridge arm copper layer 12. As shown in fig. 7, the positive electrode connecting portion 32 and the negative electrode connecting portion 42 are molded inside the cross member 343, the cross member 343 is disposed above the upper arm copper layer 11 and the lower arm copper layer 12, the positive electrode lead-out portion 31, the negative electrode lead-out portion 41, the positive electrode fillet 33, and the negative electrode fillet 43 are exposed outside the cross member 343, and the positive electrode connecting portion 32 is parallel to the negative electrode connecting portion 42. Further, other portions of the positive electrode 3 may be parallel to other portions of the negative electrode 4. The positive electrode lead-out part 31 and the negative electrode lead-out part 41 are insulated by plastic cement, and the distance can be very close, so that parasitic inductance can be reduced more favorably. The distances from the upper bridge arm chip units to the positive electrode connecting part 32 are the same, and the distances from the lower bridge arm chip units to the positive electrode connecting part 32 are the same, so that for a combination formed by one upper bridge arm chip unit and one lower bridge arm chip unit, the loop areas between working currents and follow currents in all the combinations are equal, the consistency of parallel current branches in the aspects of resistance and parasitic inductance can be guaranteed, the current sharing among the parallel chips can be realized, and the service life of the power module can be prolonged.
In the present embodiment, the positive electrode connection portion 32 and the positive electrode lead portion 31 are both partially located above between the upper arm copper layer 11 and the lower arm copper layer 12, and the negative electrode connection portion 42 and the negative electrode lead portion 41 are both partially located above between the upper arm copper layer 11 and the lower arm copper layer 12. In addition, the positive electrode 3 can also be completely positioned above the position between the upper arm copper layer 11 and the lower arm copper layer 12, or the other part of the positive electrode 3 is positioned above the position between the upper arm copper layer 11 and the lower arm copper layer 12, or part of the positive electrode 3 is positioned between the upper arm copper layer 11 and the lower arm copper layer 12, or all of the positive electrode 3 is positioned between the upper arm copper layer 11 and the lower arm copper layer 12; the negative electrodes 4 may also be entirely located above the space between the upper arm copper layer 11 and the lower arm copper layer 12, or other portions may be located above the space between the upper arm copper layer 11 and the lower arm copper layer 12, or a portion of the negative electrodes 4 may be located between the upper arm copper layer 11 and the lower arm copper layer 12, or all of the negative electrodes 4 may be located between the upper arm copper layer 11 and the lower arm copper layer 12.
The current path of the power module in this embodiment is analyzed below. When the upper bridge arm switch chip 111 works, the path of the working current is positive electrode 3-upper bridge arm copper layer 11-upper bridge arm switch chip 111- (reached through upper bridge arm switch chip surface bonding wire 1111) lower bridge arm copper layer 12-output electrode 5; after the upper bridge arm switch chip 111 is turned off, the inductive load current cannot change suddenly, at this time, the lower bridge arm diode chip 122 performs follow current, and the path of the follow current is negative electrode 4-lower bridge arm transition copper layer 123- (which is reached through the lower bridge arm diode chip surface bonding wire 1221), lower bridge arm diode chip 122-lower bridge arm copper layer 12-output electrode 5. When the lower bridge arm switch chip 121 works, the path of the working current is 5-12-121- (reached through 1211) lower bridge arm transition copper layer 123-4; after the lower arm switch chip 121 is turned off, the inductive load current cannot change abruptly, at this time, the upper arm diode chip 112 performs follow current, and the path of the follow current is the output electrode 5-the lower arm copper layer 12- (which is reached through the upper arm diode chip surface bonding wire 1121) and the upper arm diode chip 112-the upper arm copper layer 11-the positive electrode 3.
Fig. 8 is a schematic current path diagram of the power module in the present embodiment, where fig. 8 only shows a schematic current path diagram when the upper arm switch chip 111 operates and the lower arm diode chip 122 freewheels, and a current path when the lower arm switch chip 121 operates and the upper arm diode chip 112 freewheels is also known in the same manner, and is not shown in fig. 8. In fig. 8, a solid line indicates a path of the operating current, a broken line indicates a path of the freewheel current, and hatching indicates an area of a circuit between the operating current and the freewheel current. The first unit shows the situation that the loop area between the working current and the freewheeling current is the smallest, that is, the loop area surrounded by the operation of the leftmost upper arm switch chip 111 and the freewheeling current of the left lower arm diode chip 122 in the first unit, and the second unit shows the situation that the loop area between the working current and the freewheeling current is the largest, that is, the loop area surrounded by the operation of the middle upper arm switch chip 111 and the freewheeling current of the middle lower arm diode chip 122 in the second unit.
As can be seen from fig. 8, the minimum loop area and the maximum loop area between the operating current and the freewheel current are almost equal. The reason for this is that, in the present embodiment, the distances from each upper bridge arm chip unit to the positive electrode connection portion 32 are equal, the distances from each lower bridge arm chip unit to the positive electrode connection portion 32 are also equal, the positive electrode fillet 33 is disposed between two adjacent upper bridge arm chip units, and the negative electrode fillet 43 is disposed between two adjacent lower bridge arm chip units, so that for a combination composed of one upper bridge arm chip unit and one lower bridge arm chip unit, the loop areas between the working current and the freewheeling current in all combinations are almost equal, so that the consistency of the parallel current branches in terms of resistance and parasitic inductance can be ensured, thereby achieving current equalization between the parallel chips, and improving the life of the power module.
As can be seen from comparing fig. 8 and fig. 2, the minimum circuit area in the present embodiment is smaller than the minimum circuit area in the prior art, and the maximum circuit area in the present embodiment is much smaller than the maximum circuit area in the prior art, and the minimum circuit area and the maximum circuit area in the present embodiment are almost the same and are relatively average. For this reason, the small circuit area can be obtained in the present embodiment mainly because the positive electrode connection portion 32 and the positive electrode lead-out portion 31 are both partially located above the space between the upper arm copper layer 11 and the lower arm copper layer 12, and the negative electrode connection portion 42 and the negative electrode lead-out portion 41 are both partially located above the space between the upper arm copper layer 11 and the lower arm copper layer 12, so that the distances from the positive electrode 3 and the negative electrode 4 to the upper arm chip unit and the lower arm chip unit are almost the same, unlike the prior art in which the distance from the positive electrode 951 to the upper arm chip unit is far. In addition, in the present embodiment, there is no situation that the upper arm chip unit or the lower arm chip unit does not work, but the current needs to be bonded by the bonding wire on the surface thereof, so that the current path can be shortened, and the loop area and the resistance can be reduced. According to the electromagnetic principle, the loop area is small, and the loop resistance and the parasitic inductance are naturally small.
Claims (8)
1. The utility model provides a power module of low parasitic inductance, including positive electrode (3), negative electrode (4), output electrode (5), bottom plate (6) and locate the insulating substrate on bottom plate (6), the copper layer at insulating substrate top includes upper bridge arm copper layer (11) and lower bridge arm copper layer (12) of separation, be equipped with upper bridge arm chip unit on upper bridge arm copper layer (11), be equipped with lower bridge arm chip unit on lower bridge arm copper layer (12), positive electrode (3) are connected with upper bridge arm chip unit electricity, negative electrode (4) are connected with lower bridge arm chip unit electricity, its characterized in that: the output electrode (5) is connected with the lower bridge arm copper layer (12); at least part of the positive electrode (3) is positioned between the upper bridge arm copper layer (11) and the lower bridge arm copper layer (12), or at least part of the positive electrode (3) is positioned above the position between the upper bridge arm copper layer (11) and the lower bridge arm copper layer (12); at least part of the negative electrode (4) is positioned between the upper bridge arm copper layer (11) and the lower bridge arm copper layer (12), or at least part of the negative electrode (4) is positioned above the position between the upper bridge arm copper layer (11) and the lower bridge arm copper layer (12);
the positive electrode (3) comprises a positive electrode welding foot (33) electrically connected with the upper bridge arm chip unit, the positive electrode welding foot (33) is connected with a positive electrode connecting part (32), the positive electrode connecting part (32) is connected with a positive electrode leading-out part (31), and one end of the positive electrode welding foot (33) is directly connected with the upper bridge arm copper layer (11); the negative electrode (4) comprises a negative electrode welding foot (43) electrically connected with the lower bridge arm chip unit, the negative electrode welding foot (43) is connected with a negative electrode connecting part (42), the negative electrode connecting part (42) is connected with a negative electrode leading-out part (41), and one end of the negative electrode welding foot (43) is directly connected with the lower bridge arm copper layer (12); the positive electrode connecting part (32) is parallel to the negative electrode connecting part (42);
the number of the upper bridge arm chip units is equal to that of the lower bridge arm chip units, the positive electrode welding feet (33) are arranged between every two adjacent upper bridge arm chip units, and the negative electrode welding feet (43) are arranged between every two adjacent lower bridge arm chip units.
2. The low parasitic inductance power module of claim 1, wherein: part or all of the positive electrode (3) is parallel to part or all of the negative electrode (4).
3. The low parasitic inductance power module of claim 1, wherein: the lower bridge arm copper layer (12) comprises a lower bridge arm main body copper layer and a lower bridge arm transition copper layer (123) which are separated from each other, the lower bridge arm chip units are arranged on the lower bridge arm main body copper layer, the negative electrodes (4) are connected with the lower bridge arm transition copper layer (123), and the lower bridge arm transition copper layer (123) is connected with the lower bridge arm chip units through lower bridge arm chip unit surface bonding wires.
4. The low parasitic inductance power module of claim 3, wherein: the bridge arm chip units are multiple, and a bridge arm transition copper layer (123) is arranged between every two adjacent bridge arm chip units.
5. The low parasitic inductance power module of claim 1, wherein: the number of the upper bridge arm chip units is equal to that of the lower bridge arm chip units, the distance from each upper bridge arm chip unit to the positive electrode connecting part (32) is equal, and the distance from each lower bridge arm chip unit to the positive electrode connecting part (32) is equal.
6. The low parasitic inductance power module of claim 5, wherein: the upper bridge arm chip unit is connected with the lower bridge arm copper layer (12) through a bonding wire.
7. The low parasitic inductance power module of claim 1, wherein: the upper bridge arm chip unit comprises an upper bridge arm switch chip (111) and an upper bridge arm diode chip (112), or the upper bridge arm chip unit comprises the upper bridge arm switch chip (111).
8. The low parasitic inductance power module of claim 1, wherein: the lower bridge arm chip unit comprises a lower bridge arm switch chip (121) and a lower bridge arm diode chip (122), or the lower bridge arm chip unit comprises a lower bridge arm switch chip (121).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811494310.8A CN109768038B (en) | 2018-12-07 | 2018-12-07 | Power module with low parasitic inductance |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811494310.8A CN109768038B (en) | 2018-12-07 | 2018-12-07 | Power module with low parasitic inductance |
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| Publication Number | Publication Date |
|---|---|
| CN109768038A CN109768038A (en) | 2019-05-17 |
| CN109768038B true CN109768038B (en) | 2020-11-17 |
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| CN105374811A (en) * | 2015-11-23 | 2016-03-02 | 扬州国扬电子有限公司 | Power module |
| CN205140972U (en) * | 2015-11-23 | 2016-04-06 | 扬州国扬电子有限公司 | Power module |
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| US6987670B2 (en) * | 2003-05-16 | 2006-01-17 | Ballard Power Systems Corporation | Dual power module power system architecture |
| JP2009512994A (en) * | 2005-06-24 | 2009-03-26 | インターナショナル レクティファイアー コーポレイション | Low inductance semiconductor half bridge module |
| CN105470249A (en) * | 2015-11-23 | 2016-04-06 | 扬州国扬电子有限公司 | Power module |
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| CN105374811A (en) * | 2015-11-23 | 2016-03-02 | 扬州国扬电子有限公司 | Power module |
| CN205140972U (en) * | 2015-11-23 | 2016-04-06 | 扬州国扬电子有限公司 | Power module |
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