CN109756968B - Precise synchronization timing method and device for single carrier spread spectrum system - Google Patents

Precise synchronization timing method and device for single carrier spread spectrum system Download PDF

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CN109756968B
CN109756968B CN201910071532.7A CN201910071532A CN109756968B CN 109756968 B CN109756968 B CN 109756968B CN 201910071532 A CN201910071532 A CN 201910071532A CN 109756968 B CN109756968 B CN 109756968B
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synchronization
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CN109756968A (en
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熊军
郭晓峰
谢琦
张凯
孙长红
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Ruixinfeng Aerospace Technology Beijing Co ltd
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Beijing Rinfon Technology Co ltd
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Abstract

The present invention relates to the field of communications technologies, and in particular, to a precise synchronization timing method and a precise synchronization timing apparatus for a single carrier spread spectrum system. The method comprises the following steps: performing matched filtering and interpolation on the baseband sampling data by using a root raised cosine filter to obtain matched filtered data; searching the matched and filtered data at intervals of half symbols, extracting by adopting a polyphase filter, and rapidly capturing the matched and filtered data by adopting a sliding correlation capturing algorithm; when the correlation value during capturing exceeds a preset threshold, a more accurate synchronous point is searched by taking the vicinity of the correlation peak point of the current capturing position as a base point, and after the synchronous search is completed, a cubic spline interpolation algorithm or a three-point maximum peak value is continuously used for calculating a more accurate optimal sampling point.

Description

Precise synchronization timing method and device for single carrier spread spectrum system
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a precise synchronization timing method and a precise synchronization timing apparatus for a single carrier spread spectrum system.
Background
The overall scheme of the time synchronization system is designed as shown in fig. 1, and the whole system consists of 4 synchronization stations, 1 reference base station (ground station or master station, abbreviated as a) and 3 target base stations (rover stations or slave stations, abbreviated as B1, B2 and B3 respectively). The 4 base stations simultaneously generate pulse per second, the master station generates a 100MHz clock signal, and the time keeping precision of the master station and the slave station is required to be not less than 4ns when the distance is not less than 10km, for example, in fig. 1, the distance between the master station and the slave station is 50 km. The current mature time synchronization technology comprises a one-way timing technology, a two-way timing technology, a positioning time service technology, a two-way time comparison technology and the like, wherein the two-way time comparison technology has the characteristics of good real-time performance, short initialization time, good environmental adaptability and the like, and particularly the two-way time comparison technology is high in time keeping precision and technically accords with actual requirements.
The main principle of the two-way time-contrast technique is shown in fig. 2. The working principle of the two-way time comparison technique is briefly described by using the clock synchronization process of 1 reference base station and 1 target base station. The reference base station and the target base station generate respective time standards through crystal oscillator clocks, and work under the time generated under the independent time standards. Assuming that the time difference between the crystal oscillator clocks A and B1 is Δ t, the time synchronization between A and B1 can be realized if Δ t can be accurately measured and the crystal oscillator clocks themselves can be corrected through the time comparison signals.
Suppose A is at its own time t0The time is a time contrast signal, B1 is t1Receiving a time comparison signal of a master station at a moment, and measuring the difference time difference to be delta t1=t1-t0. Assuming a propagation delay of τ from A to B1, Δ t1=t1-t0τ + Δ t. Similarly, B1 is at its own time
Figure BDA0001957446110000011
A time comparison signal is sent at the moment, B1 is at the time of itself
Figure BDA0001957446110000021
The time comparison signal of the master station is received at the moment, and the difference time difference is measured
Figure BDA0001957446110000022
Assuming a propagation delay from a to B1 of tau,
Figure BDA0001957446110000023
when the same transmission frequency and a proper signal system are selected, the transmission time can be considered to be completely the same in the transmission process of the bidirectional time comparison signal, and the two time differences are subtracted to obtain the time difference
Figure BDA0001957446110000024
The time synchronization error between A and B1 is obtained, and the crystal oscillator clocks of the respective times are corrected to achieve relatively high synchronization accuracy.
The bidirectional link between the master station and the slave station comprises a transmitter, a transmission channel and a receiver. Many delay error links are included in the whole propagation path. (1) Transmitter delay error: transmitter delay is a normal non-stationary random process with slow mean-shift. The mean change curve and the variance can be obtained through zero value test and process detection, and at present, professional suppliers can publish performance index data of products. Since it is a large signal operation, its variation curve is substantially constant, and the variance is generally within 0.1 ns. (2) Transmission delay error: the signal propagation path often includes media such as the atmosphere, and has a relatively complex time delay characteristic, which mainly depends on the transmission frequency and the transmission time. In the case where the forward and reverse frequencies and the time through the atmosphere are close, the forward and reverse propagation delays are substantially the same, and the difference can be determined to be generally within 0.5 ns. (3) Receiver delay error: the delay of the receive channel is also a normal non-stationary random process with slow mean shift. The mean change curve and the variance can be obtained through a one-way zero value test, the values mainly depend on the signal-to-noise ratio during demodulation, and the variance can be generally smaller than 0.5ns through smoothing treatment under the condition of the signal-to-noise ratio of about 20 db.
Therefore, the synchronization error of the two-way time comparison depends on the measurement of the time difference between the master station and the slave station and the transmission line of the two-way link. The time difference measurement precision is composed of a system error and a random error, the system error can be expressed and corrected in a measurement mean value, the random error is a main factor influencing the time difference measurement, and in addition, the consistency of the time delay of the bidirectional link also directly influences the synchronous error estimation precision.
In conclusion, the bidirectional time comparison technology can control the theoretical error of the long-distance time synchronization within 2ns, and basically determines that the time synchronization error can be controlled below 3ns by the technical scheme by considering various uncertainties in the engineering practice process, thereby completely meeting the requirements of technical indexes. The technology has the characteristics of small dynamic influence of relative motion between two individuals, easy realization of the technology and good time synchronization real-time performance, and can well meet the application requirement of design.
The determination of high-precision time difference is the key and the basis for realizing the bidirectional time comparison technology. The time synchronization error of the two places can be determined only by determining the time difference between the sending time and the local receiving time of the other party, and the accuracy of the time difference determination also directly influences the accuracy of the final synchronization error of the two places, so that the measurement accuracy of the time difference needs to be improved as much as possible in the design. In engineering, a time interval counter is generally used for measuring time difference, and pseudo-random codes are used as initial pulses of time comparison signals, so that the measurement accuracy of the time difference can be greatly improved.
If the system meets the requirement of 3ns synchronous error in design, time difference measurement needs to be completed by combining two links of coarse synchronization and fine synchronization. According to design requirements, a reference base station generates a local crystal oscillator clock of 100MHz, the theoretical error of the control time difference measurement can only be within 10ns by capturing a received comparison signal, and the required time synchronization measurement cannot be completed only by capturing the locally received comparison signal in consideration of the uncontrollable error of engineering practice. Therefore, a fine synchronization link needs to be designed to complete the correction of the time coarse synchronization. The realization idea of fine synchronization is as follows: the target base station synchronously generates a comparison code which is completely the same as the pseudo-random capture code of the reference base station according to a self crystal oscillator clock, the measured pulse and the reference pulse are used as comparison, meanwhile, the high-frequency counting pulse is started for counting, the pulse value is multiplied by the counting period to be equal to the fine synchronization correction difference value, the coarse synchronization time correction is completed by the fine synchronization correction difference value, and the time difference measurement precision is improved.
Because the time difference with the precision within 10ns can be calculated by coarse synchronization, a 1000MHz high-frequency pulse counter is adopted, and the zero resetting is completed every 2ns of the counting value, so that the necessary time synchronization precision can be ensured, and the resources can be saved. However, the high-frequency pulse counter has the problems of high cost and high implementation difficulty.
Therefore, a precise synchronization timing method and a precise synchronization timing device for a single carrier spread spectrum system are urgently needed.
Disclosure of Invention
The invention provides a precise synchronization timing method and a precise synchronization timing device of a single carrier spread spectrum system, which are convenient for obtaining high-precision and high-stability synchronization performance by adopting minimum resources.
In one aspect of the present invention, a precise synchronization timing method for a single carrier spread spectrum system is provided, which comprises the following steps:
performing matched filtering and interpolation on the baseband sampling data to obtain matched filtered data;
capturing the matched and filtered data;
when the correlation value during capturing exceeds a preset threshold, calculating an optimal sampling point by taking the current capturing position as a base point;
and taking the optimal sampling point as a timing point to carry out channel synchronization and receive user data.
Further, matched filtering and interpolation are performed on the baseband sampling data by using a root raised cosine filter.
Further, in the step of capturing the matched filtered data, a search is performed at an interval of half a symbol.
Further, the matched and filtered data is captured by adopting a sliding correlation capture algorithm.
Furthermore, in the step of capturing the matched and filtered data, a finite-length single-bit impulse response filter is used for correlating the received matched and filtered data with a known synchronization header, meanwhile, in order to ensure the timing precision, the CHIP synchronization needs to reach 1/8CHIP precision, the sampling rate is interpolated to 8 times of the CHIP rate, namely 4 times of interpolation, a polyphase filter structure is used during interpolation, the coefficients of the filter are 4 groups of coefficients extracted from the matched filter coefficients at an interval of 4, the interpolated data become 4 paths, the CHIP rate becomes 8 times after the interpolation of 4 times, the precision of 1/8 CHIPs is reached, the 4 paths of polyphase filter output 4 times of interpolated output signals, one path of output is arbitrarily selected to correlate with a local synchronization sequence, and the operand is reduced to 1/4.
Further, when the correlation value at the time of capturing exceeds a preset threshold, the method of calculating the optimal sampling point in the step of calculating the optimal sampling point with the current capturing position as the base point is as follows: and calculating the correlation values of 9 sampling points of the current acquisition position and 1/2 chips before and after the current acquisition position, and selecting the point with the maximum value as the optimal sampling point.
Further, when the correlation synchronization by the multi-phase interpolation algorithm is completed and reaches the accuracy of 1/8CHIP, the cubic spline interpolation algorithm or the three-point maximum peak calculation device is continuously used near the obtained correlation peak, so that the accuracy of the correlation peak point is further improved and the timing synchronization of more than 1/32CHIP is achieved.
Further, the three-point maximum peak value calculating device calculates the optimal sampling points by calculating the amplitudes R1, R2 and R3 corresponding to the 3 highest correlation peak values P1, P2 and P3 before and after the correlation peak value according to the following formula:
when R1 is not less than R3,
Figure BDA0001957446110000051
when R1> R3,
Figure BDA0001957446110000052
where T is the chip period, TsIn the sampling period, τ is the time difference between the actual optimal sampling point and the optimal sampling point obtained during capturing, P1, P2 and P3 are respectively the 3 highest correlation peak points before and after the correlation peak, and R1, R2 and R3 are respectively the correlation values corresponding to P1, P2 and P3.
In a second aspect of the present invention, there is provided a fine synchronization timing apparatus for a single carrier spread spectrum system, which implements the fine synchronization timing method for a single carrier spread spectrum system described above, comprising:
the baseband sampling data processing module is used for performing matched filtering and interpolation on the baseband sampling data to obtain matched filtered data;
the capturing module is used for capturing the matched and filtered data;
the optimal sampling point calculation module is used for calculating an optimal sampling point by taking the current capture position as a base point when the correlation value during capture exceeds a preset threshold;
and the data receiving module is used for carrying out channel synchronization by taking the optimal sampling point as a timing point and receiving user data.
Further, the baseband sampling data processing module performs matched filtering and interpolation on the baseband sampling data by using a root raised cosine filter.
Compared with the prior art, the precise synchronization timing method and the precise synchronization timing device of the single carrier spread spectrum system have the following progress: the invention takes the calculated optimal sampling point as a timing point to carry out channel synchronization, receives user data, can effectively resist multipath interference, can complete accurate system synchronization under the condition of few resources, and meets the requirement of high-precision distance measuring equipment.
The foregoing description is only an overview of the technical solutions of the present invention, and the embodiments of the present invention are described below in order to make the technical means of the present invention more clearly understood and to make the above and other objects, features, and advantages of the present invention more clearly understandable.
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Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
FIG. 1 is a diagram of the overall architecture of a clock synchronization system;
FIG. 2 is a principal schematic diagram of a two-way time-contrast scheme;
FIG. 3 is a flowchart of the precise synchronization timing method of the single carrier spread spectrum system according to the embodiment of the present invention;
fig. 4 is a block diagram of the device connections of the precise synchronization timing apparatus of the single carrier spread spectrum system in the embodiment of the present invention;
FIG. 5 is a diagram of multi-phase interpolation filtering with multiple signal inputs and only one output selected;
FIG. 6 is a block diagram of a system architecture of a sliding correlation synchronization code acquisition method;
FIG. 7 is a schematic diagram of the time domain waveform diagram of the optimal sampling point and 3 points on both sides of the optimal sampling point;
FIG. 8 is a plot of the correlation peak power points interpolated using spline 3;
FIG. 9 is a corresponding graph of interpolated points from spline3 and the original correlation peak point (the actual peak point is to the left of the original peak point);
FIG. 10 is a corresponding graph of interpolated points from spline3 and the original correlation peak point (actual peak point to the right of original peak point);
FIG. 11 is a flow chart for achieving high accuracy synchronization;
FIG. 12 is a diagram illustrating the structure of a repeated training sequence;
fig. 13 is a frequency domain equalization block diagram of a single carrier spread spectrum system.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
The embodiment provides a precise synchronization timing method and a precise synchronization timing device of a single carrier spread spectrum system.
As shown in fig. 3, the precise synchronization timing method of the single carrier spread spectrum system of the present embodiment includes the following steps:
s1, performing matched filtering and interpolation on the baseband sampling data to obtain matched filtered data;
s2, capturing the matched and filtered data;
s3, when the correlation value during capturing exceeds a preset threshold, calculating the optimal sampling point by taking the current capturing position as a base point;
s4, using the optimal sampling point as the timing point to perform channel synchronization, and receiving the user data.
The precise synchronization timing method of the single carrier spread spectrum system of the embodiment takes the calculated optimal sampling point as a timing point to carry out channel synchronization and receive user data, can effectively resist multipath interference, can complete precise system synchronization under the condition of few resources, and meets the requirements of high-precision ranging equipment.
In the precise synchronization timing method of the single carrier spread spectrum system of this embodiment, in specific implementation, a root-raised cosine filter is used to perform matched filtering and interpolation on baseband sampling data. The precise synchronization timing method of the single carrier spread spectrum system of this embodiment adopts a synchronization design, in the method, both the operating clock frequency and the ADC (analog-to-digital converter) sampling rate are 2 times of the symbol rate (e.g., 61.44MHz), the baseband I, Q sample data is first subjected to matched filtering and interpolation, the matched filter is a root-raised cosine filter RRC, the interpolation is also realized by using the filter at the same time, the corresponding sampling rate of the filter is very high, and it should be considered that the interpolated rate of 61.44 × 4 is 245.76MHz, at this time, the order of the filter is relatively long, the signal processing rate is high, and more FPGA (field programmable gate array) resources are usually required to be consumed. Meanwhile, in order to ensure the timing accuracy, the CHIP synchronization generally needs to reach 1/8CHIP accuracy, so the sampling rate needs to be interpolated to 8 times of the CHIP rate, namely 4 times of interpolation, a polyphase filtering structure is adopted during interpolation, the coefficients of the filter are 4 groups of coefficients extracted from the matched filter coefficients at an interval of 4, and thus, after the interpolation is finished, the data becomes 4 paths.
In the precise synchronization timing method of the single carrier spread spectrum system according to this embodiment, in the specific implementation, in the step of capturing the data after the matched filtering, the search is performed at an interval of half a symbol. The method is favorable for improving the accuracy in capturing and the accuracy of subsequent synchronization.
In the precise synchronization timing method of the single carrier spread spectrum system of this embodiment, in specific implementation, a sliding correlation capture algorithm is used to capture the matched and filtered data. Burst acquisition is performed by using a synchronization code in a preamble, the modulation scheme of the preamble is BPSK (Binary Phase Shift Keying)/QPSK (Quadrature Phase Shift Keying), and the burst acquisition adopts a sliding correlation acquisition algorithm commonly used in pseudo code acquisition, which is a serial search method. Fig. 6 is a block diagram of a system structure of the sliding correlation method pseudo code capturing method.
In the precise synchronization timing method of the single carrier spread spectrum system in this embodiment, in a specific implementation, in the step of capturing the matched and filtered data in step S1, a finite-length single-bit impulse response filter is used to correlate the received matched and filtered data with a known synchronization header. I.e., each half chip is correlated with the received data with a known synchronization header. Because the correlation is carried out according to the interval of half symbols, the correlation can be realized by an FIR filter (finite long single-bit impulse response filter), the local correlation sequence is an m sequence, the filter coefficient of the m sequence only has two values of 1 and-1, and at the moment, the correlation only has addition and subtraction operation and does not have multiplication operation. The half chip synchronization stage at this time is actually the signal rate sampled back by the ADC, and after the interpolation int _ hb is 4 times, the chip rate is changed to int _ all 8 times, which reaches the accuracy of 1/8 chips. And (4) paths of 4-time interpolated output signals are output by the int _ hb-polyphase filtering, and one path of output is arbitrarily selected to be related to a local synchronous sequence, so that the computation amount is reduced to 1/4. The input data rate of each filter is int _ rrc of 2 times the chip rate, and the filter operates at 2 times the chip rate, and this reduced-rate hardware implementation architecture is shown in fig. 5.
In the precise synchronization timing method of the single carrier spread spectrum system of this embodiment, in a specific implementation, when the correlation value at the time of capturing exceeds the preset threshold in step S3, the method of calculating the optimal sampling point in the step of calculating the optimal sampling point with the current capturing position as the base point is as follows: and calculating the correlation values of 9 sampling points of the current acquisition position and 1/2 chips before and after the current acquisition position, and selecting the point with the maximum value as the optimal sampling point. The first 1/2 chips (1 chip for 8 samples and 1/2 chips for 4 samples) to the last 1/2 chips (4 samples) for a total of 9 samples. The schematic diagram of the time domain waveform diagram of the optimal sampling point and 3 points on both sides of the optimal sampling point is shown in fig. 7. In FIG. 7, T is the chip period, TsAnd tau is the time difference between the actual optimal sampling point and the optimal sampling point obtained in the capturing process, if the actual optimal sampling point is before the optimal sampling point obtained in the capturing process, tau is negative, otherwise tau is positive. τ is the quantity that needs to be estimated.
If the received signal is r (n) and the pseudo code is p (n), the expression of the correlation process is:
Figure BDA0001957446110000091
when the correlation value exceeds the threshold during acquisition, the pseudo code is acquired, and the first-stage coarse synchronization calibration point1_ pos is reached, because the precision of the half chip is low, 9 correlation values are calculated by taking the point as a starting point in the range from the front 1/2 chips (4 sampling points) to the rear 1/2 chips (4 sampling points) (totally 9 sampling points), and the point with the maximum value is found as the optimal sampling point, which is then taken as the second-stage fine synchronization point2_ pos. The subsequent demodulation processing obtains the optimal sampling point best _ point of the signal according to the following method of coarse synchronization and fine synchronization:
best_point=point1_pos*4+point2_pos-int_all/2;
the point of best _ point is taken as a reference starting point to perform extraction, a reference starting point is obtained, and the output of the phase in 4 phases is also obtained, for example, point1_ point is 171, int _ hb is 4, point2_ point is 3, and int _ all is 8.
The mphase point2_ point-int _ all/2-1 phase is the phase of the current phase-isolated mphase phases.
As shown in fig. 9, 10 and 11, in the precise synchronization timing method of the single carrier spread spectrum system of the present embodiment, in the implementation, the optimal sampling point is calculated by using any one of the cubic spline interpolation algorithm or the three-point maximum peak calculation device. The subsequent despreading and demodulation processes are performed with the best sampling point as a reference starting point, but the accuracy is not enough for ranging. Thus, further refinement of the correlation peak R achieves more accurate synchronization. The first scheme is to use spline3 interpolation algorithm (cubic spline interpolation, spline interpolation is an interpolation method commonly used in industrial design to obtain smooth curves, cubic splines are a wide variety of interpolation methods used therein), and more accurate decimal synchronization can be achieved, that is, further interpolation processing is performed near the relevant peak. It can be seen from fig. 8 that the correlation peak power point is 2 samples away from the optimal sampling point, if 8 times oversampling, it is 1/4Ts, and Ts is already 1/8CHIP accuracy, so 1/32CHIP accuracy is achieved, if Tchip is 1/10MHZ is 100ns, so very high accuracy can be achieved, which is less than 100ns/32 < 4 ns.
The second scheme is that the calculation can be simply and rapidly performed by the following formula through 3 points adjacent to the correlation peak. For example, the 3 highest correlation peak points P1, P2, and P3 near the correlation peak in fig. 7, if the actual optimal sampling point is not the point P2, but the peak value at a distance τ from P2 is a, then P in fig. 7 is P2The value of the point is
Figure BDA0001957446110000101
When 1 and-1 are uniformly distributed in the chip, half of N sampling values are the value, and half are A, then P is2Correlation value of points
Figure BDA0001957446110000102
In the above formula PNIs the power of the noise. In the same way, P can be obtained1And P3The correlation values of the points are respectively:
Figure BDA0001957446110000103
Figure BDA0001957446110000104
according to the above 3 equations, τ can be obtained by:
Figure BDA0001957446110000105
Figure BDA0001957446110000106
Figure BDA0001957446110000107
when R1 is not more than R3, the following equation is solved according to the above equation of 3 peak points:
Figure BDA0001957446110000111
when R1 is more than R3, the following equation is solved according to the 3 peak points:
Figure BDA0001957446110000112
in the present system, TsT/10, i.e. the duration of a symbol is T, if a symbol is oversampled 10 times, then a sample point is Ts T/10, then the integer interpolation timesINT _ IPOINT ═ 10; then if a symbol duration is 100ns then the duration of a sample point is 10 ns.
When R1 is not more than R3, the normalized time difference is
Figure BDA0001957446110000113
When R1> R3, the normalized time difference is
Figure BDA0001957446110000114
Calculating to obtain tau, thereby determining the absolute time from the optimal sampling point
Figure BDA0001957446110000115
And obtaining the relation of decimal interpolation multiples.
For example, in fig. 9, 3 interpolated points of spline3 correspond to the original correlation peak point, and P1 points R1 is 1.36E +5, P2 points R2 is 1.56E +5, P3 points R3 is 1.15E +5, and R1> R3 are calculated by formulas, then τ is-0.27 Ts and the following position matching calculated by 3 times spline interpolation are calculated by using the formula solved by the above 3 equations when R1> R3, the corresponding point of the maximum peak point and the second maximum peak point between 10 interpolated points of line3 (fraction 10 times interpolated FRAC _ oiipnt is 10) is approximately between the 8 th and the 7 th points, and the actual peak point is negative to the left of the correlation peak point.
The integer interpolation multiple INT _ IPOINT of one symbol is 10, that is, one symbol is interpolated into 10 sampling points, and based on this, spline3 performs fractional interpolation FRAC _ IPOINT of 10 times again for each sampling point, and the accuracy after fractional interpolation reaches the measurement accuracy of 1 ns.
For example, the MATLAB function yi ═ spline (x, y, xi) is called. This is the value at xi interpolated by a spline function based on known x, y data. That is, the function value corresponding to xi is calculated from the values of x and y.
y=78657 102996 140116 157855 117692 92208 65149
XI 1:1:7, Y0: 1/10:7-1/10, then the signal after interpolation is obtained:
YI=88035 84983 82457 80435 78898 77823 77189 76977 77165 77732 78657 79919 81497 83370 85518 87920 90554 93399 96435 99641 102996 106478 110067 113742 117482 121266 125074 128883 132674 136425 140116 143713 147141 150311 153134 155523 157388 158642 159197 158964 157855 155819 152963 149427 145356 140893 136180 131360 126577 121973 117692 113843 110412 107350 104609 102140 99897 97830 95891 94033 92208 90366 88461 86444 84266 81881 79239 76293 72995 69296
as shown in fig. 9, the upper y is the correlation peak power point in fig. 9, and YI is the correlation peak power point interpolated by spline 3. In fig. 9 and 10, the fractional interpolation multiple frame _ IPOINT is 10.
As shown in fig. 10, when R1< R3, τ is calculated to be 0.28Ts by the above formula and the position is matched by interpolation, the corresponding point of 10 points between the maximum peak point and the second maximum peak point after interpolation in spline3 (10 times the decimal interpolation FRACE _ IPOINT is 10) is approximately between the 8 th and the 7 th points, and the actual peak point is right of the maximum peak point of the correlation peak, which is positive.
The result calculated using the second approach is close to the result of the spline3 interpolation algorithm using the first approach, and the measurement target is reached.
Therefore, the present embodiment can accurately calculate the actual peak power point position by using 3 points.
As shown in fig. 4, a precise synchronization timing apparatus of a single carrier spread spectrum system for implementing the precise synchronization timing method of a single carrier spread spectrum system described in the foregoing embodiments of the present embodiment includes:
the baseband sampling data processing module is used for performing matched filtering and interpolation on the baseband sampling data to obtain matched filtered data;
the capturing module is used for capturing the matched and filtered data;
the optimal sampling point calculation module is used for calculating an optimal sampling point by taking the current capture position as a base point when the correlation value during capture exceeds a preset threshold;
and the data receiving module is used for carrying out channel synchronization by taking the optimal sampling point as a timing point and receiving user data.
The precise synchronization timing device of the single carrier spread spectrum system of the embodiment uses the calculated optimal sampling point as a timing point to carry out channel synchronization and receive user data, can effectively resist multipath interference, can complete precise system synchronization under the condition of few resources, and meets the requirements of high-precision ranging equipment.
In the precise synchronization timing apparatus of the single carrier spread spectrum system according to this embodiment, in specific implementation, the baseband sampling data processing module performs matched filtering and interpolation on the baseband sampling data by using a root-raised cosine filter.
In the precise synchronization timing apparatus of the single carrier spread spectrum system of this embodiment, in specific implementation, the acquisition module searches at an interval of half a symbol.
The chip equalizer performs equalization at the chip level, is a special equalizer for improving the performance of a single carrier spread spectrum system, and can only adopt linear equalization. The principle of the method is that chip-level self-adaptive equalization is carried out on a received chip waveform before descrambling/despreading, so that as equalization is completed, an equalized channel is flat, a signal after equalization only has one path theoretically in a time domain, and only has one path before despreading, namely a vector signal constellation diagram damaged by multipath channels is recovered to a certain extent, namely multipath interference is restrained. In the mobile communication environment, the user signal is equalized by using the tap coefficient of the pilot frequency training, and the signal is de-spread after equalization, so that the spread spectrum gain can be completed more in a matching way.
As shown in fig. 12 and fig. 13, when the fine synchronization timing method and the fine synchronization timing apparatus of the single carrier spread spectrum system of the present embodiment are used, first, the transmitter transmits a known training sequence with a fixed length so that the equalizer at the receiver can make correct settings. The user data is transmitted immediately after the training sequence. When receiving user data, the equalizer compensates the channel and then decides to obtain the needed data. The equalizer is repeatedly trained periodically with an adaptive algorithm to track the changing channel.
The doppler plus clock difference in this embodiment is of the order of 2ppm (2 x 10-6), and at a carrier frequency of 1.7GHz, the resulting frequency offset is approximately 1.7GHz x 2 x 10-6 kHz, assuming that the doppler shift caused by the addition of the high-speed moving signal is 1.6kHz, thus the total offset Af is 5kHz, and the maximum amount of phase rotation produced at 510 chips during acquisition is approximately 3.4kHz
2 pi 3.4kHz 255/61.44MHz pi 2 pi 5 pi 10 pi 3pi 512/(61.44 x 10 pi 6) 0.083pi, so that the loss caused by small phase errors to the capture is very small and can be ignored.
In the precise synchronization timing method and the precise synchronization timing device of the single carrier spread spectrum system of the embodiment, the training sequence is not only used for channel equalization, but also used for channel synchronization, frequency offset measurement and the like. In order to realize code synchronization of the spread spectrum channel 1/8CHIP, a polyphase interpolation filtering algorithm is adopted, and the polyphase interpolation processing only needs to realize one-path filtering processing. After the low-speed signal finds out the approximate synchronization position, the most accurate 1/8CHIP synchronization is obtained by selecting the previous INT _ ALL/2 data and performing one-time correlation comparison, namely, the 2-level synchronization algorithm is adopted, and the minimum resource is adopted to obtain the synchronization performance with high accuracy and high stability.
The precise synchronization timing method and the precise synchronization timing device of the single carrier spread spectrum system can effectively resist multipath interference, can complete precise system 1/8CHIP synchronization under the condition of few resources by adopting a multiphase interpolation filtering single-path algorithm, and can improve the timing precision to 1/32CHIP by using a cubic spline interpolation algorithm or any one of three-point maximum peak value calculation devices to calculate the optimal sampling point on the basis, thereby meeting the requirements of high-precision ranging equipment and providing complete algorithm support for high-precision flying object ranging.
For simplicity of explanation, the method embodiments are described as a series of acts or combinations, but those skilled in the art will appreciate that the embodiments are not limited by the order of acts described, as some steps may occur in other orders or concurrently with other steps in accordance with the embodiments of the invention. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred and that no particular act is required to implement the invention.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (4)

1. A precise synchronization timing method of a single carrier spread spectrum system is characterized by comprising the following steps:
performing matched filtering and interpolation on the baseband sampling data by using a root raised cosine filter to obtain matched filtered data;
capturing the matched and filtered data by adopting a sliding correlation capture algorithm, and searching at an interval of a half symbol; the capturing of the data after the matched filtering specifically includes: the method comprises the steps that a finite-length single-bit impulse response filter is adopted to correlate received matched and filtered data with a known synchronization head, meanwhile, in order to guarantee timing precision, in order to ensure CHIP synchronization, 1/8CHIP precision is required, a sampling rate is interpolated to 8 times of a CHIP rate, namely 4 times of interpolation is adopted, a multiphase filter structure is adopted during interpolation, coefficients of the filter are 4 groups of coefficients extracted from matched filter coefficients at intervals of 4, 4 paths of data are obtained after interpolation is finished, the CHIP rate is changed to 8 times after 4 times of interpolation, 1/8CHIP precision is achieved, 4 paths of multiphase filter outputs 4 times of interpolated output signals, one path of output is selected randomly to correlate with a local synchronization sequence, and the operand is reduced to 1/4;
when the correlation value during capturing exceeds a preset threshold, calculating an optimal sampling point by taking the current capturing position as a base point; calculating the correlation values of the current capture position and the front and rear 1/2 chips with 9 sampling points, and selecting the point with the maximum value as the optimal sampling point;
and taking the optimal sampling point as a timing point to carry out channel synchronization and receive user data.
2. The method of claim 1, wherein when the polyphase interpolation algorithm is performed to achieve 1/8CHIP accuracy in correlation synchronization, the cubic spline interpolation algorithm or the three-point maximum peak calculation device is used to obtain the vicinity of the correlation peak, thereby further improving the accuracy of the correlation peak point to achieve timing synchronization of 1/32CHIP or higher.
3. The method for fine synchronization timing of a single carrier spread spectrum system according to claim 2, wherein the three-point maximum peak calculating means calculates the optimum sampling points for the amplitudes R1, R2, R3 corresponding to the 3 highest correlation peak points P1, P2, P3 before and after the correlation peak by the following formula:
when R1 is not less than R3,
Figure FDA0002685907750000011
when R1> R3,
Figure FDA0002685907750000021
where T is the chip period, TsIn the sampling period, τ is the time difference between the actual optimal sampling point and the optimal sampling point obtained during capturing, P1, P2 and P3 are respectively the 3 highest correlation peak points before and after the correlation peak, and R1, R2 and R3 are respectively the correlation values corresponding to P1, P2 and P3.
4. A fine synchronization timing apparatus of a single carrier spread spectrum system for implementing the fine synchronization timing method of the single carrier spread spectrum system according to claim 3, comprising:
the baseband sampling data processing module is used for performing matched filtering and interpolation on the baseband sampling data by using a root raised cosine filter to obtain matched filtered data;
the capturing module is used for capturing the matched and filtered data;
the optimal sampling point calculation module is used for calculating an optimal sampling point by taking the current capture position as a base point when the correlation value during capture exceeds a preset threshold;
and the data receiving module is used for carrying out channel synchronization by taking the optimal sampling point as a timing point and receiving user data.
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