CN109739391B - Touch array substrate, manufacturing method and liquid crystal display device - Google Patents
Touch array substrate, manufacturing method and liquid crystal display device Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 63
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 8
- 229910052751 metal Inorganic materials 0.000 claims abstract description 71
- 239000002184 metal Substances 0.000 claims abstract description 71
- 239000010409 thin film Substances 0.000 claims abstract description 33
- 230000006698 induction Effects 0.000 claims abstract description 25
- 238000002955 isolation Methods 0.000 claims abstract description 14
- 239000003990 capacitor Substances 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 25
- 239000010408 film Substances 0.000 claims description 6
- 230000001154 acute effect Effects 0.000 claims description 3
- 238000001514 detection method Methods 0.000 claims description 2
- 230000001808 coupling effect Effects 0.000 abstract description 6
- 230000008569 process Effects 0.000 description 17
- 238000005530 etching Methods 0.000 description 7
- 230000003071 parasitic effect Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000002834 transmittance Methods 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000009471 action Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- OFIYHXOOOISSDN-UHFFFAOYSA-N tellanylidenegallium Chemical compound [Te]=[Ga] OFIYHXOOOISSDN-UHFFFAOYSA-N 0.000 description 1
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Abstract
The application discloses a touch array substrate, a manufacturing method and a liquid crystal display device. The touch array substrate includes: a substrate; a thin film transistor on the substrate; a pixel electrode electrically connected to a drain electrode of the thin film transistor; the common electrode and the pixel electrode form a capacitor and provide a touch sensing signal; a first metal layer forming a plurality of scan lines connected to a gate electrode of the thin film transistor; a second metal layer forming a plurality of data lines connected to the source electrodes of the thin film transistors; the third metal layer is used for forming a plurality of induction lines electrically connected with the common electrode, and the induction lines respectively transmit corresponding touch induction signals; and the isolation layer is positioned between the second metal layer and the third metal layer, wherein the extending direction of the plurality of induction lines in the plane of the third metal layer is not parallel to the extending direction of the plurality of data lines in the plane of the second metal layer. The induction lines of the touch array substrate are not parallel to the data lines, so that the coupling effect of the data lines on the induction lines is reduced.
Description
Technical Field
The invention relates to the technical field of display, in particular to a touch array substrate, a manufacturing method and a liquid crystal display device.
Background
With the rapid development of display technology, touch screens (touch panels) have been spread over various aspects of people's lives. With the continuous progress of touch technology, people have higher and higher requirements on touch products, and light and thin products are considered while paying attention to sensitivity, so that the manufacturing cost of display panel manufacturers is greatly increased.
At present, a touch screen can be divided into: an On-cell touch panel (On-cell touch panel) and an In-cell touch panel (In-cell touch panel). In the in-cell touch screen, the touch electrodes of the touch screen are embedded inside the display screen, for example, the touch electrodes are embedded on the array substrate.
Taking an embedded touch screen as an example, fig. 1 shows a schematic plan view of a touch array substrate according to the prior art, as shown in fig. 1, a common electrode layer and a sensing line layer are arranged on an existing touch array substrate, wherein the common electrode layer includes a plurality of common electrodes 150 arranged in an array and insulated from each other, the sensing line layer includes a plurality of sensing lines 140 insulated from each other, and the plurality of sensing lines 140 are electrically connected to the plurality of common electrodes 150 in a one-to-one correspondence manner. Specifically, an insulating layer is disposed between the common electrode layer and the sensing line layer, a via hole 143 is disposed in the insulating layer at a position corresponding to each common electrode 150, one end of each sensing line 140 in the sensing line layer is electrically connected to one corresponding common electrode 150 through the via hole 143, and the other end of each sensing line 140 in the sensing line layer is electrically connected to the touch driving integrated chip 170.
Fig. 2 shows a schematic structural diagram of a pixel unit on a touch array substrate according to the prior art, and as shown in fig. 2, a plurality of pixel units defined by insulating and crossing scan lines 142 and data lines 141 are further disposed on the array substrate, and a pixel electrode 160 and a thin film transistor are disposed in each pixel unit. Fig. 2 shows that each sensing line 140 and each data line 141 of the sensing line layer are on the same layer and are arranged next to each other.
Fig. 3 is a cross-sectional view illustrating a pixel unit on a touch array substrate according to the prior art, and as shown in fig. 3, the array substrate includes the following steps: performing a first etching process on the substrate 101 to form a gate electrode 110 and a scan line of the thin film transistor, and forming a first insulating layer 121; performing a second etching process to fabricate the first channel layer 131 and the second channel layer 132 of the thin film transistor; performing a third etching process to fabricate the source electrode 112 and the drain electrode 111 of the thin film transistor, and the data line and the sensing line of the sensing line layer, and forming a second insulating layer 122; a fourth etching process is used to make a via hole (not shown) for connecting the common electrode; performing a fifth etching process to form the common electrode 150 and a third insulating layer 123; the sixth etching process is used to form a via hole of the pixel electrode 160, and the seventh etching process is used to form the pixel electrode 160, wherein the pixel electrode 160 contacts the drain 111 of the thin film transistor through the via hole.
In the structure of the touch array substrate, each sensing line and each data line of the sensing line layer are arranged in the same layer and are adjacent to each other, which may cause the circuit to generate parasitic capacitance, the sensing line has too heavy load, the sensitivity is deteriorated, and the transmittance of the pixels is reduced due to the adjacent proximity of the sensing line and the data line. Therefore, further improvement of the touch array substrate in the prior art is needed to solve the above problems.
Disclosure of Invention
In view of the foregoing problems, an object of the present invention is to provide a touch array substrate, a manufacturing method thereof and a liquid crystal display device, wherein an extending direction of a plurality of sensing lines in a plane of a third metal layer is not parallel to an extending direction of a plurality of data lines in a plane of a second metal layer, so as to reduce a coupling effect of the data lines on the sensing lines.
According to an aspect of the present invention, there is provided a touch array substrate, including: a substrate; a thin film transistor on the substrate; a pixel electrode electrically connected to a drain electrode of the thin film transistor; the common electrode and the pixel electrode form a capacitor and provide a touch sensing signal; a first metal layer forming a plurality of scan lines connected to a gate electrode of the thin film transistor; a second metal layer forming a plurality of data lines connected to the source electrodes of the thin film transistors; a third metal layer forming a plurality of sensing lines electrically connected to the common electrode, the plurality of sensing lines transmitting the corresponding touch sensing signals, respectively; and the isolation layer is positioned between the second metal layer and the third metal layer so as to electrically isolate the second metal layer from the third metal layer, wherein the extension directions of the plurality of induction lines in the plane of the third metal layer and the extension directions of the plurality of data lines in the plane of the second metal layer are not parallel to each other.
Preferably, the common electrode includes a plurality of sub-electrodes arranged in m rows and n columns and electrically isolated from each other, each sub-electrode is connected to a corresponding sensing line through at least one electrical connection structure, m sub-electrodes in each column of the sub-electrodes are electrically connected to m adjacent sensing lines, where m and n are non-zero natural numbers.
Preferably, each of the sensing lines extends in a zigzag shape in a column direction of the plurality of sub-electrodes.
Preferably, each of the induction lines comprises m linear sub-portions connected in sequence, and an acute angle, a right angle or an obtuse angle is formed between two adjacent sub-portions in each induction line.
Preferably, a projection of each of the sub-portions in the plane of the second metal layer intersects a plurality of the data lines.
Preferably, the sub-portions located above the same sub-electrode are distributed in parallel with each other.
Preferably, the sub-portions corresponding to the sub-electrodes in the same row are distributed in parallel with each other.
Preferably, the extension lengths of the sensing lines above the common electrode and in the plane of the third metal layer are the same.
According to another aspect of the present invention, there is provided a touch display device including: the touch array substrate is described above; the color film substrate is arranged opposite to the array substrate; the liquid crystal layer is positioned between the color film substrate and the array substrate; and the touch detection unit is connected with the plurality of induction lines to receive the touch induction signals.
According to another aspect of the present invention, a method for manufacturing a touch array substrate is provided, including: forming a thin film transistor on a substrate; forming a pixel electrode electrically connected to a drain electrode of the thin film transistor; forming a common electrode, forming a capacitor with the pixel electrode, and providing a touch sensing signal; forming a plurality of scanning lines connected with the grid electrode of the thin film transistor by using a first metal layer; forming a plurality of data lines connected to the source electrodes of the thin film transistors using a second metal layer; forming a plurality of induction lines electrically connected with the common electrode by using a third metal layer, wherein the plurality of induction lines respectively transmit corresponding touch induction signals; and forming an isolation layer, wherein the isolation layer is positioned between the second metal layer and the third metal layer to electrically isolate the second metal layer from the third metal layer, and the extension direction of the plurality of induction lines in the plane of the third metal layer is not parallel to the extension direction of the plurality of data lines in the plane of the second metal layer.
According to the touch array substrate, the manufacturing method and the liquid crystal display device provided by the invention, the isolation layer is arranged between the second metal layer and the third metal layer to electrically isolate the second metal layer from the third metal layer, and the extension direction of the plurality of induction lines in the plane of the third metal layer is not parallel to the extension direction of the plurality of data lines in the plane of the second metal layer, so that the parasitic capacitance between the induction lines and the data lines is reduced, and the coupling effect of the data lines on the induction lines is reduced. Furthermore, the distance between the sensing line and the data line is increased, which is beneficial to improving the transmittance of the display panel.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
FIG. 1 shows a schematic plan view of a touch array substrate according to the prior art;
FIG. 2 is a schematic diagram illustrating a structure of a pixel unit on a touch array substrate according to the prior art;
FIG. 3 illustrates a cross-sectional view of a pixel cell on a touch array substrate according to the prior art;
FIG. 4 is a schematic plan view of a touch array substrate according to an embodiment of the invention;
FIG. 5 is a schematic structural diagram of a pixel unit on a touch array substrate according to an embodiment of the invention;
fig. 6a to 6g are cross-sectional views illustrating stages of a method of manufacturing a touch array substrate according to an embodiment of the present invention.
The reference numbers are as follows:
101 substrate
110 grid
111 source electrode
112 drain electrode
121 first insulating layer
122 second insulating layer
123 third insulating layer
124 spacer layer
131 first channel layer
132 second channel layer
140 induction line
141 data line
142 scan line
143 through hole
150 common electrode
160 pixel electrode
170 touch control driving integrated chip
Detailed Description
The invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by like reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale. Moreover, certain well-known elements may not be shown in the figures.
In the following description, numerous specific details of the invention, such as structure, materials, dimensions, processing techniques and techniques of components, are set forth in order to provide a more thorough understanding of the invention. However, as will be understood by those skilled in the art, the present invention may be practiced without these specific details.
It will be understood that when a layer, region or layer is referred to as being "on" or "over" another layer, region or layer in describing the structure of the component, it can be directly on the other layer, region or layer or intervening layers or regions may also be present. Also, if the component is turned over, one layer or region may be "under" or "beneath" another layer or region.
The following detailed description of embodiments of the present invention is provided in connection with the accompanying drawings and examples.
Fig. 4 is a schematic plan view illustrating a touch array substrate according to an embodiment of the present invention, and as shown in fig. 4, a common electrode layer and a sensing line layer are disposed on the touch array substrate, wherein the common electrode layer includes a plurality of common electrodes 150 arranged in an array and insulated from each other, the sensing line layer includes a plurality of sensing lines 140 insulated from each other, and the plurality of sensing lines 140 and the plurality of common electrodes 150 are respectively electrically connected in a one-to-one correspondence. Specifically, an insulating layer is disposed between the common electrode layer and the sensing line layer, a via hole 143 is disposed in the insulating layer at a position corresponding to each common electrode 150, one end of each sensing line 140 in the sensing line layer is electrically connected to one corresponding common electrode 150 through the via hole 143, and the other end of each sensing line 140 in the sensing line layer is electrically connected to the touch driving integrated chip 170. The common electrode 150 includes a plurality of sub-electrodes arranged in m rows and n columns and electrically isolated from each other, each of the sub-electrodes is respectively connected to a corresponding sensing line 140 through at least one electrical connection structure, wherein m of the sub-electrodes in each column are respectively electrically connected to m adjacent sensing lines 140, where m and n are non-zero natural numbers.
In this embodiment, the sensing lines 140 extend in a zigzag shape in the column direction of the plurality of sub-electrodes, each sensing line 140 includes m linear sub-portions connected in series, and an acute angle, a right angle, or an obtuse angle is formed between two adjacent sub-portions in each sensing line.
The parasitic capacitance between the sensing line 140 and the data line 141 can be reduced, so that the coupling effect of the data line 141 to the sensing line 140 is reduced, and the distance between the sensing line 140 and the data line 141 is increased, which is beneficial to improving the transmittance of the panel.
Fig. 5 shows a schematic structural diagram of a pixel unit on a touch array substrate according to an embodiment of the present invention, and as shown in fig. 5, a plurality of pixel units defined by intersecting and insulating scan lines 142 and data lines 141 are further disposed on the array substrate, and a pixel electrode 160 and a thin film transistor are disposed in each pixel unit. Fig. 5 shows that each sensing line 140 of the sensing line layer is arranged in a zigzag manner, the data lines 141 are arranged in a straight line, and the sensing lines 140 are not parallel to the data lines 141, so that the parasitic capacitance can be reduced, and the coupling effect of the data lines 141 on the sensing lines 140 can be reduced.
Fig. 6a to 6g are cross-sectional views illustrating stages of a method of manufacturing a touch array substrate according to an embodiment of the present invention. The cross-sectional view is taken along line AA' in fig. 5.
The method starts with a structure in which a gate electrode 110 has been formed on a substrate 101, as shown in fig. 6 a. In this step, a gate thin film and a first metal layer including a plurality of scan lines (see fig. 5) and an extraction electrode of the gate electrode 110 are formed on the substrate 101, wherein each scan line is electrically connected to a corresponding gate electrode 110, and the gate electrode 110 may be independently disposed or may be a part of the scan line.
The gate electrode 110 is, for example, polysilicon, the first metal layer may be made of a metal with a low resistivity, such as Mo, Al, Au, Ag, Cu, or an alloy containing any of these metals, or other composite film layers, and the first metal layer is etched by using a first photo-masking process to form the gate electrode 110 and a scan line, where the gate electrode 110 is connected to the scan line or the gate electrode 110 is a part of the scan line.
Further, a first insulating layer 121 is formed to cover the surface of the substrate 101 and the gate electrode 110, and a first channel layer 131 and a second channel layer 132 are formed on the surface of the first insulating layer 121, as shown in fig. 6 b.
A first channel layer thin film and a second channel layer thin film are formed on the surfaces of the substrate 101 and the gate electrode 110 exposed to the air, and the first channel layer thin film and the second channel layer thin film are etched using a second photo-masking process to form a first channel layer 131 and a second channel layer 132. The first channel layer 131 is, for example, an amorphous silicon (a-Si) semiconductor layer, the second channel layer 132 is, for example, an n-type polysilicon layer, and the first insulating layer 121 is, for example, an inorganic insulating material, for example, made of silicon oxide, silicon nitride, silicon oxynitride, or the like, but is not limited thereto.
Further, a source electrode 112 and a drain electrode 111 are formed to cover the surface of the first insulating layer 121, as shown in fig. 6 c.
In this step, source and drain thin films and a second metal layer including a plurality of data lines and extraction electrodes of the source electrode 112 and the drain electrode 111 (see fig. 5) are formed, the source electrode 112 and the drain electrode 111 are respectively connected in contact with both ends of the second channel layer 132, each data line is connected to a corresponding source electrode 112, and each source electrode 112, the drain electrode 111, and the gate electrode 110 are correspondingly formed into one thin film transistor.
In this step, a doped semiconductor thin film and a second metal layer are deposited on the first insulating layer 121, and the second metal layer is etched by using a third photo-masking process to form a source electrode 112, a drain electrode 111, and a plurality of data lines, wherein the source electrode 112 and the drain electrode 11 are respectively connected to two ends of the second channel layer 132 in a contact manner, and the data lines are connected to the source electrode 112. The source electrode 112 and the drain electrode 111 are, for example, N-doped polysilicon, and the second metal layer may be made of a metal with a low resistivity, such as Mo, Al, Au, Ag, Cu, or an alloy containing any of these metals, or other composite film layers.
Further, an isolation layer 124 is formed to cover the surface of the first insulating layer 121, and an inductive line 140 is formed on the surface of the isolation layer 124, as shown in fig. 6 d.
The sensing lines 140 are arranged in a zigzag manner (see fig. 4), and the extension length of each sensing line 140 in the plane of the third metal layer is the same. Under the isolation effect of the isolation layer 124, the sensing lines 140 and the source electrodes 111 are distributed at different levels, and the data lines are led out from the source electrodes 111. Therefore, the structure can reduce the parasitic capacitance between the sensing line 140 and the data line, thereby reducing the coupling effect of the data line to the sensing line 140, and the distance between the sensing line 140 and the data line becomes far, which is beneficial to improving the transmittance of the panel.
In this step, an isolation layer 124 is formed on the surface of the first insulating layer 121, a third metal layer is formed on the surface of the isolation layer 124, and the third metal layer is etched by using a fourth photo-masking process to form the sensing lines 140. The isolation layer 124 is, for example, an inorganic insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, etc., but is not limited thereto.
Further, a second insulating layer 122 is formed to cover the surface of the second metal layer and the sensing line 140, and a common electrode 150 is formed to cover the surface of the second insulating layer 122, as shown in fig. 6 e.
In this step, a second insulating layer 122 covering the surfaces of the second metal layer and the sensing lines 140 is formed, a first transparent conductive layer is deposited on the second insulating layer 122, the first transparent conductive layer is etched by using a fifth photomask process to form a common electrode 150, the common electrode 150 includes a plurality of common electrode blocks arranged in an array and insulated from each other, the second insulating layer 122 is exposed between the plurality of common electrode blocks, and the second insulating layer 122 is exposed at a position where each common electrode block is connected to the corresponding sensing line 140, the first transparent conductive layer is made of, but not limited to, a transparent conductive material such as Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO).
Further, a third insulating layer 123 is formed to cover the surface of the common electrode 150, as shown in fig. 6 f.
The third insulating layer 123 covers each common electrode block and the position where the second insulating layer 122 is exposed, and the third insulating layer 123 is etched by using a sixth photo-masking process to form an opening, which is disposed at a position corresponding to the drain electrode 111. The third insulating layer 123 is, for example, an inorganic insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, or the like, but is not limited thereto.
Further, a second transparent conductive layer is formed on the surface of the third insulating layer 123, as shown in fig. 6 g.
The seventh photo-masking process is used to etch the second transparent conductive layer to form the pixel electrode 160, and the pixel electrode 181 is filled in the opening and electrically connected to the drain 111. The second transparent conductive layer is made of a transparent conductive material such as Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO), but not limited thereto.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
While embodiments in accordance with the invention have been described above, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The invention is limited only by the claims and their full scope and equivalents.
Claims (10)
1. A touch array substrate, comprising:
a substrate;
a thin film transistor on the substrate;
a pixel electrode electrically connected to a drain electrode of the thin film transistor;
the common electrode and the pixel electrode form a capacitor and provide a touch sensing signal;
a first metal layer forming a plurality of scan lines connected to a gate electrode of the thin film transistor;
a second metal layer forming a plurality of data lines connected to the source electrodes of the thin film transistors;
a third metal layer forming a plurality of sensing lines electrically connected to the common electrode, the plurality of sensing lines transmitting the corresponding touch sensing signals, respectively;
an isolation layer between the second metal layer and the third metal layer to electrically isolate the second metal layer from the third metal layer,
the extending direction of the plurality of sensing lines in the plane of the third metal layer and the extending direction of the plurality of data lines in the plane of the second metal layer are not parallel to each other, and the plurality of sensing lines are distributed in a broken line shape.
2. The touch array substrate of claim 1, wherein the common electrode comprises a plurality of sub-electrodes arranged in m rows and n columns and electrically isolated from each other, each sub-electrode is connected to a corresponding sensing line through at least one electrical connection structure,
and m sub-electrodes in each column of sub-electrodes are respectively and electrically connected with m adjacent induction lines, wherein m and n are non-zero natural numbers.
3. The touch array substrate of claim 2, wherein each of the sensing lines extends in a zigzag shape in a column direction of the sub-electrodes.
4. The touch array substrate of claim 3, wherein each of the sensing lines comprises m linear sub-portions connected in sequence, and an acute angle, a right angle or an obtuse angle is formed between two adjacent sub-portions in each of the sensing lines.
5. The touch array substrate of claim 4, wherein a projection of each of the sub-portions in a plane of the second metal layer intersects the plurality of data lines.
6. The touch array substrate of claim 4, wherein the sub-portions above the same sub-electrode are parallel to each other.
7. The touch array substrate of claim 4, wherein the sub-portions corresponding to the sub-electrodes in the same row are parallel to each other.
8. The touch array substrate of claim 1, wherein the extension lengths of the sensing lines above the common electrode and in the plane of the third metal layer are the same.
9. A touch display device, comprising:
the touch array substrate of any of claims 1-8;
the color film substrate is arranged opposite to the array substrate;
the liquid crystal layer is positioned between the color film substrate and the array substrate; and
and the touch detection unit is connected with the plurality of induction lines to receive the touch induction signals.
10. A method for manufacturing a touch array substrate is characterized by comprising the following steps:
forming a thin film transistor on a substrate;
forming a pixel electrode electrically connected to a drain electrode of the thin film transistor;
forming a common electrode, forming a capacitor with the pixel electrode, and providing a touch sensing signal;
forming a plurality of scanning lines connected with the grid electrode of the thin film transistor by using a first metal layer;
forming a plurality of data lines connected to the source electrodes of the thin film transistors using a second metal layer;
forming a plurality of induction lines electrically connected with the common electrode by using a third metal layer, wherein the plurality of induction lines respectively transmit corresponding touch induction signals;
forming an isolation layer between the second metal layer and a third metal layer to electrically isolate the second metal layer from the third metal layer,
the extending direction of the plurality of sensing lines in the plane of the third metal layer and the extending direction of the plurality of data lines in the plane of the second metal layer are not parallel to each other, and the plurality of sensing lines are distributed in a broken line shape.
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