CN109712872B

CN109712872B - Method for enhancing ion implantation photoetching process window of semiconductor device

Info

Publication number: CN109712872B
Application number: CN201811632069.0A
Authority: CN
Inventors: 李润领; 张彦伟; 孟晓莹
Original assignee: Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Current assignee: Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Priority date: 2018-12-29
Filing date: 2018-12-29
Publication date: 2021-02-02
Anticipated expiration: 2038-12-29
Also published as: CN109712872A

Abstract

The invention relates to a method for enhancing an ion implantation photoetching process window of a semiconductor device, which relates to the manufacturing technology of a semiconductor integrated circuit, and comprises the steps of firstly adopting compound gas or mixed gas containing nitrogen element (N) and hydrogen element (H) to carry out surface treatment on the semiconductor device, and then carrying out photoetching process, wherein when the compound gas or mixed gas containing nitrogen element (N) and hydrogen element (H) is adopted to carry out surface treatment on the semiconductor device, the surface treatment time is 5-120S, and the plasma temperature of the compound gas or mixed gas containing nitrogen element (N) and hydrogen element (H) is 100-1000 ℃, so that the problem of corner cut (Underrcut) at the bottom of a Photoresist (PR) is solved, the ion implantation photoetching process window is enhanced, and the device performance is optimized.

Description

Method for enhancing ion implantation photoetching process window of semiconductor device

Technical Field

The present invention relates to semiconductor integrated circuit manufacturing technology, and more particularly, to a method for enhancing an ion implantation lithography process window of a semiconductor device.

Background

In the semiconductor integrated circuit manufacturing technology, a gate side wall usually adopts a silicon nitride material, a Photoresist (PR) is commonly used in a photoetching process (such as a photoetching process before an ion implantation process) in the semiconductor integrated circuit manufacturing process, however, the Photoresist (PR) is sensitive to a material containing nitrogen, and the Photoresist (PR) is easy to denature to generate a tailing phenomenon, the existing process usually achieves the purpose of solving the tailing phenomenon through oxygen (O2) treatment before photoetching, and the problem of bottom unfilled corner (underrout) of the Photoresist (PR) is easy to generate due to different light reflectivity of an Active Area (AA) and a shallow trench isolation area (STI).

Specifically, referring to fig. 1, fig. 2 and fig. 3, fig. 1 is a schematic structural diagram of a semiconductor device before a photolithography process, fig. 2 is a schematic processing diagram of a conventional O2 before the photolithography process, and fig. 3 is a schematic diagram of a corner defect generated after the photolithography process. As shown in fig. 1, a shallow trench isolation region, a well implantation region, and a gate structure formed by a polysilicon gate and a gate sidewall are included on a wafer substrate, wherein the gate sidewall is usually made of a silicon nitride material. As shown in fig. 2, in order to avoid the tailing (Footing) phenomenon caused by the Photoresist (PR) denaturation, it is usually processed by O2 before the photolithography process. As shown in fig. 3, after the photolithography process, the bottom of the Photoresist (PR) has a corner defect (Undercut) problem, such as corner defect 100.

With the development of semiconductor integrated circuit technology, such as at the 28 nm and below technology node, the above Photoresist (PR) Undercut problem becomes non-negligible because it directly affects the regions defined by the subsequent ion implantation (such as LDD/Halo ion implantation and S/D ion implantation), affects the ion implantation lithography process window, and thus the device performance. While the use of increased anti-reflective coatings (BARC) in more advanced 14 nm FinFET technology may solve Photoresist (PR) topography problems, it also increases process cost and complexity.

Therefore, on the premise of not increasing the cost and the process complexity, the problem of Undercut (underrout) at the bottom of the Photoresist (PR) is solved, and the problem of enhancing the ion implantation lithography process window becomes the industry problem.

Disclosure of Invention

One objective of the present invention is to provide a method for enhancing an ion implantation lithography process window of a semiconductor device, comprising: firstly, carrying out surface treatment on a semiconductor device by adopting compound gas or mixed gas containing nitrogen element (N) and hydrogen element (H), and then carrying out photoetching process, wherein when the surface treatment is carried out on the semiconductor device by adopting the compound gas or mixed gas containing nitrogen element (N) and hydrogen element (H), the surface treatment time is 5-120S, and the plasma temperature of the compound gas or mixed gas containing nitrogen element (N) and hydrogen element (H) is 100-1000 ℃.

Furthermore, the semiconductor device comprises a gate structure, wherein the gate structure comprises a gate side wall, and the gate side wall is made of silicon nitride materials.

Further, the time from the surface treatment of the compound gas or the mixed gas containing the nitrogen element (N) and the hydrogen element (H) to the photolithography process should be less than 5 hours.

Further, the semiconductor device is a 28 nm technology node and below.

Further, the compound gas or the mixed gas containing the nitrogen element (N) and the hydrogen element (H) is NH3, N2H4, N2H2, a mixture of N2 and H2, or a mixture of N2H2 and H2.

Further, when the surface treatment of the semiconductor device is performed using the compound gas or the mixed gas containing the nitrogen element (N) and the hydrogen element (H), the gas flow rate of the compound gas or the mixed gas containing the nitrogen element (N) and the hydrogen element (H) is 500sccm to 5000 sccm.

According to the embodiment of the invention, the surface treatment of the semiconductor device is carried out by adopting the compound gas or the mixed gas containing the nitrogen element (N) and the hydrogen element (H) before the photoetching process, so that the problem of corner defect (underrout) at the bottom of the Photoresist (PR) is solved, the ion implantation photoetching process window is enhanced, and the device performance is optimized.

Drawings

Fig. 1 is a schematic structural diagram of a semiconductor device before a photolithography process.

Fig. 2 is a schematic diagram of conventional O2 processing prior to a photolithography process.

Fig. 3 is a schematic diagram of a corner defect generated after a photolithography process.

FIG. 4 is a schematic view of a surface treatment performed before a photolithography process according to an embodiment of the present invention.

FIG. 5 is a schematic diagram of a lithographic process according to an embodiment of the invention.

The reference numerals of the main elements in the figures are explained as follows:

200. a gate structure; 210. a polysilicon gate; 220. and a grid side wall.

Detailed Description

The technical solutions in the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.

In an embodiment of the present invention, a method for enhancing an ion implantation lithography process window of a semiconductor device is provided, including: firstly, compound gas or mixed gas containing nitrogen element (N) and hydrogen element (H) is adopted to carry out surface treatment on the semiconductor device, and then photoetching process is carried out.

As an example of performing the surface treatment on the semiconductor device with ammonia gas (NH3), reference may be made to fig. 4 and 5, where fig. 4 is a schematic diagram of performing the surface treatment before the photolithography process according to an embodiment of the present invention, and fig. 5 is a schematic diagram after the photolithography process according to an embodiment of the present invention. As shown in fig. 4, ammonia (NH3) is used to process the surface of the semiconductor device before the photolithography process, and then as shown in fig. 5, after the photolithography process is performed, the divot (underrcut) 100 generated at the bottom of the Photoresist (PR) in the prior art (as shown in fig. 3) disappears, so as to obtain an ideal Photoresist (PR) profile, and further, the areas defined by the photoresist in the subsequent ion implantation (such as LDD/Halo ion implantation and S/D ion implantation) are accurate, thereby enhancing the photolithography process window of ion implantation, and further optimizing the device performance.

The semiconductor device comprises a grid structure, wherein the grid structure comprises a grid side wall, and the grid side wall is made of silicon nitride materials. As shown in fig. 4, the substrate includes a gate structure 200, and the gate structure 200 includes a polysilicon gate 210 and gate sidewalls 220, wherein the gate sidewalls are made of silicon nitride.

In an embodiment of the present invention, the compound gas or the mixed gas containing the nitrogen element (N) and the hydrogen element (H) is a gas that can generate NHx (X ═ 0,1,2) that affects the photoresist morphology under the plasma condition, such as NH3, N2H4, N2H2, a mixture of N2 and H2, a mixture of N2H2 and H2, and the like.

In an embodiment of the invention, when the compound gas or the mixed gas containing the nitrogen element (N) and the hydrogen element (H) is used for surface treatment of the semiconductor device, the gas flow rate of the compound gas or the mixed gas containing the nitrogen element (N) and the hydrogen element (H) is 500sccm to 5000sccm, so as to solve the problem of corner defect (underrout) at the bottom of the Photoresist (PR).

In one embodiment of the present invention, when the compound gas or the mixed gas containing the nitrogen element (N) and the hydrogen element (H) is used for the surface treatment of the semiconductor device, the surface treatment time is 5S to 120S, so as to solve the problem of the bottom corner defect (underrout) of the Photoresist (PR).

In an embodiment of the invention, the time from the surface treatment of the compound gas or the mixed gas containing the nitrogen element (N) and the hydrogen element (H) to the photolithography process should be less than 5 hours to solve the bottom corner defect (underrout) problem of the Photoresist (PR).

In one embodiment of the present invention, when the surface treatment of the semiconductor device is performed using the compound gas or the mixed gas containing the nitrogen element (N) and the hydrogen element (H), the plasma temperature of the compound gas or the mixed gas containing the nitrogen element (N) and the hydrogen element (H) is 100 to 1000 ℃.

Therefore, firstly, the method can improve the patterning distortion and even the failure of the photoetching process and simplify the OPC treatment process. And the fluctuation and even the performance of the device can be improved when the ions with the inclination angle are implanted.

In an embodiment of the present invention, when the surface treatment of the semiconductor device is performed by using the compound gas or the mixed gas containing the nitrogen element (N) and the hydrogen element (H), the plasma temperature of the compound gas or the mixed gas containing the nitrogen element (N) and the hydrogen element (H) is 100 to 1000 ℃ and the surface treatment time is 5 to 120S, so as to solve the problem of the Undercut (underrun) at the bottom of the Photoresist (PR).

In an embodiment of the present invention, the semiconductor device is a 28 nm technology node or below.

Thus, in one embodiment of the invention, the problem of corner chipping (underrout) at the bottom of the Photoresist (PR) is solved, the ion implantation lithography process window is enhanced, and the device performance is optimized by performing surface treatment on the semiconductor device with the compound gas or the mixed gas containing the nitrogen element (N) and the hydrogen element (H) before the lithography process.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for avoiding photoresist bottom corner defect in photoetching process is characterized by comprising the following steps:

providing a semiconductor substrate, wherein the semiconductor substrate comprises an active region and a shallow trench isolation region, a grid structure of a semiconductor device is formed on the active region, the grid structure comprises a grid side wall, and the grid side wall is made of silicon nitride materials;

performing surface treatment on the semiconductor device by using a compound gas or a mixed gas containing nitrogen elements and hydrogen elements, wherein when the surface treatment is performed on the semiconductor device by using the compound gas or the mixed gas containing the nitrogen elements and the hydrogen elements, the surface treatment time is 5S-120S, the plasma temperature of the compound gas or the mixed gas containing the nitrogen elements and the hydrogen elements is 100-1000 ℃, and the compound gas or the mixed gas containing the nitrogen elements and the hydrogen elements generates a gas of NHx influencing the appearance of the photoresist in the surface treatment process, wherein X is 0,1, 2;

coating a photoresist, and carrying out a photoetching process, wherein no corner is formed at the bottom of the photoresist after the photoetching process; and

an ion implantation process is performed.

2. The method of claim 1, wherein the time from the surface treatment of the compound gas or the mixture gas containing nitrogen and hydrogen to the photolithography process is less than 5 hours.

3. The method of claim 1, wherein the semiconductor device is a 28 nm technology node or below.

4. The method of claim 1, wherein the compound gas or mixture gas containing nitrogen and hydrogen is NH3, N2H4, N2H2, a mixture of N2 and H2, or a mixture of N2H2 and H2.

5. The method as claimed in claim 1, wherein the gas flow rate of the compound gas or the mixed gas containing nitrogen and hydrogen is 500sccm to 5000sccm when the surface of the semiconductor device is processed by the compound gas or the mixed gas containing nitrogen and hydrogen.