CN109684208B

CN109684208B - On-line simulation debugging protection method for microprocessor

Info

Publication number: CN109684208B
Application number: CN201811539709.3A
Authority: CN
Inventors: 叶余胜; 张中伟; 梁晓兵
Original assignee: Shanghai Ghrepower Green Energy Co Ltd
Current assignee: Shanghai Ghrepower Green Energy Co Ltd
Priority date: 2018-12-17
Filing date: 2018-12-17
Publication date: 2022-07-15
Anticipated expiration: 2038-12-17
Also published as: CN109684208A

Abstract

The invention relates to an on-line simulation debugging protection method of a microprocessor, which is characterized by comprising the following steps: the method comprises the steps that a microprocessor is connected with the input end of an independent monostable trigger, the output end of the monostable trigger is connected with an IGBT driving circuit, when a program running on the microprocessor runs at full speed, the microprocessor gives a trigger signal to the output end of the monostable trigger at regular time, a timer in the microprocessor is set to be used for a PWM generator function, and a timer II is set to be used for a timer used for a non-PWM generator function. The method provided by the invention solves the problems in the prior art, can be used for carrying out simulation debugging on the microprocessor, and can enter various non-full-speed running modes, such as breaking points, single step execution and other operations, thereby greatly improving the development and debugging efficiency of developers.

Description

On-line simulation debugging protection method for microprocessor

Technical Field

The invention relates to a microprocessor online simulation debugging protection method.

Background

In the grid-connected inverter control technology of the power system, most of various modulation methods are performed by software, so that the simulation debugging of the software in a grid-connected state cannot perform a series of operations such as single step execution, break point and the like, and once the operation is wrong, the problems such as explosion and the like are likely to be caused. Therefore, in order to avoid serious consequences caused by misoperation during simulation, a common developer does not perform simulation debugging on software, so that the code debugging efficiency is influenced.

Disclosure of Invention

The purpose of the invention is: therefore, developers can perform simulation debugging on the microprocessor in a grid-connected state of the power equipment and can enter various non-full-speed operation modes.

In order to achieve the above object, the technical solution of the present invention is to provide an online emulation debugging protection method for a microprocessor, which is characterized by comprising the following steps:

step 1, connecting a microprocessor with an input end of an independent monostable trigger, connecting an output end of the monostable trigger with an IGBT (insulated gate bipolar transistor) driving circuit, and when a program running on the microprocessor runs at full speed, the microprocessor gives a trigger signal to the input end of the monostable trigger at regular time, and a timer in the microprocessor is set to be used for a PWM (pulse-width modulation) generator function, and a timer II is a timer used for a non-PWM generator function;

step 2, when the program running on the microprocessor enters a non-full-speed running state, the step 3 will happen; if the program running on the microprocessor is always running in a full-speed running state or is re-run after the program is interrupted when online simulation debugging is carried out, entering 4; step 3, if the monostable trigger does not receive the trigger signal beyond the set time, the monostable trigger enters a steady state, the monostable trigger outputs a locking signal to the IGBT drive circuit, the IGBT drive circuit enters a reset or locking state after receiving the locking signal, the switch state of the IGBT is locked, and the IGBT enters a stable off-line state;

step 4, obtaining a stored last count value of the second timer, obtaining a current count value of the second timer, calculating a difference value between the last count value and the current count value, if the difference value is within a preset normal range, entering step 5, otherwise, entering step 6;

step 5, updating the previous count value to the current count value, and simultaneously outputting or keeping an enabling signal to an IGBT driving circuit by the monostable trigger, wherein the device is in a normal running state;

and 6, discarding the current count value, wherein the program running on the microprocessor does not generate a PWM waveform before resetting, the monostable trigger enters or maintains a steady state, the monostable trigger outputs or maintains a lock-up signal to the IGBT drive circuit, the IGBT drive circuit enters or maintains a reset or lock-up state after receiving the lock-up signal, and the IGBT drive circuit locks up the switching state of the IGBT so as to enter a stable off-line state.

The method provided by the invention solves the problems in the prior art, can be used for carrying out simulation debugging on the microprocessor in a grid-connected state of the power equipment, can enter various non-full-speed running modes such as breakpoint operation, single-step execution and the like, and greatly improves the development and debugging efficiency of developers.

Drawings

FIG. 1 is a diagram of a system in which the present invention is applied;

FIG. 2 is a flow chart of the present invention;

FIG. 3 is a partial flow diagram of the present invention.

Detailed Description

The invention will be further illustrated with reference to the following specific examples. It should be understood that these examples are for illustrative purposes only and are not intended to limit the scope of the present invention. Further, it should be understood that various changes or modifications of the present invention can be made by those skilled in the art after reading the teaching of the present invention, and these equivalents also fall within the scope of the claims appended to the present application.

Taking a grid-connected inverter system as an example, the on-line simulation debugging protection method of the microprocessor provided by the invention is detailed, and comprises the following steps:

1. confirm that the reset state is a safe state:

when the system is designed, a hardware circuit firstly ensures that key components such as an IGBT (insulated gate bipolar transistor), a grid-connected switch and the like are in a safe off-line state when a processor is in a reset state. Namely, the upper bridge arm of the IGBT is high or low (the lower bridge arm is low or high at the same time), the grid-connected contactor is in a disconnected state, the uncontrollable state is avoided, and the basic requirement of all mature grid-connected systems is met.

2. Confirm the state of the timer in emulation mode:

most emulation software, the timer is continuously counting in the single step, breakpoint halt state in the emulation environment. For the timer applied to the PWM generator function, defined as timer one in this embodiment, when the program is executed at non-full speed (for example, the breakpoint stop state), the external condition changes in real time (for example, the grid voltage phase, the dc voltage), and the program stops or delays sampling, processing the external analog quantity, the PWM generator still performs the wave generation with the previously set duty cycle, and the protection process is necessary, otherwise, the machine will be exploded (see the operation of step 3). Meanwhile, a timer (defined as timer two in this embodiment) not used for PWM wave transmission should be used as a time reference to determine and apply the second layer protection (see the operation in step 4).

3. The safety of the program under the non-full-speed execution state is ensured, and firstly, the functional design of a hardware circuit is as follows:

as shown in fig. 1, a monostable flip-flop independent of the processor is provided, which can monitor the operation status of the processor by a trigger signal (a signal such as a rising or falling level) at an input terminal, and can output an enable signal (a signal such as a high or low level) to the IGBT driving circuit.

The IGBT driving circuit can enter a reset state according to the enabling signal, the switching state of the IGBT is locked, and the equipment enters a safe off-line state.

With reference to fig. 2, a monostable flip-flop independent of a processor needs the processor to give a rising edge or falling edge trigger signal at a fixed time, if a program runs at a breakpoint of a simulation mode and is not executed at full speed, the retention time exceeds a time period (for example, 2 to 3 switching periods) set by the monostable flip-flop, the monostable flip-flop enters a steady state, and outputs and jumps to a logic level opposite to the monostable flip-flop in an unsteady state to an IGBT driving circuit, the IGBT driving circuit is reset or locked, the switching states of an upper bridge arm and a lower bridge arm of an IGBT switching tube are changed, and the monostable flip-flop enters a stable off-grid state, so as to avoid the explosion of the machine due to power grid desynchronization and other desynchronization problems.

4. The safety of developers in any operation is ensured, and meanwhile, self-locking function design of software is carried out:

when a developer conducts online simulation debugging, a trigger signal for a monostable trigger is prevented from being turned on again in the multiple operation processes of single step execution, break point, full speed operation and the like, so that a condition judgment statement is added before a turn-on code for the monostable trigger signal (which is required to be closely adjacent and not interrupted by other interrupts), whether a time interval between the time interval and the last wave sending is within an error range is judged, if the time interval is within the error range, a watchdog trigger signal can be given, otherwise, the time interval is considered to be in a desynchronizing state of a simulation mode, the watchdog trigger signal is not given, and the specific flow is shown in fig. 3.

For example, one system is a 10k switching cycle, where the processor hardware updates the register data to change the duty of the issued waveform every 100us of underflow or overflow interrupts during normal operation. After the data processing counting is completed every time in the program, the register cache is updated in a time period before the register data is updated next time, and the trigger signal of the monostable trigger is sent out again. According to discrete statistics of program running time, if the error of the time period is within 10us, the resolution of a 32-bit timer II is set to be 1us, the counting interval is judged when a monostable trigger signal is given every time, if the counting interval is within the range of 90-110, the trigger signal is normally sent out, if the counting interval is out of the range, the trigger signal is not given any more, the monostable trigger is forcibly closed, the read value of the 32-bit timer is not updated, and the trigger signal is prevented from being given out again when the next judgment is carried out. And under the condition that the processor is not reset, the misjudgment can not be generated within 17.8 hours. Therefore, the counting judgment of other timers is added, and the situation that the machine is fried due to the fact that the PWM wave is sent out again is ensured.

Claims

1. An on-line simulation debugging protection method of a microprocessor is characterized by comprising the following steps:

step 2, when the program running on the microprocessor enters a non-full-speed running state, the step 3 will happen; if the program running on the microprocessor is always running in a full-speed running state or is re-run after the program is interrupted when the online simulation debugging is carried out, entering the step 4; step 3, if the monostable trigger does not receive a trigger signal beyond the set time, the monostable trigger enters a steady state, the monostable trigger outputs a locking signal to the IGBT drive circuit, the IGBT drive circuit enters a reset or locking state after receiving the locking signal, the switching state of the IGBT is locked, and the IGBT enters a stable off-line state;

and 6, discarding the current count value, wherein the program running on the microprocessor does not generate a PWM waveform before resetting, the monostable trigger enters or maintains a steady state, the monostable trigger outputs a locking signal to the IGBT drive circuit or the monostable trigger maintains the locking signal to the IGBT drive circuit, the IGBT drive circuit enters a locking state or the IGBT drive circuit maintains the locking state after receiving the locking signal, and the switching state of the IGBT is locked, so that the IGBT enters a stable off-line state.