CN109673099A - Multilayer wiring structure and preparation method thereof - Google Patents
Multilayer wiring structure and preparation method thereof Download PDFInfo
- Publication number
- CN109673099A CN109673099A CN201710950291.4A CN201710950291A CN109673099A CN 109673099 A CN109673099 A CN 109673099A CN 201710950291 A CN201710950291 A CN 201710950291A CN 109673099 A CN109673099 A CN 109673099A
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- blind hole
- conductive
- layer
- dielectric layer
- line
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09509—Blind vias, i.e. vias having one side closed
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
A kind of multilayer wiring structure, including core layer, first line structure, the second line construction and build-up circuit structure.First line structure and the second line construction are respectively arranged at opposite two surfaces of core layer.Build-up circuit structure includes the first dielectric layer being set in first line structure, multiple first conductive blind holes, the second dielectric layer being set on the first dielectric layer, multiple second conductive blind holes and the patterned line layer being set on the second dielectric layer.These first conductive blind holes run through the first dielectric layer, and first line structure in electrical contact.These second conductive blind holes run through the second dielectric layer, and these first conductive blind holes in electrical contact respectively.Patterned line layer these second conductive blind holes in electrical contact.Separately propose a kind of production method of multilayer wiring structure.
Description
Technical field
The present invention relates to a kind of line construction and preparation method thereof more particularly to a kind of multilayer wiring structure and its production sides
Method.
Background technique
With the development of printed circuit board (PCB) manufacturing technology, to enable printed circuit board to hold in limited area
More electronic components are carried, the spacing between the line width and route of the route on printed circuit board reduces increasingly.
Currently, the making step of the route on printed circuit board is mostly as follows: in forming seed layer on dielectric layer；Then,
Part photoresist layer (i.e. by way of exposure development pattern is removed in forming photoresist layer in seed layer, and according to the layout of route
Change photoresist layer), to expose the seed layer of specific region；Then, it leads in being exposed in the seed layer outside photoresist layer plating and formed
Electric layer；Photoresist layer is finally removed, just can make to obtain route.If it will cause subsequent however, the flatness of dielectric layer is bad
Spacing variation between the line width and route of prepared route is excessive, or even generates short circuit.
Summary of the invention
The present invention provides a kind of multilayer wiring structure, has good reliability.
The present invention provides a kind of production method of multilayer wiring structure, helps to improve process rate.
Multilayer wiring structure of the invention includes core layer, first line structure, the second line construction and build-up circuit
Structure.Core layer has opposite first surface and second surface.First line structure setting is on first surface.Second route
Structure setting is electrically connected first line structure on second surface.Build-up circuit structure includes the first dielectric layer, Duo Ge
One conductive blind hole, the second dielectric layer, multiple second conductive blind holes and patterned line layer.First dielectric layer is set to First Line
On line structure.These first conductive blind holes run through the first dielectric layer, and first line structure in electrical contact.The setting of second dielectric layer
In on the first dielectric layer.These second conductive blind holes run through the second dielectric layer, and these first conductive blind holes in electrical contact respectively.
Patterned line layer is set on the second dielectric layer, and these second conductive blind holes in electrical contact.
In one embodiment of this invention, first conductive blind hole of each above-mentioned is opposite with corresponding second conductive blind hole
It is quasi-.
In one embodiment of this invention, the maximum outside diameter of second conductive blind hole of each above-mentioned is less than corresponding first
The maximum outside diameter of conductive blind hole.
In one embodiment of this invention, corresponding first conduction of the bottom surface contact of second conductive blind hole of each above-mentioned
The top surface of blind hole, and the area of the bottom surface of each the second conductive blind hole is less than the face of the top surface of corresponding first conductive blind hole
Product.
In one embodiment of this invention, above-mentioned multilayer wiring structure further includes multiple conductive through holes.These conductions are passed through
Core layer is run through in hole, to be electrically connected first line structure and the second line construction.
The production method of multilayer wiring structure of the invention is the following steps are included: be respectively formed first line structure and second
Line construction is in opposite two surfaces of core layer, and first line structure is electrically connected to each other with the second line construction；Form the
One dielectric layer is in first line structure；Multiple first conductive blind holes are formed in the first dielectric layer, and make these the first conductions
Blind hole first line structure in electrical contact；The second dielectric layer is formed on the first dielectric layer；Formed multiple second conductive blind holes in
In second dielectric layer, and these second conductive blind holes is made to distinguish these first conductive blind holes in electrical contact；And form patterning
Line layer makes into patterned line layer these second conductive blind holes in electrical contact on the second dielectric layer.
In one embodiment of this invention, the production method of above-mentioned multilayer wiring structure further include: patterning first is situated between
Electric layer, to form multiple first blind holes, and these first blind holes expose first line structure；The first conductive layer is formed in first
On dielectric layer, and the first conductive layer is made to fill up these first blind holes further to contact first line structure；And pass through brushing
Mode remove the first conductive layer on the first dielectric layer, and remove part of first dielectric layer, wherein be located at these first
The first conductive layer in blind hole forms these the first conductive blind holes.
In one embodiment of this invention, the production method of above-mentioned multilayer wiring structure further include: patterning second is situated between
Electric layer, to form multiple second blind holes, wherein these second blind holes are aligned with these the first conductive blind holes, and expose respectively
These first conductive blind holes out；Photoresist layer is formed on the second dielectric layer；Pattern photoresist layer, with formed multiple third blind holes with
Multiple 4th blind holes, wherein these the 4th blind holes are aligned with these the second blind holes, and expose these the second blind holes respectively；
The second conductive layer is formed in these third blind holes and these the 4th blind holes, and is made be located in these the 4th blind holes second conductive
Layer fills up these second blind holes further to contact these the first conductive blind holes；Photoresist layer is removed, wherein it is second blind to be located at these
The second conductive layer in hole forms these the second conductive blind holes, and the second conductive layer being located on the second dielectric layer forms patterning
Line layer.
In one embodiment of this invention, the production method of above-mentioned multilayer wiring structure further include: be respectively formed
Before opposite two surfaces of core layer, the multiple conductions formed through core layer are passed through for one line construction and the second line construction
Hole, to be electrically connected first line structure and the second line construction.
Production method based on above-mentioned, of the invention multilayer wiring structure is to form second on the first smooth dielectric layer
Dielectric layer, therefore the second dielectric layer can also have good flatness.Also therefore, must make to be subsequently formed in the line on the second dielectric layer
Road will not generate the case where skew, distortion or other deformations, can not only meet the demand of narrow linewidth and thin space, also be avoided that production
Raw short circuit.In other words, the production method of multilayer wiring structure of the invention helps to improve process rate, and makes resulting more
Layer line line structure can have good reliability.
To make the foregoing features and advantages of the present invention clearer and more comprehensible, special embodiment below, and it is detailed to cooperate attached drawing to make
Carefully it is described as follows.
Detailed description of the invention
Fig. 1 to Fig. 9 is the diagrammatic cross-section of the production process of the multilayer wiring structure of one embodiment of the invention.
Symbol description
100: multilayer wiring structure；
101: build-up circuit structure；
110: Double-side line structure；
111: core layer；
111a: first surface；
111b: second surface；
112: first line structure；
113: the second line constructions；
114: conductive through hole；
120: the first dielectric layers；
121: the first blind holes；
130,150: seed layer；
131: the first conductive layers；
132: the first conductive blind holes；
132a: top surface；
140: the second dielectric layers；
141: the second blind holes；
151: the second conductive layers；
152: the second conductive blind holes；
152a: bottom surface；
153: patterned line layer；
160: photoresist layer；
161: third blind hole；
162: the four blind holes；
D1, D2: maximum outside diameter.
Specific embodiment
Fig. 1 to Fig. 9 is the diagrammatic cross-section of the production process of the multilayer wiring structure of one embodiment of the invention.It please refer to
Fig. 1 provides Double-side line structure 110, wherein Double-side line structure 110 include core layer 111, first line structure 112 and
Second line construction 113, and the layer of the line layer of the number of plies of the line layer of first line structure 112 and the second line construction 113
Number is at least two layers respectively.Core layer 111 has opposite first surface 111a and second surface 111b, wherein first line knot
Structure 112 is set on first surface 111a, and the second line construction 113 is set on second surface 111b.Furthermore, double
Upper thread line structure 110 further includes multiple conductive through holes 114, these conductive through holes 114 are through (or the perforation first of core layer 111
Surface 111a and second surface 111b), to be electrically connected first line structure 112 and the second line construction 113.
For the making step of Double-side line structure 110, firstly, providing core layer 111, and is formed and run through core layer
111 multiple conductive through holes 114.Then, first line structure 112 is formed on first surface 111a, and first line structure
Wherein one end of the line layer being connected in 112 with first surface 111a these conductive through holes 114 in electrical contact.On the other hand,
The second line construction 113 is formed on second surface 111b, and be connected in the second line construction 113 with second surface 111b
The other end of line layer these conductive through holes 114 in electrical contact.That is, the configuration of these conductive through holes 114 is electrically to connect
Connect first line structure 112 and the second line construction 113.
Then, referring to FIG. 2, forming the first dielectric layer 120 in first line structure 112, and the first dielectric layer 120 with
Core layer 111 is located at the opposite sides of first line structure 112.Then, referring to FIG. 3, passing through laser opening (Laser
Drill) or the modes such as electric paste etching (Plasma etching) pattern the first dielectric layer 120, to form multiple first blind holes
121, and these first blind holes 121 expose first line structure 112.Then, referring to FIG. 4, passing through the side such as sputter or deposition
Formula forms seed layer 130 on the first dielectric layer 120 and in these first blind holes 121, and is located in these first blind holes 121
Seed layer 130 contacts first line structure 112.Seed layer 130 is thin layer, therefore the seed layer being located in these first blind holes 121
130 do not fill up these first blind holes 121.Then, the first conductive layer 131 is formed by way of plating in the first dielectric layer
On 120, and the first conductive layer 131 is made to fill up these first blind holes 121 further to contact first line structure 112.Further
For, the plating of the first conductive layer 131 is formed in seed layer 130, and the first conductive layer in these first blind holes 121
131 contact first line structure 112 by seed layer 130.
Then, it is led referring to FIG. 5, removing be located on the first dielectric layer 120 first by brushing or other leveling fashions
Electric layer 131 and seed layer 130, and part of first dielectric layer 120 is removed, so that being exposed to outer surface in the first dielectric layer 120
With good flatness.Therefore, the thickness of the first dielectric layer 120 in Fig. 5 is thinner than the thickness of the first dielectric layer 120 in Fig. 4
Degree.On the other hand, in these first blind holes 121 and the first conductive layer 131 for being not removed formed with seed layer 130 it is multiple
First conductive blind hole 132.So far, it is completed to form multiple first conductive blind holes 132 in the first dielectric layer 120, and makes these
The making step of the first line structure 112 in electrical contact of first conductive blind hole 132.
Then, referring to FIG. 6, forming the second dielectric layer 140 on the first dielectric layer 120, because in the first dielectric layer 120 cruelly
Being exposed to outer surface has good flatness, and the second dielectric layer 140 being formed on the first dielectric layer 120 can also have well
Flatness, so can avoid being subsequently formed and generate feelings of skew, distortion or other deformations in the route on the second dielectric layer 140
Condition, can not only meet the demand of narrow linewidth and thin space, also be avoided that generation short circuit.Then, it is lost by laser opening or plasma-based
The modes such as quarter pattern the second dielectric layer 140, and to form multiple second blind holes 141, these second blind holes 141 are aligned with this
A little first conductive blind holes 132, and these the first conductive blind holes 132 are exposed respectively.Wherein, each second blind hole 141 is most
Big outer diameter is less than the maximum outside diameter of corresponding first conductive blind hole 132.
Then, referring to FIG. 7, by the modes such as sputter or deposition formed seed layer 150 on the second dielectric layer 140 and
In these second blind holes 141, wherein seed layer 150 is thin layer, therefore the seed layer 150 being located in these second blind holes 141 is not
These second blind holes 141 are filled up.Then, photoresist layer 160 is formed on the second dielectric layer 140, and the side for passing through exposure development
Formula patterns photoresist layer 160, to form multiple third blind holes 161 and multiple 4th blind holes 162.The exposure of these third blind holes 161
The seed layer 150 being located on the second dielectric layer 140 out.These the 4th blind holes 162 are aligned with these the second blind holes 141, and
The seed layer 150 in these the second blind holes 141 is exposed respectively.For example, the aperture of these the 4th blind holes 162 can be
It is isometrical, and the aperture of each the 4th blind hole 162 can be greater than or equal to the maximum outside diameter of corresponding second blind hole 141.
Then, referring to FIG. 8, forming the second conductive layer 151 by way of plating in these third blind holes 161 and every
In one group of the 4th blind hole 162 and the second blind hole 141 aligned, wherein these third blind holes 161 are filled out by the second conductive layer 151
It is full, and each group of the 4th blind hole 162 aligned is filled up with the second blind hole 141 by the second conductive layer 151.Positioned at these thirds
The second conductive layer 151 in blind hole 161 contacts the second dielectric layer 140 by seed layer 150, and be located at each group align the
Four blind holes 162 contact these the first conductive blind holes 132 by seed layer 150 with the second conductive layer 151 in the second blind hole 141.
Finally, referring to FIG. 9, photoresist layer 160 and the seed layer 150 that is covered by photoresist layer 160 are removed, wherein being located at this
The second conductive layer 151 in a little second blind holes 141 forms multiple second conductive blind holes 152 with seed layer 150, and is located at second and is situated between
The second conductive layer 151 in electric layer 140 forms patterned line layer 153 with seed layer 150.So far, it is completed to form multiple
Two conductive blind holes 152 make these second conductive blind holes 152 in electrical contact these first are led respectively in the second dielectric layer 140
The making step of electric blind hole 132, and patterned line layer 153 is formed on the second dielectric layer 140, and makes patterned line layer
The making step of 153 these the second conductive blind holes 152 in electrical contact.
Because the multilayer wiring structure 100 of the present embodiment is in manufacturing process, especially when forming build-up circuit structure 101
To the movement that the first dielectric layer 120 is flattened, therefore can make to be subsequently formed in the second dielectric layer 140 on the first dielectric layer 120
With good flatness, also therefore, must make to be subsequently formed will not be produced in the patterned line layer 153 on the second dielectric layer 140
The case where raw skew, distortion or other deformations, the demand of narrow linewidth and thin space can not only be met, also be avoided that generation short circuit.
In other words, the production method of multilayer wiring structure 100 of the invention helps to improve process rate, and makes resulting multilayer wire
Line structure 100 can have good reliability.
Referring to FIG. 9, in the present embodiment, build-up circuit structure 101 includes the first dielectric layer 120, multiple first conductions
Blind hole 132, the second dielectric layer 140, multiple second conductive blind holes 152 and patterned line layer 153, wherein the first dielectric layer
120 are set in first line structure 112.These first conductive blind holes 132 run through the first dielectric layer 120, and in electrical contact the
One line construction 112.Second dielectric layer 140 is set on the first dielectric layer 120, and wherein these second conductive blind holes 152 run through
Second dielectric layer 140, and these first conductive blind holes 132 in electrical contact respectively.Patterned line layer 153 is set to the second dielectric
On layer 140, and these second conductive blind holes 152 in electrical contact.
Furthermore, each first conductive blind hole 132 is aligned with corresponding second conductive blind hole 152, and each
The maximum outside diameter D1 of a second conductive blind hole 152 is less than the maximum outside diameter D2 of corresponding first conductive blind hole 132.On the other hand,
The bottom surface 152a of each the second conductive blind hole 152 contacts the top surface 132a of corresponding first conductive blind hole 132, and each
The area of the bottom surface 152a of two conductive blind holes 152 is less than the area of the top surface 132a of corresponding first conductive blind hole 132.Namely
Say, positioned at the first dielectric layer 120 and the opposite sides of the second dielectric layer 140 route can by each group align first lead
Electric blind hole 132 and the second conductive blind hole 152 are electrically connected.
In conclusion the production method of multilayer wiring structure of the invention removes the first dielectric of part by way of brushing
Layer, so that the first dielectric layer is exposed to outer surface and has good flatness.Then, outer table is exposed in the first dielectric layer
The second dielectric layer is formed on face, therefore the second dielectric layer can also have good flatness.Also therefore, must make to be subsequently formed in second
Route on dielectric layer will not generate the case where skew, distortion or other deformations, can not only meet the need of narrow linewidth and thin space
It asks, is also avoided that generation short circuit.In other words, the production method of multilayer wiring structure of the invention helps to improve process rate,
And the resulting multilayer wiring structure of production can have good reliability.
Although the present invention is disclosed as above with embodiment, however, it is not to limit the invention, any technical field
Middle technical staff, without departing from the spirit and scope of the present invention, when can make a little change and retouching, therefore protection of the invention
Range is subject to view the attached claims institute defender.
Claims (12)
1. a kind of multilayer wiring structure, comprising:
Core layer has opposite first surface and second surface；
First line structure is set on the first surface；
Second line construction is set on the second surface, and is electrically connected the first line structure；And
Build-up circuit structure, comprising:
First dielectric layer is set in the first line structure；
Multiple first conductive blind holes run through first dielectric layer, and the first line structure in electrical contact；
Second dielectric layer is set on first dielectric layer；
Multiple second conductive blind holes run through second dielectric layer, and the multiple first conductive blind hole in electrical contact respectively；With
And
Patterned line layer is set on second dielectric layer, and the multiple second conductive blind hole in electrical contact.
2. multilayer wiring structure according to claim 1, wherein each of the multiple first conductive blind hole with it is corresponding
Second conductive blind hole align.
3. multilayer wiring structure according to claim 1, wherein the maximum of each of the multiple second conductive blind hole
Outer diameter is less than the maximum outside diameter of corresponding first conductive blind hole.
4. multilayer wiring structure according to claim 1, wherein the bottom surface of each of the multiple second conductive blind hole
The top surface of corresponding first conductive blind hole is contacted, and the area of the bottom surface of each of the multiple second conductive blind hole is small
Area in the top surface of corresponding first conductive blind hole.
5. multilayer wiring structure according to claim 1, further includes:
Multiple conductive through holes run through the core layer, to be electrically connected the first line structure and second line construction.
6. a kind of production method of multilayer wiring structure, comprising:
First line structure and the second line construction are respectively formed in two surfaces, and the first line structure relatively of core layer
It is electrically connected to each other with second line construction；
The first dielectric layer is formed in the first line structure；
Multiple first conductive blind holes are formed in first dielectric layer, and make the multiple first conductive blind hole institute in electrical contact
State first line structure；
The second dielectric layer is formed on first dielectric layer；
Multiple second conductive blind holes are formed in second dielectric layer, and are electrically connected with the multiple second conductive blind hole respectively
Touch the multiple first conductive blind hole；And
Patterned line layer is formed on second dielectric layer, and makes the patterned line layer in electrical contact the multiple the
Two conductive blind holes.
7. the production method of multilayer wiring structure according to claim 6, further includes:
First dielectric layer is patterned, to form multiple first blind holes, and the multiple first blind hole exposes described first
Line construction；
The first conductive layer is formed on first dielectric layer, and first conductive layer is made further to fill up the multiple first
Blind hole is to contact the first line structure；And
First conductive layer on first dielectric layer is removed by way of brushing, and removes part described first
Dielectric layer, wherein first conductive layer being located in the multiple first blind hole forms the multiple first conductive blind hole.
8. the production method of multilayer wiring structure according to claim 7, further includes:
Second dielectric layer is patterned, to form multiple second blind holes, wherein the multiple second blind hole is aligned with institute
Multiple first conductive blind holes are stated, and expose the multiple first conductive blind hole respectively；
Photoresist layer is formed on second dielectric layer；
The photoresist layer is patterned, to form multiple third blind holes and multiple 4th blind holes, wherein the multiple 4th blind hole point
Not in alignment with the multiple second blind hole, and the multiple second blind hole is exposed respectively；
The second conductive layer is formed in the multiple third blind hole and the multiple 4th blind hole, and makes to be located at the multiple 4th
Second conductive layer in blind hole fills up the multiple second blind hole further to contact the multiple first conductive blind hole；With
And
The photoresist layer is removed, wherein second conductive layer being located in the multiple second blind hole forms the multiple second
Conductive blind hole, and second conductive layer being located on second dielectric layer forms the patterned line layer.
9. the production method of multilayer wiring structure according to claim 6, wherein the multiple first conductive blind hole is every
One aligns with corresponding second conductive blind hole.
10. the production method of multilayer wiring structure according to claim 6, wherein the multiple second conductive blind hole is every
One maximum outside diameter is less than the maximum outside diameter of corresponding first conductive blind hole.
11. the production method of multilayer wiring structure according to claim 6, wherein the multiple second conductive blind hole is every
One bottom surface contacts the top surface of corresponding first conductive blind hole, and the bottom of each of the multiple second conductive blind hole
The area in face is less than the area of the top surface of corresponding first conductive blind hole.
12. the production method of multilayer wiring structure according to claim 6, further includes:
Before being respectively formed opposite two surfaces of the first line structure and second line construction in the core layer,
The multiple conductive through holes for running through the core layer are formed, to be electrically connected the first line structure and the second route knot
Structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710950291.4A CN109673099B (en) | 2017-10-13 | 2017-10-13 | Multilayer circuit structure and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710950291.4A CN109673099B (en) | 2017-10-13 | 2017-10-13 | Multilayer circuit structure and manufacturing method thereof |
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| Publication Number | Publication Date |
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| CN109673099A true CN109673099A (en) | 2019-04-23 |
| CN109673099B CN109673099B (en) | 2020-09-01 |
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| CN201710950291.4A Active CN109673099B (en) | 2017-10-13 | 2017-10-13 | Multilayer circuit structure and manufacturing method thereof |
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| Publication number | Publication date |
|---|---|
| CN109673099B (en) | 2020-09-01 |
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