CN109650324A - MEMS chip structure and preparation method, mask plate, device - Google Patents
MEMS chip structure and preparation method, mask plate, device Download PDFInfo
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- CN109650324A CN109650324A CN201811476831.0A CN201811476831A CN109650324A CN 109650324 A CN109650324 A CN 109650324A CN 201811476831 A CN201811476831 A CN 201811476831A CN 109650324 A CN109650324 A CN 109650324A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 34
- 239000010410 layer Substances 0.000 claims description 54
- 239000010408 film Substances 0.000 claims description 15
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical group [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 12
- 229910021389 graphene Inorganic materials 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 10
- 238000001459 lithography Methods 0.000 claims description 9
- 238000001179 sorption measurement Methods 0.000 claims description 9
- 230000003993 interaction Effects 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 8
- 239000011368 organic material Substances 0.000 claims description 5
- 230000006870 function Effects 0.000 claims description 4
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 3
- 230000005611 electricity Effects 0.000 claims description 3
- 239000002356 single layer Substances 0.000 claims description 3
- 239000013039 cover film Substances 0.000 claims description 2
- 238000010521 absorption reaction Methods 0.000 claims 1
- 239000010409 thin film Substances 0.000 claims 1
- 230000002093 peripheral effect Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 239000000047 product Substances 0.000 description 3
- 230000003139 buffering effect Effects 0.000 description 1
- 239000007795 chemical reaction product Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00222—Integrating an electronic processing unit with a micromechanical structure
- B81C1/00246—Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00388—Etch mask forming
- B81C1/00404—Mask characterised by its size, orientation or shape
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Abstract
The present invention provides a kind of MEMS chip structure and preparation method, mask plate, devices, pass through setting MEMS major component and MEMS auxiliary element, driving circuit element, logic arithmetic element, CPU central processing element, power supply are merged on the same chip with MEMS major component, eliminate multiple occupied larger more spaces of processing circuit plate, the device volume being reduced significantly based on MEMS in traditional MEMS device;It that is to say, eliminate periphery circuit design, using MEMS chip structure of the invention, it will be without using traditional chip periphery circuit, since chip periphery circuit occupies the main space and volume of electrical part product, this greatly reduces the volume of the electrical part product based on making MEMS chip structure of the invention and taking up space, and really realizes the micromation and portability of electrical part.
Description
Technical field
The present invention relates to technical field of semiconductors, and in particular to a kind of MEMS chip structure and preparation method thereof, and cover
Film version, MEMS device.
Background technique
Traditional MEMS chip includes scanning micro-mirror and scanning platform.And periphery electricity is set in MEMS chip structure peripheral
Road plate, peripheral circuit are mutually electrically connected with MEMS chip structure, and peripheral circuit includes controller circuitry etc..MEMS chip structure
In, scanning micro-mirror is coupled in scanning platform.Scanning platform can generate movement, controller control under driving excitation and magnetic fields
The moving direction of scanning platform processed and position.Scanning micro-mirror can be rotated along rotary shaft.In traditional devices, each peripheral circuit
One piece of circuit board is all monopolized, and is mutually electrically connected with MEMS chip structure using conducting wire or metal wire, so that final product device
Volume is larger.It lives and improves with modern science and technology, be miniaturized, the product of portability is increasingly favored.And at the same time,
More stringent requirements are proposed for feedback velocity, image definition to electrical part etc..How feedback velocity, the image of electrical part are improved
Under the premise of clarity, the micromation of Lai Shixian electrical part is industry a great problem urgently to be solved.
Summary of the invention
In order to overcome the above problems, the present invention is intended to provide a kind of MEMS chip structure and MEMS device, MEMS chip knot
In structure, using the MEMS major component and MEMS auxiliary element being set on same chip simultaneously, reduce more significantly existing
The volume of electrical part based on MEMS chip.
In order to achieve the above object, the present invention provides a kind of MEMS chip structure, include: on the same chip
MEMS major component is used for the reflected beams and scan image;
MEMS auxiliary element, comprising:
Driving circuit element, one end are connected with extraneous component, and the circuit of the other end and MEMS mirror is mutually electrically connected, and is used for
Driving power is provided, the operation of extraneous component and MEMS mirror is controlled;
Logic arithmetic element is connected with driving circuit element, for carrying out logical operation, control driving circuit element
Opening and closing;
CPU central processing element, one end are connected with extraneous component, the other end and driving circuit element, logical operation member
Part, power supply are mutually electrically connected, for sending signal to driving circuit element, logic arithmetic element, memory element, power supply and controlling driving
The logical relation of circuit element, logic arithmetic element, power supply;And the logical relation for controlling extraneous component;
Power supply, one end are connected with extraneous component, the other end and MEMS mirror, driving circuit element, logical operation member
Part, CPU central processing element are mutually electrically connected, for providing electric energy to each element or the external world.
In some embodiments, further includes: memory element, one end are connected with power supply, and the other end is connected with extraneous component,
The data sent for storing extraneous component.
In some embodiments, the MEMS major component has reflecting mirror and the raw component of magnetic, and reflecting mirror can be in magnetic life portion
Under the interaction of part and external magnetic field, is rotated along first direction axis or axis rotates in a second direction, and reflection light;First
Direction is different from second direction.
In some embodiments, the first direction is vertical with the second direction.
In some embodiments, the MEMS auxiliary element is looped around around MEMS major component and is arranged.
In some embodiments, the distance between the edge at the edge of the MEMS major component and the MEMS auxiliary element
Not less than the 1/2 of the width of each MEMS auxiliary element.
In some embodiments, the size of each MEMS auxiliary element is less than the size of the MEMS major component.
In order to achieve the above object, the present invention also provides adopted in a kind of preparation process of above-mentioned MEMS chip structure
Mask plate, the target pattern on mask plate includes: MEMS major component pattern and multiple MEMS auxiliary element patterns;
MEMS auxiliary element pattern includes:
Driving circuit element pattern, one end extend outwardly for being connected with extraneous component, and the other end is used for anti-with MEMS
Mirror pattern is penetrated mutually to be electrically connected;
Logic arithmetic element pattern is connected with driving circuit element pattern;
Memory element pattern, one end are connected with power supply pattern, and the other end extends outwardly for being connected with extraneous component;
CPU central processing element pattern, one end extend outwardly for being connected with extraneous component, the other end and driving circuit
Element pattern, logic arithmetic element pattern, memory element pattern, power supply pattern are mutually electrically connected;
Power supply pattern, one end extend outwardly for being connected with extraneous component, the other end and MEMS mirror pattern, driving
Circuit element pattern, logic arithmetic element pattern, memory element pattern, CPU central processing element pattern are connected.
In some embodiments, the MEMS auxiliary element pattern is looped around around MEMS major component pattern and is arranged.
In some embodiments, the MEMS major component pattern and the MEMS auxiliary element pattern are respectively arranged at difference
Sub- exposure mask plate on, this little mask plate layer alignment stack forms final target pattern.
In some embodiments, driving circuit element pattern, logic arithmetic element pattern, memory element pattern, the center CPU
Processing element pattern, power supply pattern are separately positioned on different sub- exposure mask plates;In this little mask plate layer, each straton
It is both provided with alignment mark on exposure mask plate, the alignment for each straton exposure mask plate;This little mask plate layer heap poststack obtains
Obtain target pattern finally.
In some embodiments, the pattern of alignment mark is cross and the annulus around word setting.
In some embodiments, in the stacking setting of sub- exposure mask plate, the alignment in every straton mask plate from the bottom up
It marks all corresponding and is aligned one by one;Alternatively, in each sub- mask plate of MEMS auxiliary element pattern, it is neighbouring to fiducial mark
Remember corresponding, two alignment marks are at least set in every sub- mask plate layer;Alignment mark in each straton exposure mask plate
It is different;It is of different sizes;In the stacking setting of sub- exposure mask plate so that alignment mark in every straton mask plate from the bottom up according to
Sequence is incremented by, and each alignment mark in same sub- exposure mask plate is sequentially incremented by, in neighbouring sub- exposure mask plate at least
There is an alignment mark size identical, the identical alignment mark of size is used for overlapping alignment.
In order to achieve the above object, the present invention also provides a kind of preparation methods of above-mentioned MEMS chip structure, comprising:
Step 01: design object patterned mask version;It include MEMS major component pattern and multiple in target pattern mask plate
MEMS auxiliary element pattern;MEMS auxiliary element pattern includes:
Driving circuit element pattern, one end extend outwardly for being connected with extraneous component, and the other end is used for anti-with MEMS
Mirror pattern is penetrated mutually to be electrically connected;
Logic arithmetic element pattern is connected with driving circuit element pattern;
CPU central processing element pattern, one end extend outwardly for being connected with extraneous component, the other end and driving circuit
Element pattern, logic arithmetic element pattern, memory element pattern, power supply pattern are mutually electrically connected;
Power supply pattern, one end extend outwardly for being connected with extraneous component, the other end and MEMS mirror pattern, driving
Circuit element pattern, logic arithmetic element pattern, memory element pattern, CPU central processing element pattern are connected;
Step 02: using target pattern mask plate carry out lithography and etching technique, on chip formed MEMS major component and
MEMS auxiliary element.
It in some embodiments, further include memory element pattern;One end of memory element pattern is connected with power supply pattern, separately
One end extends outwardly for being connected with extraneous component.
In some embodiments, the step 02 includes the preparation process and MEMS auxiliary member of the MEMS major component
The preparation process of part;
Before preparing the MEMS auxiliary element, first blocked on the MEMS major component region prepared with exposure mask, then
Carry out the preparation of MEMS auxiliary element;
After preparing MEMS auxiliary element, exposure mask is removed;Alternatively,
Before preparing the MEMS major component, first blocked on the MEMS auxiliary element region prepared with exposure mask, then
Carry out the preparation of MEMS major component;
After preparing MEMS major component, exposure mask is removed.
In some embodiments, driving circuit element pattern, logic arithmetic element pattern, memory element pattern, the center CPU
Processing element pattern, power supply pattern are separately positioned on different sub- exposure mask plates;In this little mask plate layer, each straton
It is both provided with alignment mark on exposure mask plate, the alignment for each straton exposure mask plate;This little mask plate layer heap poststack obtains
Obtain target pattern finally;
In MEMS auxiliary element preparation process, lithography and etching technique is carried out using corresponding sub- exposure mask plate,
It is blocked with exposure mask in its region;Each layer first carries out the lookup and alignment of alignment mark before lithography and etching.
In some embodiments, the exposure mask uses organic material, which can dissolve in alcohol.
In order to achieve the above object, the present invention also provides a kind of MEMS device, comprising: MEMS chip structure and field magnetic
Body;Wherein, MEMS chip structure includes:
MEMS major component, has a raw component of reflecting mirror and magnetic, and reflecting mirror can be in the mutual of the raw component of magnetic and external magnetic field
Under effect, is rotated along first direction axis or axis rotates in a second direction, and reflection light;First direction is different from second party
To;
MEMS auxiliary element, comprising:
Driving circuit element, one end are connected with extraneous component, and the other end is mutually electrically connected with MEMS mirror, for providing drive
Dynamic power controls the operation of extraneous component and MEMS mirror;
Logic arithmetic element is connected with driving circuit element, for carrying out logical operation, control driving circuit element
Opening and closing;
CPU central processing element, one end are connected with extraneous component, the other end and driving circuit element, logical operation member
Part, memory element, power supply are mutually electrically connected, for sending signal to driving circuit element, logic arithmetic element, memory element, power supply
And control the logical relation of driving circuit element, logic arithmetic element, memory element, power supply;And for controlling extraneous first device
The logical relation of part;
Power supply, one end are connected with extraneous component, the other end and MEMS mirror, driving circuit element, logical operation member
Part, memory element, CPU central processing element are mutually electrically connected, for providing electric energy to each element or the external world;
Field magnet is set to MEMS auxiliary element periphery, makes the magnetic field interaction that component is given birth to magnetic for providing magnetic field.
In some embodiments, further includes: memory element, one end are connected with power supply, and the other end is connected with extraneous component,
The data sent for storing extraneous component.
In some embodiments, the MEMS auxiliary element is looped around around MEMS major component and is arranged.
In some embodiments, the distance between the edge at the edge of the MEMS major component and the MEMS auxiliary element
Not less than the 1/2 of the width of each MEMS auxiliary element.
In some embodiments, the size of each MEMS auxiliary element is less than the size of the MEMS major component.
In some embodiments, the raw component of the magnetic is inductance coil or magnet.
In some embodiments, the field magnet is around the periphery for being set to MEMS auxiliary element;The MEMS chip knot
Spacing between structure and the field magnet is greater than the width of the MEMS auxiliary element.
In some embodiments, the field magnet has horizontal part and vertical portion;Horizontal part upper surface is used to support MEMS
Chip structure, vertical portion top are higher than MEMS chip structural top.
In some embodiments, the upper surface of the horizontal part is provided with multilayered structure, includes at least from the bottom up: buffering
Layer, adsorption layer;Buffer layer plays buffer function when MEMS chip structure is landed;Adsorption layer is used to adsorb MEMS chip structure,
Avoid MEMS chip structure that Relative sliding occurs.
In some embodiments, the material of the buffer layer is flexible material.
In some embodiments, the material of the adsorption layer is graphene film.
In some embodiments, the graphene film is single-layer graphene film.
MEMS chip structure of the invention is provided with MEMS major component and MEMS auxiliary element, by driving circuit element, patrols
It collects arithmetic element, CPU central processing element, power supply to merge on the same chip with MEMS major component, eliminates traditional MEMS
Multiple occupied larger more spaces of processing circuit plate, the device volume being reduced significantly based on MEMS in device;
It that is to say, eliminate periphery circuit design, it, will be without using traditional chip periphery electricity using MEMS chip structure of the invention
Road, since chip periphery circuit occupies the main space and volume of electrical part product, this will make MEMS chip knot of the invention
The volume of electrical part product based on structure and taking up space greatly reduces, and really realizes the micromation of electrical part and portable
Property.
Detailed description of the invention
Fig. 1 is the schematic diagram of the MEMS chip structure of one embodiment of the present of invention
Fig. 2 is the mask plate schematic diagram of the MEMS chip structure of one embodiment of the present of invention
Fig. 3 is the alignment mark schematic diagram of one embodiment of the present of invention
Fig. 4 is the alignment mark schematic diagram of another embodiment of the invention
Fig. 5 is the schematic top plan view of the MEMS device of one embodiment of the present of invention
Fig. 6 is the cross section structure schematic diagram of the MEMS device of one embodiment of the present of invention
Specific embodiment
To keep the contents of the present invention more clear and easy to understand, below in conjunction with Figure of description, the contents of the present invention are made into one
Walk explanation.Certainly the invention is not limited to the specific embodiment, general replacement known to those skilled in the art
It is included within the scope of protection of the present invention.
Below in conjunction with attached drawing 1~6 and specific embodiment, invention is further described in detail.It should be noted that attached drawing
It is all made of very simplified form, using non-accurate ratio, and only to facilitate, clearly reach aid illustration the present embodiment
Purpose.
Referring to Fig. 1, one of the present embodiment MEMS chip structure, MEMS major component 01 and MEMS auxiliary element 02 are equal
On same chip 00.
MEMS major component 01 is used for the reflected beams and scan image.Specifically, MEMS major component 01 has 103 He of reflecting mirror
Magnetic gives birth to component, and reflecting mirror 103 is connected with first direction axis 101, and second direction axis 102 is connected with the balance ring outside reflecting mirror 103;
Reflecting mirror 103 can be under the interaction of the raw component of magnetic and external magnetic field, along the rotation of first direction axis 101 or in a second direction
Axis 102 rotates, and reflection light;First direction is different from second direction, preferably, first direction is vertical with second direction.
Here in MEMS major component, reflecting mirror 103 is under magnetic fields and under the effect of driving circuit element, along first direction axis 101
Deflection or in a second direction axis 102 deflect, so that reflection is in grating pattern.Substantially, so-called MEMS chip knot in the present invention
Structure refers to MEMS scanning micro-mirror fabric chip in the narrow sense.
In the present embodiment, MEMS auxiliary element 02, which can be, but not limited to be looped around around MEMS major component 01, to be arranged.
MEMS auxiliary element 02 includes: driving circuit element, logic arithmetic element, CPU central processing element, power supply, further, it is also possible to
Progress is provided with memory element.
Specifically, one end of driving circuit element is connected with extraneous component, the circuit of the other end and MEMS mirror 103
It is mutually electrically connected, for providing driving power, controls the operation of extraneous component and MEMS mirror 103.Logic arithmetic element, with drive
Dynamic circuit element is connected, and for carrying out logical operation, controls the opening and closing of driving circuit element.CPU central processing element, one end
It is connected with extraneous component, the other end is mutually electrically connected with driving circuit element, logic arithmetic element, power supply and memory element, uses
In to driving circuit element, logic arithmetic element, memory element, power supply send signal and control driving circuit element, logic fortune
Calculate the logical relation of element, memory element, power supply;In addition, CPU central processing element can be also used for controlling extraneous component
Logical relation.
In the present embodiment, one end of power supply is connected with extraneous component, the other end and MEMS mirror 103, driving circuit
Element, logic arithmetic element, CPU central processing element are mutually electrically connected, for providing electric energy to each element or the external world.Here, it deposits
One end of storage element is connected with power supply, and the other end is connected with extraneous component, the data sent for storing extraneous component.
It should be noted that the MEMS chip structure of the present embodiment is due to having the members such as processor, logical operation, memory
Part reduces the space of device without the peripheral circuit plate except traditional chip structure significantly.
The overall dimensions of the MEMS chip structure of the present embodiment, such as length or width are not more than 2cm, and area is not more than
4cm2.Therefore, the MEMS chip structure of the present embodiment changes the space of occupying of the device on the existing basis MEMS significantly, reduces
The volume of device, makes it possible device miniaturization, ultra-thin, ultralightization.
MEMS auxiliary element 02 is provided with around MEMS major component 01 namely scanning mirror micro-mirror structure therefore to keep away
Exempting from interference mutual with each circuit of the MEMS auxiliary element 02 of surrounding of MEMS major component 01 etc. influences, preferably,
The distance between edge and the edge of MEMS auxiliary element 02 of MEMS major component 01 are not less than each MEMS auxiliary element 02
The 1/2 of width.Further, since MEMS master unit 01 forms grating with the reflected beams for scanning, in order to improve entire MEMS core
The optical scanning performance of chip architecture, the size of each MEMS auxiliary element 02 are less than the size of MEMS major component 01, not only mention in this way
High chip performance, additionally it is possible to improve chip integration.
In the present embodiment, the preparation method of above-mentioned MEMS chip structure be may include steps of:
Step 01: design object patterned mask version;
Specifically, referring to Fig. 2, including that MEMS major component pattern 01 ' and multiple MEMS are assisted in target pattern mask plate
Element pattern 02 '.In the present embodiment, MEMS auxiliary element pattern 02 ' can be, but not limited to be looped around MEMS major component pattern 01 '
Around be arranged.Can sufficiently it be arranged according to MEMS major component pattern 01 ' around setting, so that 00 integrated level of chip is higher.
It is corresponding with MEMS major component 01 in MEMS major component pattern 01 ' to be provided with first direction axis pattern 101 ', in conjunction with attached drawing 1
Two axis of orientation patterns 102 ' and reflecting mirror pattern 103 '.The company of the connection relationship of these patterns and corresponding component in above-mentioned Fig. 1
It is identical to connect relationship, which is not described herein again.
02 ' pattern of MEMS auxiliary element includes: driving circuit element pattern, logic arithmetic element pattern, memory element figure
Case, CPU central processing element pattern, power supply pattern, there are also memory element patterns;In these patterns and above-mentioned MEMS chip structure
MEMS auxiliary element 02 ' it is corresponding.Specifically, one end of driving circuit element pattern extend outwardly for extraneous component
It is connected, the other end is used to mutually be electrically connected with the circuit of MEMS mirror pattern 103 '.Logic arithmetic element pattern and driving circuit member
Part pattern is connected.One end of memory element pattern is connected with power supply pattern, the other end extend outwardly for extraneous component
It is connected.The non-one end of CPU central processing element pattern extends outwardly for being connected with extraneous component, the other end and driving circuit member
Part pattern, logic arithmetic element pattern, memory element pattern, power supply pattern are mutually electrically connected.The non-one end of power supply pattern extends outwardly use
Be connected in extraneous component, the other end and MEMS mirror pattern, driving circuit element pattern, logic arithmetic element pattern,
Memory element pattern, CPU central processing element pattern are connected.
In order to improve etching precision, so that the auxiliary element pattern transfer precision of each section improves, MEMS master here
Element pattern 101 ' and MEMS auxiliary element pattern 102 ' are respectively arranged on different sub- exposure mask plates, this little mask plate layer
Alignment stack forms final target pattern.Preferably, driving circuit element pattern, logic arithmetic element pattern, memory element
Pattern, CPU central processing element pattern, power supply pattern are separately positioned on different sub- exposure mask plates.In this little mask plate
In layer, it is both provided with alignment mark on each straton exposure mask plate, the alignment for each straton exposure mask plate.This little exposure mask
Plate heap poststack obtains final target pattern.It should be noted that when removing peripheral circuit, and it is whole with MEMS chip structure
When conjunction, the structure size of each functional area is substantially reduced in MEMS chip structure, in alignment, slightly little by little deviation, phase
May be inessential for traditional devices, however, for the chip structure of many peripheral circuits is integrated with, the alignment precision of a little
Decline and alignment precision deviation, will lead to Aligning degree between layered mask version reduces, image end product quality.
For different sub- exposure mask plates, in order to improve alignment precision, the pattern of alignment mark be a word or annulus, with
And the annulus around word setting.Annulus is capable of providing multilayer alignment, as soon as when having layer, when being misaligned, annulus will appear part weight
It folds and non-annular state is presented, projected spot is also non-annular state, it is apparent that;And further it is arranged in annulus
" one " word mark, in the sub- exposure mask plate alignment of multilayer, " one " if word is misaligned, the sub- mask plate layer heap of multilayer is folded, in light beam
Under can at grid or formed emitting discrete spot, to obviously judge to be misaligned.Here, referring to Fig. 3, " one " can be located at
Annulus diametrically, or positioned at diameter 1/3~1/2 region and with diameter parallel be arranged, as shown in Figure 4.In addition, all layers
In sub- exposure mask plate in label in " one " it is identical with the position corresponding relationship of annulus.
In addition, in the stacking setting of sub- exposure mask plate, alignment mark all phases in every straton mask plate from the bottom up
It corresponds to and is aligned one by one.It in another embodiment of the invention, can also be in each sub- mask plate of MEMS auxiliary element pattern
It is corresponding that neighbouring alignment mark is set, two alignment marks are at least set in every sub- mask plate layer.Further,
The alignment mark that can also be arranged in each straton exposure mask plate is different;Pattern is different or pattern is identical but of different sizes.
For the identical but of different sizes situation of the alignment key pattern in each straton exposure mask plate, sub- exposure mask plate
It stacks in setting, so that the alignment mark in every straton mask plate from the bottom up is sequentially incremented by, and in same sub- exposure mask plate
In each alignment mark be sequentially incremented by, and at least one alignment mark size phase in neighbouring sub- exposure mask plate
Together, the identical alignment mark of size is used for overlapping alignment.
In addition, the situation different at least two alignment key patterns in each layer of exposure mask plate, exposure mask plate
It stacks in setting, at least one alignment key pattern is identical with size in neighbouring exposure mask plate, pattern and size phase
Same alignment mark is used for overlapping alignment.
When three or more alignment marks are arranged in each layer of exposure mask plate, one of alignment mark with it is upper adjacent
The alignment mark of layer is identical, and an alignment mark is identical as the alignment mark of lower adjacent layer, and remaining one or more is to fiducial mark
Note is identical as the alignment mark of other non-adjacent layers, so that the alignment mark in one layer of exposure mask plate can not only be directed at phase
Adjacent upper layer and lower layer, can also be directed at other non-adjacent layers, play multilayer alignment effect in this way, further increase alignment precision and set
Carve quality.
Step 02: using target pattern mask plate carry out lithography and etching technique, on chip formed MEMS major component and
MEMS auxiliary element.
Specifically, including the preparation process of MEMS major component and the preparation process of MEMS auxiliary element;Here, MEMS pivot
The preparation sequence of part and MEMS auxiliary element can be interchanged.
Before preparing MEMS auxiliary element, is first blocked on the MEMS major component region prepared with exposure mask, then carried out
The preparation of MEMS auxiliary element;After getting MEMS auxiliary element ready, exposure mask is removed.
Alternatively,
Before preparing MEMS major component, is first blocked on the MEMS auxiliary element region prepared with exposure mask, then carried out
The preparation of MEMS major component;After preparing MEMS major component, exposure mask is removed.
Here, exposure mask can be, but not limited to using organic material, which can dissolve in alcohol.
It should be noted that due to driving circuit element pattern, logic arithmetic element pattern, memory element pattern, in CPU
Processing element pattern is entreated, power supply pattern is separately positioned on different sub- exposure mask plates;In this little mask plate layer, each layer
It can be provided with alignment mark on sub- exposure mask plate, the alignment for each straton exposure mask plate;This little mask plate layer heap
Poststack obtains final target pattern.
Also, in MEMS auxiliary element preparation process, lithography and etching work is carried out using corresponding sub- exposure mask plate
Skill, other regions are blocked with exposure mask;Each layer first carries out the lookup and alignment of alignment mark before lithography and etching.
In addition, in the present embodiment, referring to Fig. 5, additionally providing a kind of MEMS device includes: above-mentioned MEMS chip structure
With field magnet 03;It may refer to foregoing description about MEMS chip structure, which is not described herein again.
Here field magnet 03 is set to 02 periphery of MEMS auxiliary element, for providing the magnetic field phase of the raw component of magnetic field and magnetic
Interaction.In the present embodiment, the raw component of magnetic be can be, but not limited to as inductance coil or magnet, such as magnet etc..
Specifically, field magnet 03 is around the periphery for being set to MEMS auxiliary element 02;In the horizontal plane, MEMS chip structure
Spacing between field magnet 03 is greater than the width of MEMS auxiliary element 02.This way it is possible to avoid in MEMS auxiliary element 02
The interference in the magnetic field in magnetic field and the raw component generation of magnetic that circuit generates field magnet 03, to further avoid MEMS auxiliary
Element 02 is to the interaction between the magnetic field of field magnet 03 and the magnetic field of the raw component of magnetic.In addition, the ruler of MEMS auxiliary element 02
The very little spacing being less than between MEMS chip 00 and field magnet 03, can also avoid in turn MEMS auxiliary element 02 by field magnet
With the interference of the structure of MEMS major component 01.
In the present embodiment, please refers to Fig. 6 and combine Fig. 1, field magnet 03 has vertical portion 301 and horizontal part 302.Horizontal part
302 upper surfaces are used to support MEMS chip 00, and 00 top of MEMS chip is higher than at the top of vertical portion 301.In such setting, when
MEMS chip 00 is not under magnetic fields, and 302 upper surface of horizontal part is for carrying MEMS chip 00;It is applied when to MEMS chip 00
When adding magnetic field, the MEMS major component 01 in MEMS chip 00 deflects, and starts to execute scanning and reflection to light beam, forms light
Grid.It is to be referred to existing biaxial MEMS scanning micro-mirror structure about the process being scanned that deflects of MEMS major component 01
And its working principle, this is that those skilled in the art could be aware that, which is not described herein again.
Since MEMS chip 00 is micro- fine structure, also, in the present embodiment, MEMS chip 00 not only has MEMS pivot
Part 01 also has MEMS auxiliary element 02, and MEMS auxiliary element more than 02 is arranged around MEMS major component 01.In particular, MEMS
Circuit in auxiliary element 02 uses multilayer interconnection layer, in this way, be easy to causeing when MEMS chip 00 is fallen on field magnet 03
MEMS auxiliary element 02 is impaired, influences device performance, therefore, the upper surface of horizontal part 302 is provided with multilayered structure, from lower past
On at least include: buffer layer 3022, adsorption layer 3021.Buffer layer 3022 plays buffer function when MEMS chip 00 lands.Compared with
Good, the material of buffer layer 3022 is flexible material, and flexible material can be organic material, or for porous film
Layer.In addition, adsorption layer 3021 avoids MEMS chip 00 that Relative sliding occurs for adsorbing MEMS chip 00.Preferably, adsorption layer
3021 material can use graphene film.Graphene film can be, but not limited to using single-layer graphene film.Using list
Layer graphene film, does not mention high surface energy merely with more dangling bonds on graphene film surface, improves adsorption capacity, but also by
There is porous network structure in graphene film, can be further improved cushion effect, reduce MEMS chip 00 in moving process
Impact force.
Although the present invention is disclosed as above with preferred embodiment, the right embodiment illustrate only for the purposes of explanation and
, it is not intended to limit the invention, if those skilled in the art can make without departing from the spirit and scope of the present invention
Dry changes and retouches, and the protection scope that the present invention is advocated should be subject to described in claims.
Claims (30)
1. a kind of MEMS chip structure, which is characterized in that include: on the same chip
MEMS major component is used for the reflected beams and scan image;
MEMS auxiliary element, comprising:
Driving circuit element, one end are connected with extraneous component, and the circuit of the other end and MEMS mirror is mutually electrically connected, for providing
Driving power controls the operation of extraneous component and MEMS mirror;
Logic arithmetic element is connected with driving circuit element, and for carrying out logical operation, control driving circuit element is opened
It closes;
CPU central processing element, one end are connected with extraneous component, the other end and driving circuit element, logic arithmetic element, electricity
Source is mutually electrically connected, for sending signal to driving circuit element, logic arithmetic element, memory element, power supply and controlling driving circuit
The logical relation of element, logic arithmetic element, power supply;And the logical relation for controlling extraneous component;
Power supply, one end are connected with extraneous component, the other end and MEMS mirror, driving circuit element, logic arithmetic element,
CPU central processing element is mutually electrically connected, for providing electric energy to each element or the external world.
2. MEMS chip structure according to claim 1, which is characterized in that further include: memory element, one end and power supply phase
Even, the other end is connected with extraneous component, the data sent for storing extraneous component.
3. MEMS chip structure according to claim 1, which is characterized in that the MEMS major component has reflecting mirror and magnetic
Raw component, reflecting mirror can rotate or along second party under the interaction of the raw component of magnetic and external magnetic field along first direction axis
It is rotated to axis, and reflection light;First direction is different from second direction.
4. MEMS chip structure according to claim 3, which is characterized in that the first direction and the second direction are hung down
Directly.
5. MEMS chip structure according to claim 1, which is characterized in that the MEMS auxiliary element is looped around MEMS master
It is arranged around element.
6. MEMS chip structure according to claim 1, which is characterized in that the edge of the MEMS major component with it is described
The distance between edge of MEMS auxiliary element is not less than the 1/2 of the width of each MEMS auxiliary element.
7. MEMS chip structure according to claim 1, which is characterized in that the size of each MEMS auxiliary element is small
In the size of the MEMS major component.
8. mask plate employed in a kind of preparation process of MEMS chip structure described in claim 1, which is characterized in that cover
Target pattern in film version includes: MEMS major component pattern and multiple MEMS auxiliary element patterns;
MEMS auxiliary element pattern includes:
Driving circuit element pattern, one end extend outwardly for being connected with extraneous component, and the other end is used for and MEMS mirror
Pattern is mutually electrically connected;
Logic arithmetic element pattern is connected with driving circuit element pattern;
Memory element pattern, one end are connected with power supply pattern, and the other end extends outwardly for being connected with extraneous component;
CPU central processing element pattern, one end extend outwardly for being connected with extraneous component, the other end and driving circuit element
Pattern, logic arithmetic element pattern, memory element pattern, power supply pattern are mutually electrically connected;
Power supply pattern, one end extend outwardly for being connected with extraneous component, the other end and MEMS mirror pattern, driving circuit
Element pattern, logic arithmetic element pattern, memory element pattern, CPU central processing element pattern are connected.
9. mask plate employed in the preparation process of MEMS chip structure according to claim 8, which is characterized in that institute
It states MEMS auxiliary element pattern and is looped around around MEMS major component pattern and be arranged.
10. mask plate employed in the preparation process of MEMS chip structure according to claim 8, which is characterized in that
The MEMS major component pattern and the MEMS auxiliary element pattern are respectively arranged on different sub- exposure mask plates, this is a little to cover
Film plate alignment stack forms final target pattern.
11. mask plate employed in the preparation process of MEMS chip structure according to claim 10, which is characterized in that
Driving circuit element pattern, logic arithmetic element pattern, memory element pattern, CPU central processing element pattern, power supply pattern point
It is not arranged on different sub- exposure mask plates;In this little mask plate layer, alignment is both provided on each straton exposure mask plate
Label, the alignment for each straton exposure mask plate;This little mask plate layer heap poststack obtains final target pattern.
12. mask plate employed in the preparation process of MEMS chip structure according to claim 11, which is characterized in that
The pattern of alignment mark is cross and the annulus around word setting.
13. mask plate employed in the preparation process of MEMS chip structure according to claim 11, which is characterized in that
In the stacking setting of sub- exposure mask plate, the alignment mark in every straton mask plate from the bottom up is all corresponding and is aligned one by one;
Alternatively, neighbouring alignment mark is corresponding in each sub- mask plate of MEMS auxiliary element pattern, in every sub- mask plate
Two alignment marks are at least set in layer;Alignment mark in each straton exposure mask plate is different;It is of different sizes;Sub- exposure mask plate
Stacking setting in so that the alignment mark in every straton mask plate from the bottom up is sequentially incremented by, and in same sub- mask plate
Each alignment mark in layer is sequentially incremented by, at least one alignment mark size is identical in neighbouring sub- exposure mask plate,
The identical alignment mark of size is used for overlapping alignment.
14. a kind of preparation method of MEMS chip structure described in claim 1 characterized by comprising
Step 01: design object patterned mask version;It include MEMS major component pattern and multiple MEMS auxiliary in target pattern mask plate
Help element pattern;MEMS auxiliary element pattern includes:
Driving circuit element pattern, one end extend outwardly for being connected with extraneous component, and the other end is used for and MEMS mirror
Pattern is mutually electrically connected;
Logic arithmetic element pattern is connected with driving circuit element pattern;
CPU central processing element pattern, one end extend outwardly for being connected with extraneous component, the other end and driving circuit element
Pattern, logic arithmetic element pattern, memory element pattern, power supply pattern are mutually electrically connected;
Power supply pattern, one end extend outwardly for being connected with extraneous component, the other end and MEMS mirror pattern, driving circuit
Element pattern, logic arithmetic element pattern, memory element pattern, CPU central processing element pattern are connected;
Step 02: carrying out lithography and etching technique using target pattern mask plate, form MEMS major component and MEMS on chip
Auxiliary element.
15. the preparation method of MEMS chip structure according to claim 14, which is characterized in that further include memory element figure
Case;One end of memory element pattern is connected with power supply pattern, and the other end extends outwardly for being connected with extraneous component.
16. the preparation method of MEMS chip structure according to claim 14, which is characterized in that the step 02 includes institute
State the preparation process of MEMS major component and the preparation process of the MEMS auxiliary element;
Before preparing the MEMS auxiliary element, is first blocked on the MEMS major component region prepared with exposure mask, then carried out
The preparation of MEMS auxiliary element;
After preparing MEMS auxiliary element, exposure mask is removed;Alternatively,
Before preparing the MEMS major component, is first blocked on the MEMS auxiliary element region prepared with exposure mask, then carried out
The preparation of MEMS major component;
After preparing MEMS major component, exposure mask is removed.
17. the preparation method of chip structure according to claim 16, which is characterized in that driving circuit element pattern is patrolled
Volume arithmetic element pattern, memory element pattern, CPU central processing element pattern, power supply pattern are separately positioned on different sons and cover
On film plate;In this little mask plate layer, it is both provided with alignment mark on each straton exposure mask plate, is covered for each straton
The alignment of film plate;This little mask plate layer heap poststack obtains final target pattern;
In MEMS auxiliary element preparation process, lithography and etching technique, Qi Taqu are carried out using corresponding sub- exposure mask plate
It is blocked with exposure mask in domain;Each layer first carries out the lookup and alignment of alignment mark before lithography and etching.
18. the preparation method of chip structure according to claim 16 or 17, which is characterized in that the exposure mask is using organic
Material, the organic material can dissolve in alcohol.
19. a kind of MEMS device characterized by comprising MEMS chip structure and field magnet;Wherein, MEMS chip structure packet
It includes:
MEMS major component, has reflecting mirror and the raw component of magnetic, and reflecting mirror can be in the interaction of magnetic raw component and external magnetic field
Under, it is rotated along first direction axis or axis rotates in a second direction, and reflection light;First direction is different from second direction;
MEMS auxiliary element, comprising:
Driving circuit element, one end are connected with extraneous component, and the other end is mutually electrically connected with MEMS mirror, for providing driving function
Rate controls the operation of extraneous component and MEMS mirror;
Logic arithmetic element is connected with driving circuit element, and for carrying out logical operation, control driving circuit element is opened
It closes;
CPU central processing element, one end are connected with extraneous component, and the other end and driving circuit element, are deposited logic arithmetic element
Storage element, power supply are mutually electrically connected, for sending signal to driving circuit element, logic arithmetic element, memory element, power supply and controlling
The logical relation of driving circuit element, logic arithmetic element, memory element, power supply;And for controlling patrolling for extraneous component
The relationship of collecting;
Power supply, one end are connected with extraneous component, and the other end and MEMS mirror, logic arithmetic element, are deposited driving circuit element
Storage element, CPU central processing element are mutually electrically connected, for providing electric energy to each element or the external world;
Field magnet is set to MEMS auxiliary element periphery, makes the magnetic field interaction that component is given birth to magnetic for providing magnetic field.
20. MEMS device according to claim 19, which is characterized in that further include: memory element, one end and power supply phase
Even, the other end is connected with extraneous component, the data sent for storing extraneous component.
21. MEMS device according to claim 19, which is characterized in that the MEMS auxiliary element is looped around MEMS pivot
It is arranged around part.
22. MEMS device according to claim 19, which is characterized in that the edge of the MEMS major component and the MEMS
The distance between edge of auxiliary element is not less than the 1/2 of the width of each MEMS auxiliary element.
23. MEMS device according to claim 19, which is characterized in that the size of each MEMS auxiliary element is less than
The size of the MEMS major component.
24. MEMS device according to claim 19, which is characterized in that the raw component of the magnetic is inductance coil or magnet.
25. MEMS device according to claim 19, which is characterized in that the field magnet is first around MEMS auxiliary is set to
The periphery of part;Spacing between the MEMS chip structure and the field magnet is greater than the width of the MEMS auxiliary element.
26. MEMS device according to claim 19, which is characterized in that the field magnet has horizontal part and vertical portion;
Horizontal part upper surface is used to support MEMS chip structure, is higher than MEMS chip structural top at the top of vertical portion.
27. MEMS device according to claim 26, which is characterized in that the upper surface of the horizontal part is provided with multilayer knot
Structure includes at least from the bottom up: buffer layer, adsorption layer;Buffer layer plays buffer function when MEMS chip structure is landed;Absorption
Layer avoids MEMS chip structure that Relative sliding occurs for adsorbing MEMS chip structure.
28. MEMS device according to claim 27, which is characterized in that the material of the buffer layer is flexible material.
29. MEMS device according to claim 27, which is characterized in that the material of the adsorption layer is graphene film.
30. MEMS device according to claim 29, which is characterized in that the graphene film is that single-layer graphene is thin
Film.
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Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030122206A1 (en) * | 2001-11-09 | 2003-07-03 | Amal Bhattarai | Multi-chip module integrating MEMS mirror array with electronics |
CN101510543A (en) * | 2008-02-14 | 2009-08-19 | 株式会社东芝 | Integrated semiconductor device |
US20110228367A1 (en) * | 2008-06-02 | 2011-09-22 | Maradin Technologies Ltd. | Gimbaled scanning micro-mirror apparatus |
US20110309532A1 (en) * | 2010-06-21 | 2011-12-22 | Stmicroelectronics S.R.L. | Semiconductor structure with alignment control mask |
US20160116732A1 (en) * | 2014-10-23 | 2016-04-28 | Stanley Electric Co., Ltd. | Piezoelectric and electromagnetic type two-dimensional optical deflector and its manufacturing method |
US20160124215A1 (en) * | 2014-10-31 | 2016-05-05 | Intel Corporation | Electromagnetic mems device |
WO2018079669A1 (en) * | 2016-10-31 | 2018-05-03 | 国立大学法人福井大学 | Two-dimensional optical scanning mirror device, manufacturing method therefor, two-dimensional optical scanning device, and image projection device |
-
2018
- 2018-12-05 CN CN201811476831.0A patent/CN109650324A/en active Pending
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030122206A1 (en) * | 2001-11-09 | 2003-07-03 | Amal Bhattarai | Multi-chip module integrating MEMS mirror array with electronics |
CN101510543A (en) * | 2008-02-14 | 2009-08-19 | 株式会社东芝 | Integrated semiconductor device |
US20110228367A1 (en) * | 2008-06-02 | 2011-09-22 | Maradin Technologies Ltd. | Gimbaled scanning micro-mirror apparatus |
US20110309532A1 (en) * | 2010-06-21 | 2011-12-22 | Stmicroelectronics S.R.L. | Semiconductor structure with alignment control mask |
US20160116732A1 (en) * | 2014-10-23 | 2016-04-28 | Stanley Electric Co., Ltd. | Piezoelectric and electromagnetic type two-dimensional optical deflector and its manufacturing method |
US20160124215A1 (en) * | 2014-10-31 | 2016-05-05 | Intel Corporation | Electromagnetic mems device |
WO2018079669A1 (en) * | 2016-10-31 | 2018-05-03 | 国立大学法人福井大学 | Two-dimensional optical scanning mirror device, manufacturing method therefor, two-dimensional optical scanning device, and image projection device |
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