CN109643975A - Dynamic amplifying circuit - Google Patents

Dynamic amplifying circuit Download PDF

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Publication number
CN109643975A
CN109643975A CN201780000805.8A CN201780000805A CN109643975A CN 109643975 A CN109643975 A CN 109643975A CN 201780000805 A CN201780000805 A CN 201780000805A CN 109643975 A CN109643975 A CN 109643975A
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transistor
signal
control signal
voltage
control
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CN109643975B (en
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范硕
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Shenzhen Goodix Technology Co Ltd
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Shenzhen Goodix Technology Co Ltd
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • H03F1/301—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in MOSFET amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45183—Long tailed pairs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/72—Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/297—Indexing scheme relating to amplifiers the loading circuit of an amplifying stage comprising a capacitor
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/312—Indexing scheme relating to amplifiers the loading circuit of an amplifying stage comprising one or more switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/447—Indexing scheme relating to amplifiers the amplifier being protected to temperature influence
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45134—Indexing scheme relating to differential amplifiers the whole differential amplifier together with other coupled stages being fully differential realised
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45631—Indexing scheme relating to differential amplifiers the LC comprising one or more capacitors, e.g. coupling capacitors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45726—Indexing scheme relating to differential amplifiers the LC comprising more than one switch, which are not cross coupled
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Electronic Switches (AREA)

Abstract

This application discloses a kind of dynamic amplifying circuits, comprising: the first driving circuit generates first voltage signal and second voltage signal for receiving the first control signal；Second driving circuit generates first driving signal for receiving first voltage signal and second voltage signal；Third driving circuit generates second control signal for receiving the first control signal and first driving signal；Dynamic amplifier DA, for controlling the open and close of first control switch and the second control switch respectively according to the first control signal and the second control signal；In first time period, first control signal is high level, and second is driven to low level；In second time period, first control signal is low level, which is high level；Within the third period, which is low level, which is low level；Wherein, mutual conductance of the duration of the second time period with the transistor in saturation region is inversely proportional.

Description

Dynamic amplifying circuit Technical field
The invention relates to circuit fields, and more particularly, to dynamic amplifying circuit.
Background technique
Dynamic amplifier (Dynamic Amplifier, DA) compared to it is traditional realized based on the operational amplifier with feedback for, there is low-power consumption, the advantages of no overshoot.
But the gain of dynamic amplifier can with for example, semiconductor technology, supply voltage and temperature (Process, Voltage, Temperature, PVT) variation and change, limit its application to a certain extent.
Therefore, it is necessary to a kind of dynamic amplifying circuits, are capable of providing metastable gain.
Summary of the invention
The application provides a kind of dynamic amplifying circuit, is capable of providing metastable gain.
In a first aspect, providing a kind of dynamic amplifying circuit, comprising:
First driving circuit generates first voltage signal and second voltage signal, the first voltage signal changes over time, the second voltage signal is constant voltage for receiving first control signal；
Second driving circuit generates the first driving signal for receiving the first voltage signal and the second voltage signal；
Third driving circuit generates second control signal for receiving the first control signal and first driving signal；
Dynamic amplifier DA, including the first control switch, the second control switch and transistor；
The DA controls the open and close of first control switch and second control switch by the first control signal and the second control signal for receiving the first control signal and the second control signal respectively；
In first time period, the first control signal is high level, and the voltage value of the first voltage signal output is the first voltage value, and the voltage value of the second voltage signal output is second voltage value, and the second control signal is low level；
In the second time period after the first time period, the first control signal is low level, and the voltage value of first voltage signal output starts to increase, but is less than the second voltage value, described the One driving signal is low level, and the second control signal is high level；
Within the third period after the second time period, the first control signal is low level, the voltage value of the first voltage signal output is greater than or equal to the second voltage value, and first driving signal is high level, and the second control signal is low level；
Wherein, mutual conductance of the duration of the second time period with the transistor in the DA in saturation region is inversely proportional.
Therefore, the dynamic amplifying circuit of the embodiment of the present application, the voltage value of the output of first voltage signal and second voltage signal is controlled by first control signal, and then according to the first voltage signal and the second voltage signal, the mutual conductance that the duration of control second time period meets with the transistor in DA in saturation region is inversely proportional, so that the dynamic amplifying circuit is still capable of providing metastable gain in PVT variation.
With reference to first aspect, in a kind of possible implementation of first aspect, first driving circuit includes:
First biasing circuit generates the first voltage signal for receiving the first control signal；
First biasing circuit includes the first transistor, the first current source and first capacitor device, the drain electrode of the first transistor connects first current source, one end of the first capacitor device connects the drain electrode of the first transistor, and the grid of the first transistor is connected by first switch device, the source level of the first transistor connects the other end of the first capacitor device, and the drain electrode of the first transistor is for exporting the first voltage signal；
Second biasing circuit, for exporting the second voltage signal；
Second biasing circuit includes second transistor and the second current source, the drain electrode of the second transistor connects second current source, the drain electrode of the second transistor is connect with the grid of the second transistor, and the drain electrode of the second transistor is for exporting the second voltage signal；
Wherein, the first transistor is identical with the transistor parameter of the second transistor, and the current value of second current source is greater than the current value of first current source.
With reference to first aspect, in a kind of possible implementation of first aspect, the first control signal is also used to control the closure and disconnection of the first switch device；
Wherein, the first control signal is specifically used for:
In the first time period, the first switch device closure is controlled, in the second time period and the third period, the first switch device is controlled and disconnects.
With reference to first aspect, in a kind of possible implementation of first aspect, the first transistor It is identical as the transistor parameter of the transistor of the DA with the transistor parameter of the second transistor.
With reference to first aspect, in a kind of possible implementation of first aspect, the first transistor and the second transistor are metal-oxide semiconductor (MOS) metal-oxide-semiconductor.
With reference to first aspect, in a kind of possible implementation of first aspect, electric current is provided to the transistor of the first transistor and the DA by mirror current source.
With reference to first aspect, in a kind of possible implementation of first aspect, second driving circuit includes the second capacitor, the first phase inverter and the second phase inverter；
One end of second capacitor receives the first voltage signal by second switch device, and receives the second voltage signal by third switching device, and the other end of second capacitor is connect with the input terminal of first phase inverter；
The input terminal of first phase inverter is connected with output end by the 4th switching device, and the output end of first phase inverter is connect with the input terminal of second phase inverter, and the output end of second phase inverter is for exporting first driving signal.
With reference to first aspect, in a kind of possible implementation of first aspect, the first control signal is also used to:
Control the closure and disconnection of the second switch device, third switching device and the 4th switching device；
Wherein, the first control signal is specifically used for:
In the first time period, it controls the second switch device to disconnect, third switching device and the 4th switching device closure, in the second time period and the third period, the second switch device closure is controlled, the third switching device and the 4th switching device disconnect.
With reference to first aspect, in a kind of possible implementation of first aspect, second driving circuit is continuous time comparator, the first input end of the Connection Time comparator is for receiving the first voltage signal, second input terminal of the Connection Time comparator is for receiving the second voltage signal, and the output end of the continuous time comparator is for exporting first driving signal.
With reference to first aspect, in a kind of possible implementation of first aspect, the third driving circuit includes third phase inverter, the 4th phase inverter and asks and circuit；
For receiving the first control signal, the output end of the third phase inverter is connect with described ask with the first input end of circuit the input terminal of the third phase inverter；
For receiving first driving signal, the output end of the 4th phase inverter is connect with described ask with the second input terminal of circuit the input terminal of 4th phase inverter；
It is described to ask with the output end of circuit for exporting the second control signal.
With reference to first aspect, in a kind of possible implementation of first aspect, the DA further includes third capacitor, one end of the third capacitor and the cathode of power supply connect, the other end of the third capacitor is connected by first control switch and the positive grade of power supply, the other end of the capacitor is also connected with one end of second control switch, and the other end of second control switch is connect with the drain electrode of the transistor；
The first control signal is specifically used for:
In the first time period, the first control switch closure is controlled, in the second time period and the third period, first control switch is controlled and disconnects；
The second control signal is specifically used for:
It in the first time period, controls second control switch and disconnects, in the second time period, control the second control switch closure, control second control switch in the third period and disconnect.
With reference to first aspect, in a kind of possible implementation of first aspect, the multiple for the voltage value that the threshold voltage that the voltage value that the threshold voltage that the second voltage value subtracts the second transistor obtains subtracts the first transistor for the first voltage value obtains.
Therefore, the dynamic amplifying circuit of the embodiment of the present application, the voltage value of the output of first voltage signal and second voltage signal is controlled by first control signal, and then according to the first voltage signal and the second voltage signal, the mutual conductance that the duration of control second time period meets with the transistor in DA in saturation region is inversely proportional, so that the dynamic amplifying circuit is still capable of providing metastable gain in PVT variation.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of existing dynamic amplifying circuit.
Fig. 2 is the logic timing figure of existing dynamic amplifying circuit.
Fig. 3 is the equivalent circuit diagram of existing dynamic amplifying circuit.
Fig. 4 is the schematic diagram according to the dynamic amplifying circuit of the embodiment of the present application.
Fig. 5 is the logic timing figure according to the dynamic amplifying circuit of the embodiment of the present application.
Fig. 6 is an example structural schematic diagram according to first driving circuit of the embodiment of the present application.
Fig. 7 is an example structural schematic diagram according to second driving circuit of the embodiment of the present application.
Fig. 8 is another structural schematic diagram according to second driving circuit of the embodiment of the present application.
Fig. 9 is an example structural schematic diagram according to the third driving circuit of the embodiment of the present application.
Specific embodiment
Below in conjunction with attached drawing, the technical solution in the application is described.
Fig. 1 is the structural schematic diagram of existing dynamic amplifier, as shown in Figure 1, the dynamic amplifier 100 is symmetrical structure, the device that right Half-edge Structure and left Half-edge Structure include, and the parameter of device is identical, here it is introduced by taking left Half-edge Structure as an example, the working condition of the device in right Half-edge Structure is identical with the working condition of the respective devices in left half structure, and which is not described herein again.
The dynamic amplifier 100 includes transistor 110, capacitor 120, the first control switch 130 and the second control switch 140.
The working condition of the dynamic amplifier 100 includes two stages:
First stage, the first control switch 130 closure, the second control switch 140 disconnect, and capacitor 120 is connected to the anode (V of power supplyCC), capacitor is in charged state；
Second stage, the first control switch 130 disconnect, and the second control switch 140 closure, capacitor 120 is connected to the drain electrode of transistor 110 by the second control switch 140, and capacitor is in discharge condition.
Fig. 2 is the logic timing figure of the dynamic amplifier 100, whereinFor the timing of the first control switch 130,For the timing of the second control switch 140, VoutFor the timing of output voltage.
As shown in Fig. 2, (being denoted as T in the first stageR), the first control switch 130 closure, the second control switch 140 disconnects, and dynamic amplifier is in (reset) state of reset；(T is denoted as in second stageA), the first control switch 130 disconnects, and the second control switch 140 closure, dynamic amplifier is in magnifying state, dynamic amplifying circuit be in magnifying state when a length of second stage duration TA。
Fig. 3 is the equivalent circuit diagram of the dynamic amplifier shown in FIG. 1, wherein gmFor the mutual conductance of transistor 110, CLFor the capacitance of capacitor 120, can be obtained by Fig. 3, shown in amplification coefficient (gain) Av such as formula (1) of the dynamic amplifying circuit:
Due to gmAnd CLIt can change with PVT, therefore, cause the gain of dynamic amplifier unstable, and TAIt can be controlled by designer, therefore, the embodiment of the present application provides a kind of dynamic amplifying circuit, by the duration T for controlling second stageA, it is capable of providing metastable gain.
Fig. 4 is the schematic diagram of dynamic amplifying circuit 300 provided by the embodiments of the present application, as shown in figure 4, the dynamic amplifying circuit 300 includes:
First driving circuit 310 generates first voltage signal and second voltage signal, first voltage signal changes over time, second voltage signal is constant voltage for receiving first control signal；
Second driving circuit 320 generates the first driving signal for receiving first voltage signal and second voltage signal；
Third driving circuit 330 generates second control signal for receiving first control signal and the first driving signal；
Dynamic amplifier DA340, including the first control switch, the second control switch and transistor；
DA controls the open and close of the first control switch and the second control switch by first control signal and second control signal for receiving first control signal and second control signal respectively；
That is, first control signal and second control signal respectively correspond the control signal in Fig. 2With, that is, first control signal and second control signal may be used as the control signal in Fig. 2With, it is respectively used to the first control switch 130 and the second control switch 140 of control DA100.
Optionally, DA340 can be DA100 shown in FIG. 1, or, it may be other equivalent circuits, DA340 can also include third capacitor, and third capacitor can correspond to the capacitor 120 in DA100 shown in FIG. 1, one end of third capacitor and the cathode of power supply connect, the other end of third capacitor is connected by the first control switch and the positive grade of power supply, and the other end of capacitor is also connected with one end of the second control switch, and the drain electrode of the other end and transistor of the second control switch connects.
In the embodiment of the present application, first control signal is specifically used for:
In first time period, the first control switch closure is controlled, in second time period and third period, the first control switch is controlled and disconnects；
Second control signal is specifically used for:
It in first time period, controls the second control switch and disconnects, in second time period, control the second control switch closure, control the second control switch in the third period and disconnect.
Hereinafter, the logic timing figure of the dynamic amplifying circuit according to the embodiment of the present application is described in detail in conjunction with Fig. 5.
(correspond to the previously described first stage) in first time period, i.e. t1To t2Between period, first control signal is high level, the first voltage signal V of the first driving circuit output1For the first voltage value, second voltage signal V2For second voltage value, the first voltage value is less than second voltage value.The second control signal of third driving circuit output is low level.
It should be noted that in the embodiment of the present application, in first time period, the first driving signal can export low level, high level can also be exported, Fig. 5 is only low level as showing using the first driving signal Example, as long as first control signal is high level in first time period, second control signal is low level.
(correspond to previously described second stage) in second time period after the first period of time, i.e. t2To t3Between period, first control signal is low level, in second time period, the first voltage signal of first driving circuit output starts to increase, but still less than the second voltage value, second voltage signal is still second voltage value, and the second driving circuit is still low level according to the first driving signal that first voltage signal and second voltage signal export, and third driving circuit is changed into high level from low level according to the second control signal that first control signal and the first driving signal export.
Third period after the second period of time, i.e. t3Period later, first control signal is low level, the first voltage signal of first driving circuit output is greater than or equal to second voltage value, first driving signal of the second driving circuit output is changed into high level by low level, and the second control signal of third driving circuit output is changed into low level from high level.
That is, first driving circuit of the embodiment of the present application can export first voltage signal V according to first control signal1With second voltage signal V2, wherein in first time period, V1<V2, in second time period, V1Start to increase, but is still less than V2, within the third period, V1It is increased above or is equal to V2, i.e. the line of demarcation of second time period and third period is V1Equal to V2At the time of.
Optionally, within the third period, V1It can increase to equal to V2No longer increase later, alternatively, V can also be equal to2Continue to increase to no longer increase etc. after some voltage value later, the embodiment of the present application does not limit the size of voltage value of the first voltage signal within the third period, as long as the first driving signal is in V1Equal to V2At the time of be flipped.
Further, second driving circuit can export the first driving signal according to the first voltage signal and second voltage signal changed over time, i.e. when the voltage value of first voltage signal is less than the voltage value of second voltage signal, export low level, when the voltage value of first voltage signal is greater than or equal to the voltage value of second voltage signal, high level is exported.
For example, the second driving circuit can be realized with comparator, specifically, which can be continuous time comparator.
Further, third driving circuit exports second control signal according to first control signal and the first driving signal, wherein, third driving circuit need to only be controlled when first control signal and the first driving signal are all low level, second control signal exports high level, when first control signal and the first driving signal are other states, second control signal all exports low level.
For example, third driving circuit can be realized with phase inverter and with the combinational circuit of door, for example, can be with After first control signal and the first driving signal are all negated, two input terminals with door are input to, at this time, it can control when first control signal and the first driving signal are all low level, high level is exported with the output end of door, under other states, all exports low level with the output end of door.
The dynamic amplifying circuit of the embodiment of the present application can control the duration T of second time period by first voltage signal and second voltage signalAMutual conductance with the transistor in DA in saturation region is inversely proportional, i.e. TA=K/gm, so that formula (1) can be using abbreviation as formula (2):
At this point, the gain of dynamic amplifying circuit is only related with capacitance, therefore, the gain of dynamic amplifying circuit is relatively stable when PVT changes.
Therefore, the dynamic amplifying circuit of the embodiment of the present application controls the voltage value of the output of first voltage signal and second voltage signal by first control signal, and then according to first voltage signal and second voltage signal, controls the duration T of second time periodAMeet the mutual conductance with the transistor in DA in saturation region to be inversely proportional, so that the dynamic amplifying circuit is still capable of providing metastable gain in PVT variation.
Hereinafter, the implementation of the dynamic amplifying circuit of the embodiment of the present application is discussed in detail in conjunction with Fig. 6 to specific example shown in Fig. 9.
It should be understood that 6 are to help those skilled in the art to example shown in Fig. 9 and more fully understand the embodiment of the present application, and the range of the embodiment of the present application have to be limited.Those skilled in the art are according to given Fig. 6 to Fig. 9, it is clear that can carry out the modification or variation of various equivalences, such modification or variation are also fallen into the range of the embodiment of the present application.
Before introducing the first driving circuit shown in fig. 6, the voltage-current characteristic that transistor works at saturation region is introduced first.
Work has following relationship in the voltage and current of the transistor of saturation region:
Wherein, IDFor the drain current of transistor, μ is carrier mobility, CoxFor the grid oxygen capacitance of unit area, W is the width of grid, and L is the length of grid, VGSFor the voltage difference of grid and source electrode, VTHFor the threshold voltage of transistor, in other words, the conducting voltage of grid and source level, VovFor the overdrive voltage of transistor.
It is possible to further shift out the mutual conductance g of transistor onto according to formula (3)mCalculation formula, as shown in formula (4):
By formula (3) it is found that drain current IDWith (Vov)2Directly proportional, in other words, after the parameter of transistor determines, the pressure drop of the grid and source level of transistor is only with flowing through the current related of transistor.By formula (4) it is found that gmWith 2ID/VovIt is directly proportional, in other words, after the parameter of transistor determines, the mutual conductance g of transistormOnly with flowing through the current related of transistor.
It should be noted that above-mentioned IDWith (Vov)2Directly proportional and gmWith 2ID/VovDirectly proportional is that a kind of approximate proportional relation due to the influence of the factors such as the technique of transistor or environment can slightly have deviation, but deviation is smaller, in acceptable range, it is believed that approximate directly proportional.
Fig. 6 is an example structural schematic diagram according to first driving circuit of the embodiment of the present application, Fig. 6 shows a kind of possible implementation of the first driving circuit, in other words, preferred implementation, but the embodiment of the present application is not limited to this implementation, is both fallen in the range of the embodiment of the present application according to the modification of the various equivalences of this implementation or variation.
As shown in fig. 6, first driving circuit 310 includes the first biasing circuit 311 and the second biasing circuit 312.
Specifically, the first biasing circuit 311 includes the first transistor 3111, the first current source 3112, first capacitor device 3113 and first switch device 3114.The drain electrode (pole D) of the first transistor 3111 connects the first current source 3112, the drain electrode (pole D) of one end connection the first transistor 3111 of first capacitor device 3113, and the grid (pole S) of the first transistor 3111 is connected by first switch device 3114, the other end of source level (pole S) the connection first capacitor device 3113 of the first transistor 3111, the drain electrode (pole D) of the first transistor 3111 is for exporting first voltage signal.
Second biasing circuit 312 includes second transistor 3121 and the second current source 3122, the drain electrode (pole D) of second transistor 3121 is connect with the second current source 3122, the drain electrode (pole D) of second transistor 3121 is connect with the grid (pole S) of second transistor 3121, that is the drain and gate short circuit of second transistor, the drain electrode (pole D) of second transistor 3121 is for exporting second voltage signal.
Optionally, in the embodiment of the present application, the current value of the second current source can be the multiple of the current value of the first current source, for example, I2=4I1Or I2=9I1Or I2=6I1Deng, wherein I1For the current value of the first current source, I2For the current value of the second current source.
Optionally, in the embodiment of the present application, the first current source and the second current source can be realized using mirror current source, can guarantees the second current source in this way and the first current source is multiple proportion.
Since the drain and gate of second transistor 3121 connects, the work of second transistor 3121 is being saturated The second voltage signal in area, the drain electrode output of second transistor 3121 is approximately constant voltage, is denoted as V2。
In the first biasing circuit 311, first switch device 3114 is controlled by first control signal, i.e. the first control signal open and close that can be used for controlling first switch device 3114.Specifically, in first time period, first control signal is for controlling closure first switch device 3114, and in second time period and third period, first control signal disconnects first switch device 3114 for controlling.
Hereinafter, the working condition of the first driving circuit is described in detail in conjunction with Fig. 5.
In t1In moment, first switch device 3114 is closed, and the drain and gate of the first transistor 3111 is shorted, i.e. VGS=VDSThe first transistor 3111 works in saturation region, and the drain current of the first transistor 3111 is approximately the current value of the first current source, therefore, in first time period, first voltage signal is approximately constant voltage, for convenient for distinguishing and describe, by first voltage signal in the voltage value of first time period, i.e. the first voltage value is denoted as VT1=VGS1=VDS1, wherein VGS1For the grid of the first transistor 3111 and the voltage difference of source electrode, VDS1For the drain electrode of the first transistor 3111 and the voltage difference of source electrode.
In t2Moment, first switch device 3114 disconnect, and the first current source 3112 starts to charge to first capacitor device 3113, V1Start to increase, in t2T after moment3Moment, V1=V2, at this point, the first driving signal of the second driving circuit output is high level by low level overturning.
So t2Moment is to t3The duration T of second time period between momentA, the as voltage value of first capacitor device is from VT1Increase to V2Therefore the required time can determine T according to formula (5)A:
TA=(V2-VT1)*C1/I1Formula (5)
Wherein, C1For the capacitance of first capacitor device 3113.
Optionally, in the embodiment of the present application, the first transistor 3111 and second transistor 3121 can use identical transistor parameter, for example, μ, Cox, the parameters such as W and L can be identical, then the V of the first transistor and second transistorTHIt is considered that equal.
Due to VT1=VGS1=VOV1+VTH, V2=VGS2=VOV2+VTH, wherein VGS1For the grid of the first transistor 3111 and the voltage difference of source electrode, VOV1For the overdrive voltage of the first transistor 3111, VGS2For the grid of second transistor 3121 and the voltage difference of source electrode, VOV2For the overdrive voltage of second transistor 3121.
By formula (3) it is found thatSo VT1And V2Voltage difference are as follows:
So formula (6) substitution formula (5) can be obtained:
Optionally, the first transistor can also use transistor parameter identical with the transistor in DA, Simultaneously, the current value of first current source can also be with the drain current of the transistor in DA at multiple proportion, such as, electric current can be provided for the transistor in the first transistor and the DA by mirror current source, the electric current of the transistor flowed into DA in this way and the electric current of the first transistor is flowed into multiple proportion, i.e. I=KI1, by formula (4) it is found that the mutual conductance of the transistor in DA and the mutual conductance of the first transistor are also at multiple proportion, i.e.,Wherein, gmFor the mutual conductance of the transistor in DA, gm1For the mutual conductance of the first transistor.
Due to gm1=2I1/VOV1, then the mutual conductance g of the transistor in DAmIt can be determined by formula (8):
Formula (8) and formula (7) are substituted into formula (1), the amplification coefficient A of available dynamic amplifying circuitvAs shown in formula (9):
When the transistor parameter of two transistors and flow into transistor electric current it is all equal when, by formula (4) it is found that the mutual conductance of transistor is also equal, i.e.,At this point, the amplification coefficient A of dynamic amplifying circuit shown in formula (9)vIt can be using abbreviation as formula (10):
For example, if I2=4I1, then AV=2C1/CLIf I2=9I1, then AV=3C1/CL, i.e. AvIt is only related with capacitance, that is to say, that as long as the overdrive voltage V of the first transistorOV1With the overdrive voltage V of second transistorOV2Metastable gain can be obtained with multiple proportion.
Optionally; in the embodiment of the present application; the first transistor and second transistor can be metal-oxide semiconductor (MOS) (Metal Oxide Semiconductor; MOS it) manages; such as; the enhanced metal-oxide-semiconductor of N-channel depletion type MOS tube, N-channel, P-channel depletion type MOS tube or P-channel enhancement type metal-oxide-semiconductor etc.; the type of transistor in the attached drawing of the embodiment of the present application is merely illustrative; any restriction should not be constituted to the embodiment of the present application; those skilled in the art with reference to the accompanying drawings in the obtained equivalent circuit of example, both fall within the protection scope of the embodiment of the present application.
Fig. 7 is an example structural schematic diagram according to second driving circuit of the embodiment of the present application, Fig. 7 shows a kind of possible implementation of the second driving circuit, in other words, preferred implementation, but the embodiment of the present application is not limited to this implementation, is both fallen in the range of the embodiment of the present application according to the modification of the various equivalences of this implementation or variation.
As shown in fig. 7, second driving circuit 700 includes the second capacitor 321, the first phase inverter 322 and the second phase inverter 323.
One end of second capacitor 321 receives first voltage signal by second switch device 324, and Second voltage signal is received by third switching device 325, the other end of the second capacitor 321 is connect with the input terminal of the first phase inverter 322；
The input terminal and output end of first phase inverter 322 are connected by the 4th switching device 326, and the output end of the first phase inverter 322 is connect with the input terminal of the second phase inverter 323, and the output end of the second phase inverter 323 is for exporting the first driving signal.
Wherein, first control signal is used for:
In first time period, control second switch device is disconnected, third switching device and the 4th switching device closure, in second time period and third period, controls second switch device closure, third switching device and the 4th switching device disconnect.
Generally speaking, the working condition of the switching device of first control signal control is as follows:
In t1Moment, closure first switch device, third switching device and the 4th switching device disconnect second switch device；
In t2Moment disconnects first switch device, third switching device and the 4th switching device, is closed second switch device；
In t3Moment, closure first switch device, third switching device and the 4th switching device disconnect second switch device.
In this way, in t1Moment is to t2First time period between moment, second switch device 324 disconnect, and third switching device 325 is closed, and the 4th switching device 326 closure, the voltage of one end of the second capacitor 321 is V2, the voltage of the other end is the threshold voltage V of the first phase inverter 322THINV, then the pressure drop on the second capacitor 321 is VTHINV-V2。
As described above, in first time period, we are not relevant for the first driving signal output low level or high level, as long as first control signal is high level in first time period, the second control signal of third driving circuit output is low level.
In t2Moment is to t3In second time period between moment, second switch device 324 is closed, and third switching device 325 disconnects, and the 4th switching device 326 disconnects, then the voltage of one end of the second capacitor 321 is V1, it is based on principle of charge conservation, the pressure drop on the second capacitor 321 is constant, then the voltage of the input terminal of the first phase inverter is V1+VTHINV-V2, due in second time period, V1<V2, then V1+VTHINV-V2<VTHINV, after the first phase inverter, high level is exported, after the second phase inverter, the first driving signal exports low level.
In t3In the third period after moment, V1≥V2, then V1+VTHINV-V2≥VTHINV, after the first phase inverter, export low level, using the second phase inverter it is reversed after, the first driving signal is defeated High level out.
Optionally, the embodiment of the present application can also realize the function of the second driving circuit using other equivalent circuits, as long as exporting low level when first voltage signal is less than second voltage signal, high level is exported when first voltage signal is greater than or equal to second voltage signal.
Optionally, in the embodiment of the present application, since first control signal can be used for controlling the open and close of first switch device, the input terminal that so the first biasing circuit can further include first control signal, for inputting first control signal, to control the open and close of first switch device by first control signal.
Similarly, the second driving circuit also may include the input terminal of first control signal, control second switch device, third switching device, open and close of the 4th switching device etc. for inputting first control signal, and then by first control signal.
It should be understood that, in the embodiment of the present application, first control signal is used to control the open and close of first switch device, second switch device, third switching device, the 4th switching device and the first control switch, and second control signal is used to control the open and close of the second control switch, it only indicates that control signal has the function of the corresponding switching device of control, not indicates that the input terminal of these control signals and corresponding switching device certainly exist direct connection relationship.As long as guaranteeing that the control signal of input can control the open and close of corresponding switching device.
Fig. 8 is according to another structural schematic diagram of second driving circuit of the embodiment of the present application, as shown in figure 8, the second driving circuit 320 is continuous time comparator 327, the first input end of Connection Time comparator 327 is for receiving first voltage signal V1, the second input terminal of Connection Time comparator is for receiving second voltage signal V2, the output end of continuous time comparator 327 is for exporting the first driving signal.
Specifically, in first time period and second time period, V1<V2, the output low level of continuous time comparator 327；
Within the third period, V1≥V2, the output voltage of continuous time comparator 327 jumps by low level as high level.
Therefore, continuous time comparator shown in Fig. 8 and combinational circuit shown in Fig. 7 can realize the function of the second driving circuit, low level is exported when first voltage signal is less than second voltage signal, high level is exported when first voltage signal is greater than or equal to second voltage signal, combinational circuit shown in Fig. 7 is for continuous time comparator shown in Fig. 8, need not continuously it be compared, therefore power consumption is relatively low.
Fig. 9 is according to an example structural schematic diagram of the third driving circuit of the embodiment of the present application, such as Fig. 9 institute Show, third driving circuit 330 includes third phase inverter 331, the 4th phase inverter 332 and asks and circuit 333.
For receiving first control signal, the output end of third phase inverter 331 is connect with the first input end of circuit 333 with asking the input terminal of third phase inverter 331；
The input terminal of 4th phase inverter 332 is connect with the second input terminal of circuit 333 for receiving the first driving signal, the output end of the 4th phase inverter 332 with asking；
It asks with the output end of circuit 333 for exporting second control signal.
That is, second control signal only when first control signal and the first driving signal are all low level, just exports high level, and when first control signal and the first driving signal are other working conditions, second control signal output low level.
Optionally, asking can be realized with circuit 333 with door or other equivalent circuits.
Therefore, the dynamic amplifying circuit of the embodiment of the present application, the voltage value of the output of first voltage signal and second voltage signal is controlled by first control signal, and then according to first voltage signal and second voltage signal, the mutual conductance that the duration of control second time period meets with the transistor in DA in saturation region is inversely proportional, so that the dynamic amplifying circuit is still capable of providing metastable gain in PVT variation.
It should be understood that; the differentiation that first, second, third, fourth and the various digital numbers (such as first driving circuit 310 and the second driving circuit 320 etc.) being referred to herein only carry out for convenience of description, is not intended to limit the protection scope of the embodiment of the present application.
The cathode for the power supply being related in the above-described embodiments can be set to ground potential (be grounded), certainly in the concrete realization can be other current potentials such as negative potential, the embodiment of the present application to this with no restriction.
It should be understood that the terms "and/or", only a kind of incidence relation for describing affiliated partner, indicates may exist three kinds of relationships, for example, A and/or B, can indicate: individualism A exists simultaneously A and B, these three situations of individualism B.In addition, character "/" herein, typicallys represent the relationship that forward-backward correlation object is a kind of "or".
It should be understood that, in the various embodiments of the application, magnitude of the sequence numbers of the above procedures are not meant that the order of the execution order, and the execution sequence of each process should be determined by its function and internal logic, and the implementation process without coping with the embodiment of the present application constitutes any restriction.
Those of ordinary skill in the art may be aware that unit described in conjunction with the examples disclosed in the embodiments of the present disclosure and algorithm steps, can be realized with the combination of electronic hardware or computer software and electronic hardware.These functions are implemented in hardware or software actually, the specific application and design constraint depending on technical solution.Professional technician can use different methods to achieve the described function each specific application, but this realization is it is not considered that exceed scope of the present application.
It is apparent to those skilled in the art that for convenience and simplicity of description, system, the specific work process of device and unit of foregoing description can refer to corresponding processes in the foregoing method embodiment, details are not described herein.
In several embodiments provided herein, it should be understood that disclosed systems, devices and methods may be implemented in other ways.Such as, the apparatus embodiments described above are merely exemplary, such as, the division of the unit, only a kind of logical function partition, there may be another division manner in actual implementation, such as multiple units or components can be combined or can be integrated into another system, or some features can be ignored or not executed.Another point, shown or discussed mutual coupling, direct-coupling or communication connection can be through some interfaces, the indirect coupling or communication connection of device or unit, can be electrical property, mechanical or other forms.
The unit as illustrated by the separation member may or may not be physically separated, and component shown as a unit may or may not be physical unit, it can and it is in one place, or may be distributed over multiple network units.It can some or all of the units may be selected to achieve the purpose of the solution of this embodiment according to the actual needs.
In addition, each functional unit in each embodiment of the application can integrate in one processing unit, it is also possible to each unit and physically exists alone, can also be integrated in one unit with two or more units.
If the function is realized in the form of SFU software functional unit and when sold or used as an independent product, can store in a computer readable storage medium.Based on this understanding, substantially the part of the part that contributes to existing technology or the technical solution can be embodied in the form of software products the technical solution of the application in other words, the computer software product is stored in a storage medium, it uses including some instructions so that a computer equipment (can be personal computer, server or the network equipment etc.) execute each embodiment the method for the application all or part of the steps.And storage medium above-mentioned includes: USB flash disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), the various media that can store program code such as magnetic or disk.
It is described above; the only specific embodiment of the application, but the protection scope of the application is not limited thereto, and anyone skilled in the art is within the technical scope of the present application; it can easily think of the change or the replacement, should all cover within the scope of protection of this application.Therefore, the protection scope of the application should be based on the protection scope of the described claims.

Claims (13)

  1. A kind of dynamic amplifying circuit characterized by comprising
    First driving circuit generates first voltage signal and second voltage signal, the first voltage signal changes over time, the second voltage signal is constant voltage for receiving first control signal；
    Second driving circuit generates the first driving signal for receiving the first voltage signal and the second voltage signal；
    Third driving circuit generates second control signal for receiving the first control signal and first driving signal；
    Dynamic amplifier DA, including the first control switch, the second control switch and transistor；
    The DA controls the open and close of first control switch and second control switch by the first control signal and the second control signal for receiving the first control signal and the second control signal respectively；
    In first time period, the first control signal is high level, and the voltage value of the first voltage signal output is the first voltage value, and the voltage value of the second voltage signal output is second voltage value, and the second control signal is low level；
    In the second time period after the first time period, the first control signal is low level, and the voltage value of the first voltage signal output starts to increase, but is less than the second voltage value, first driving signal is low level, and the second control signal is high level；
    Within the third period after the second time period, the first control signal is low level, the voltage value of the first voltage signal output is greater than or equal to the second voltage value, and first driving signal is high level, and the second control signal is low level；
    Wherein, mutual conductance of the duration of the second time period with the transistor in the DA in saturation region is inversely proportional.
  2. Dynamic amplifying circuit according to claim 1, which is characterized in that first driving circuit includes:
    First biasing circuit generates the first voltage signal for receiving the first control signal；
    First biasing circuit includes the first transistor, the first current source and first capacitor device, the drain electrode of the first transistor connects first current source, one end of the first capacitor device connects the drain electrode of the first transistor, and the grid of the first transistor is connected by first switch device, the source level of the first transistor connects the other end of the first capacitor device, and the drain electrode of the first transistor is for exporting the first voltage signal；
    Second biasing circuit, for exporting the second voltage signal；
    Second biasing circuit includes second transistor and the second current source, the drain electrode of the second transistor connects second current source, the drain electrode of the second transistor is connect with the grid of the second transistor, and the drain electrode of the second transistor is for exporting the second voltage signal；
    Wherein, the first transistor is identical with the transistor parameter of the second transistor, and the current value of second current source is greater than the current value of first current source.
  3. Dynamic amplifying circuit according to claim 2, which is characterized in that the current value of second current source is the multiple of the current value of first current source.
  4. Dynamic amplifying circuit according to claim 2 or 3, which is characterized in that provide electric current to the transistor of the first transistor and the DA by mirror current source.
  5. Dynamic amplifying circuit according to any one of claim 2 to 4, which is characterized in that the first transistor and the second transistor are identical as the transistor parameter of transistor in the DA.
  6. The dynamic amplifying circuit according to any one of claim 2 to 5, which is characterized in that the first control signal is also used to control the closure and disconnection of the first switch device；
    Wherein, the first control signal is specifically used for:
    In the first time period, the first switch device closure is controlled, in the second time period and the third period, the first switch device is controlled and disconnects.
  7. The dynamic amplifying circuit according to any one of claim 2 to 6, which is characterized in that the first transistor and the second transistor are metal-oxide semiconductor (MOS) metal-oxide-semiconductor.
  8. The dynamic amplifying circuit according to any one of claim 2 to 7, it is characterized in that, the multiple for the voltage value that the threshold voltage that the voltage value that the threshold voltage that the second voltage value subtracts the second transistor obtains subtracts the first transistor for the first voltage value obtains.
  9. Dynamic amplifying circuit according to any one of claim 1 to 8, which is characterized in that second driving circuit includes the second capacitor, the first phase inverter and the second phase inverter；
    One end of second capacitor receives the first voltage signal by second switch device, and receives the second voltage signal by third switching device, and the other end of second capacitor is connect with the input terminal of first phase inverter；
    The input terminal of first phase inverter is connected with output end by the 4th switching device, and the output end of first phase inverter is connect with the input terminal of second phase inverter, and the output end of second phase inverter is for exporting first driving signal.
  10. Dynamic amplifying circuit according to claim 9, which is characterized in that the first control signal is also used to:
    Control the closure and disconnection of the second switch device, third switching device and the 4th switching device；
    Wherein, the first control signal is specifically used for:
    In the first time period, it controls the second switch device to disconnect, third switching device and the 4th switching device closure, in the second time period and the third period, the second switch device closure is controlled, the third switching device and the 4th switching device disconnect.
  11. Dynamic amplifying circuit according to any one of claim 1 to 8, it is characterized in that, second driving circuit is continuous time comparator, the first input end of the Connection Time comparator is for receiving the first voltage signal, second input terminal of the Connection Time comparator is for receiving the second voltage signal, and the output end of the continuous time comparator is for exporting first driving signal.
  12. Dynamic amplifying circuit according to any one of claim 1 to 11, which is characterized in that the third driving circuit includes third phase inverter, the 4th phase inverter and asks and circuit；
    For receiving the first control signal, the output end of the third phase inverter is connect with described ask with the first input end of circuit the input terminal of the third phase inverter；
    For receiving first driving signal, the output end of the 4th phase inverter is connect with described ask with the second input terminal of circuit the input terminal of 4th phase inverter；
    It is described to ask with the output end of circuit for exporting the second control signal.
  13. Dynamic amplifying circuit according to any one of claim 1 to 12, it is characterized in that, the DA further includes third capacitor, one end of the third capacitor and the cathode of power supply connect, the other end of the third capacitor is connected by first control switch and the positive grade of power supply, the other end of the capacitor is also connected with one end of second control switch, and the other end of second control switch is connect with the drain electrode of the transistor；
    The first control signal is specifically used for:
    In the first time period, the first control switch closure is controlled, in the second time period and the third period, first control switch is controlled and disconnects；
    The second control signal is specifically used for:
    It in the first time period, controls second control switch and disconnects, in the second time period, control the second control switch closure, control second control switch in the third period and disconnect.
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US20190036491A1 (en) 2019-01-31
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CN109643975B (en) 2023-06-16
EP3461003A4 (en) 2019-04-24
US10476443B2 (en) 2019-11-12

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