CN109638000A - A kind of integrated inductance structure and integrated circuit - Google Patents
A kind of integrated inductance structure and integrated circuit Download PDFInfo
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- CN109638000A CN109638000A CN201910085845.8A CN201910085845A CN109638000A CN 109638000 A CN109638000 A CN 109638000A CN 201910085845 A CN201910085845 A CN 201910085845A CN 109638000 A CN109638000 A CN 109638000A
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- planar
- inductance
- planar inductor
- integrated
- inductance structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5227—Inductive arrangements or effects of, or between, wiring layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
- H01L2224/16148—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked the bump connector connecting to a bonding area protruding from the surface
Abstract
The invention discloses a kind of integrated inductance structure and integrated circuits.Wherein, integrated inductance structure includes: at least two planar inductors, and at least two planar inductor is cascading, and the different planar inductors is formed in the metal layer of different function module；At least one connecting component, at least one described connecting component are set between the two neighboring functional module, and two planar inductors of arbitrary neighborhood are electrically connected by the connecting component.Technical solution of the present invention improves the quality factor of inductance in the case where guaranteeing circuit level by being respectively arranged at the planar inductor for constituting inductance in different functional modules.
Description
Technical field
The present embodiments relate to technical field of integrated circuits more particularly to a kind of integrated inductance structures and integrated circuit.
Background technique
Increasingly developed with electronic product, the research and development of all kinds of components are all sent out towards highly integrated, multi-functional direction
Exhibition, therefore, the requirement to integrated circuit is also increasingly improving.
The design of inductance is often a problem in integrated circuit design.At this stage, the inductance in integrated circuit is usually
There are problems that two, one be inductance quality factor (i.e. Q value) it is lower, will affect circuit performance；The other is inductance area
It is larger, it will affect circuit level, size and cost of manufacture.But how to be mentioned under the premise of keeping inductance area constant
The Q value of high inductance is always a great problem of industry.
Summary of the invention
In view of this, the purpose of the present invention is to propose to a kind of integrated inductance structure and integrated circuit, to guarantee circuit collection
The Q value of inductance is improved in the case where Cheng Du.
To achieve the above object, the present invention adopts the following technical scheme:
On the one hand, the embodiment of the invention provides a kind of integrated inductance structures, comprising:
At least two planar inductors, at least two planar inductor are cascading, and different plane electricity
Sense is formed in the metal layer of different function module；
At least one connecting component, at least one described connecting component are set between the two neighboring functional module,
And two planar inductors of arbitrary neighborhood are electrically connected by the connecting component.
Optionally, at least two planar inductors series connection and/or parallel connection.
Optionally, where perpendicular to the planar inductor on the direction of plane, two planar inductors of arbitrary neighborhood
In the presence of overlapping.
Optionally, the corresponding overlapping part current direction having the same of arbitrary neighborhood two planar inductors.
Optionally, the planar inductor is planar spiral structures.
Optionally, the connecting component includes soldered ball and/or metal column.
Optionally, at least two planar inductor includes the first planar inductor and the second planar inductor, the function mould
Block includes chip and package substrate；
First planar inductor is formed in the metal layer of the chip, and second planar inductor is formed in the envelope
In the metal layer for filling substrate.
Optionally, the chip is flip-chip.
Optionally, the connecting component is the tin ball and/or copper post for being bonded the flip-chip.
On the other hand, the embodiment of the invention provides a kind of integrated circuit, the collection provided including any embodiment of the present invention
At induction structure.
The beneficial effects of the present invention are: integrated inductance structure provided by the invention includes at least two planar inductors, at least
Two planar inductors are cascading, and different planar inductors is formed in the metal layer of different function module；At least one
A connecting component, at least one connecting component are set between two neighboring functional module, and two planar inductors of arbitrary neighborhood
It is electrically connected by connecting component.At least two planar inductors that technical solution of the present invention is stacked gradually by setting, and it is different
Planar inductor be formed in the metal layer of different function module, the distance between two neighboring planar inductor can be made to be greater than flat
On the one hand the thickness of face inductance can effectively improve the Q value of inductance under the premise of keeping inductance area constant, that is, guaranteeing electricity
The Q value of inductance is improved in the case where the integrated level of road, or reduces the area of inductance under the premise of keeping the Q value of inductance, in turn
Reduce the area of integrated circuit；On the other hand it can reduce the interference between each planar inductor, it is different flat not being greatly reduced
Between the inductance of face in the case where mutual inductance, the parasitic capacitance between Different Plane inductance can be greatly reduced.In addition, at least two is flat
Face inductance is cascading, and can increase the inductance value of inductance in integrated inductance structure.
Detailed description of the invention
Exemplary embodiments of the present invention will be described in detail referring to the drawings by general below, makes those skilled in the art
Become apparent from above-mentioned and other feature and advantage of the invention, in attached drawing:
Fig. 1 is a kind of the schematic diagram of the section structure of integrated inductance structure provided in an embodiment of the present invention；
Fig. 2 is a kind of schematic perspective view of integrated inductance structure provided in an embodiment of the present invention；
Fig. 3 is the planar structure schematic diagram of the inductance in a kind of integrated inductance structure provided in an embodiment of the present invention；
Fig. 4 is the schematic diagram of the section structure of another integrated inductance structure provided in an embodiment of the present invention；
Fig. 5 is the planar structure schematic diagram of the inductance in a kind of existing integrated inductance structure.
Specific embodiment
To further illustrate the technical scheme of the present invention below with reference to the accompanying drawings and specific embodiments.It is understood that
It is that specific embodiment described herein is used only for explaining the present invention rather than limiting the invention.It further needs exist for illustrating
, only the parts related to the present invention are shown for ease of description, in attached drawing rather than entire infrastructure.
Fig. 1 is a kind of the schematic diagram of the section structure of integrated inductance structure provided in an embodiment of the present invention.The embodiment of the present invention
The integrated inductance structure of offer, suitable for the integrated circuit more demanding to inductance Q value.As shown in Figure 1, provided in this embodiment
Integrated inductance structure, comprising:
At least two planar inductors 21, at least two planar inductors 21 are cascading, and different planar inductors 21
It is formed in the metal layer 20 of different function module 10；
At least one connecting component 30, at least one connecting component 30 are set between two neighboring functional module 10, and
Two planar inductors 21 of arbitrary neighborhood are electrically connected by connecting component 30.
In the present embodiment, functional module 10 can be chip or substrate (such as package substrate), illustratively, different functions
Module 10 can be the combination of different chips, different substrates or chip and substrate；Different planar inductors 21 are formed in not
It is existing using functional module 10 at this time in the existing metal layer 20 (metal layer for forming circuit pattern) of congenerous module 10
Pattern dissolves planar inductor 21 to metal layer 20 simultaneously, to reduce the thickness of process and integrated inductance structure.
Currently, in integrated circuits, to the setting of inductance requirement with higher, both requiring integrated electricity in some applications
Inductance inductance value with higher and Q value in road, and require to reduce the area of integrated circuit, so as to realize Highgrade integration.
Under normal circumstances, in order to obtain the inductance of more high q-factor, need to increase the thickness of inductance coil.But increase inductance
The thickness of coil will cause the decline of the inductance inductance value in unit area, and improve inductance inductance value meeting by increasing inductance area
Leading to the Q value of inductance reduces, and influences circuit performance.Designer in this case just must be to the inductance value and Q in unit area
Value makes choice.Then, how to realize that the promotion of inductance value and/or Q value becomes a problem in same area.
Based on above-mentioned technical problem, inventor has found the planar inductor of setting at least two-layer laminate, and passes through connecting component
Each planar inductor is electrically connected, inductance stacked structure is integrally formed, can be increased under the premise of keeping inductance area constant
Inductance inductance value；Meanwhile when the distance being arranged between two neighboring planar inductor is greater than the thickness of planar inductor, electricity can be improved
The Q value of sense.However, inventor further study show that, when forming above-mentioned inductance stacked structure on the same substrate, need list
The articulamentum for solely forming preparation connecting component increases the thickness of integrated circuit, while technology difficulty increases, and the thickness of articulamentum
The smaller promotion for making inductance Q value is unobvious.
Based on this, the embodiment of the present invention is passed through by the way that different planar inductors to be set in different functional modules
Connecting component between functional module realizes the electrical connection of each planar inductor, forms integrated inductance structure.Due to functional module sheet
The thickness of body is larger, therefore it is larger the distance between two neighboring planar inductor to can be set, to effectively improve the Q of inductance
Value.It is formed in addition, connecting component can use the articulamentum between functional module, avoids being prepared separately for connecting component, dropped
Low technology difficulty, reduces the thickness of integrated circuit.
It should be noted that it includes two planar inductors that Fig. 1, which exemplarily only shows integrated inductance structure,.Such as Fig. 1 institute
Show, integrated inductance structure includes the first planar inductor 211, the second planar inductor 212 and connecting component 30, the first planar inductor
211 and second planar inductor 212 be stacked, the setting of the first planar inductor 211 and the first metal layer of the first functional module 101
In 201, in the second metal layer 202 of the setting of the second planar inductor 212 and the second functional module 102,211 He of the first planar inductor
Second planar inductor 212 is electrically connected by connecting component 30.
In addition, multiple planar inductors can be correspondingly formed in each functional module, to form multiple inductance.The present invention is to inductance
Number, plane distribution, occupied area and functional module where planar inductor etc. are with no restriction, specific depending on actual conditions.
Integrated inductance structure provided in an embodiment of the present invention, by the way that at least two planar inductors stacked gradually are arranged, and
Different planar inductors is formed in the metal layer of different function module, and the distance between two neighboring planar inductor can be made big
In the thickness of planar inductor, the Q value of inductance on the one hand can be effectively improved under the premise of keeping inductance area constant, that is, is being protected
The Q value of inductance is improved in the case where demonstrate,proving circuit level, or the area of inductance is reduced under the premise of keeping the Q value of inductance,
And then reduce the area of integrated circuit；On the other hand it can reduce the interference between each planar inductor, be not greatly reduced not
Between coplanar inductance in the case where mutual inductance, the parasitic capacitance between Different Plane inductance can be greatly reduced.In addition, at least two
A planar inductor is cascading, and can increase the inductance value of inductance in integrated inductance structure.
In order to ensure the electric conductivity of above-mentioned integrated inductance structure, connecting component 30 can be the metal shape of high conductivity
At.Optionally, connecting component 30 includes soldered ball and/or metal column.
Fig. 2 is a kind of schematic perspective view of integrated inductance structure provided in an embodiment of the present invention；Fig. 3 is of the invention real
The planar structure schematic diagram of inductance in a kind of integrated inductance structure of example offer is provided.As shown in Figures 2 and 3, planar inductor 21
It can be planar spiral structures.
It should be noted that planar spiral inductor is easily integrated, it is at low cost, therefore it is snail that planar inductor, which can be set,
Structure.But it is only a kind of specific example provided in this embodiment that planar inductor, which is planar spiral structures, not to the application's
Limitation, planar inductor may be other shapes structure.
Optionally, above-mentioned at least two planar inductors series connection and/or parallel connection.
Planar inductor 21 in each layer metal layer 20 can be attached by connecting component 30 according to actual needs, each flat
It can be connected in series between face inductance 21, can be connected in parallel can also be connected with sections in series, part in parallel connection.
Illustratively, referring to fig. 2, when each planar inductor 21 is connected, total inductance value is each flat in the integrated inductance structure
The sum of the inductance value of face inductance 21 when larger therefore, it is necessary to inductance value in the integrated inductance structure, can be set each planar inductor 21 and go here and there
Connection connection.
Optionally, where perpendicular to planar inductor on the direction of plane, two planar inductors of arbitrary neighborhood exist overlapping.
Illustratively, referring to Fig. 3, in the direction perpendicular to 21 place plane of planar inductor, two neighboring planar inductor
(the first planar inductor 211 and the second planar inductor 212) can further decrease the inductance that planar inductor is constituted there are overlapping
Shared area realizes the purpose for reducing integrated circuit area with this.
Optionally, the corresponding overlapping part current direction having the same of two planar inductors of arbitrary neighborhood.
When having a certain distance between adjacent planar inductor 21, mutual inductance can produce between planar inductor 21, when
The adjacent current direction having the same of planar inductor 21 (direction of I in Fig. 2), and the plane where perpendicular to planar inductor
When having overlapping region on direction, adjacent planar inductor 21 has the magnetic field of the same direction, passes through the magnetic flux of planar inductor 21
Amount will increase, and will increase the mutual inductance inductance value between planar inductor 21, and then increase total inductance value of the integrated inductance structure.
Optionally, at least two planar inductors include the first planar inductor and the second planar inductor, and functional module includes core
Piece and package substrate；First planar inductor is formed in the metal layer of chip, and the second planar inductor is formed in the gold of package substrate
Belong in layer.
Illustratively, as shown in figure 4, at least two planar inductors include the first planar inductor 211 and the second planar inductor
212, functional module includes chip 101 and package substrate 102；First planar inductor 211 is formed in the first metal layer of chip 101
In 201, the second planar inductor 212 is formed in the second metal layer 201 of package substrate 102.Wherein, chip can be upside-down mounting core
Piece, connecting component 30 can be the tin ball and/or copper post for being bonded flip-chip.As shown in figure 4,30 tin of connecting component
Ball forms connecting component 30 using the tin ball of fitting flip-chip, the thickness of connecting component 30 may make to be greater than 50 μm, at this point,
The distance between the first planar inductor 211 and the second planar inductor 212 can be made sufficiently large, the Q value of inductance can be effectively improved.
Based on the above-mentioned technical proposal, the embodiment of the present invention is respectively to the integrated inductance structure of Fig. 2 and the application shown in Fig. 3
Electromagnetic Simulation is carried out with existing single layer plane induction structure shown in fig. 5, simulation result is as shown in table 1.Wherein, the two institute
It is identical to account for area, and long and width is 0.9mm, the thickness of the planar inductor in the two is 20 μm, and the inductance value of the two is arranged
It is 4.3nH.Connecting component in the application with a thickness of 60 μm, the first planar inductor and the second planar inductor pass through interconnecting piece
Part series connection.
Table 1 is the inductance value and quality factor of inductance in the prior art and the present embodiment.
| Long (mm) | Wide (mm) | Area (mm2) | Inductance value (nH@1GHz) | Q value (@1GHz) | |
| The prior art | 0.9 | 0.9 | 0.81 | 4.3 | 43 |
| The present embodiment | 0.9 | 0.9 | 0.81 | 4.3 | 58 |
Note: the unit of inductance value is nH, and measurement frequency 1GHz, representation is nH@1GHz.Q value dimensionless, measurement frequency
For 1GHz, representation is@1GHz.
Referring to table 1, compared with induction structure in the prior art, the present embodiment can be in identical inductance area and electricity
Feel under inductance value, is more obviously improved so that the Q value of inductance has.
On the other hand, the embodiment of the invention provides a kind of integrated circuit, the collection provided including any embodiment of the present invention
At induction structure.
Integrated circuit provided in this embodiment includes integrated inductance structure provided by the above embodiment, function having the same
And beneficial effect, details are not described herein again.
Note that the above is only a better embodiment of the present invention and the applied technical principle.It will be appreciated by those skilled in the art that
The invention is not limited to the specific embodiments described herein, be able to carry out for a person skilled in the art it is various it is apparent variation,
It readjusts, be combined with each other and substitutes without departing from protection scope of the present invention.Therefore, although by above embodiments to this
Invention is described in further detail, but the present invention is not limited to the above embodiments only, is not departing from present inventive concept
In the case of, it can also include more other equivalent embodiments, and the scope of the invention is determined by the scope of the appended claims.
Claims (10)
1. a kind of integrated inductance structure characterized by comprising
At least two planar inductors, at least two planar inductor are cascading, and the different planar inductor shapes
At in the metal layer of different function module；
At least one connecting component, at least one described connecting component are set between the two neighboring functional module, and are appointed
The two neighboring planar inductor of anticipating is electrically connected by the connecting component.
2. integrated inductance structure according to claim 1, which is characterized in that at least two planar inductor series connection and/
Or it is in parallel.
3. integrated inductance structure according to claim 1, which is characterized in that the plane where perpendicular to the planar inductor
Direction on, arbitrary neighborhood two planar inductors exist overlapping.
4. integrated inductance structure according to claim 3, which is characterized in that arbitrary neighborhood two planar inductors are corresponding
Overlapping part current direction having the same.
5. integrated inductance structure according to claim 1, which is characterized in that the planar inductor is planar spiral structures.
6. integrated inductance structure according to claim 1, which is characterized in that the connecting component includes soldered ball and/or gold
Belong to column.
7. integrated inductance structure according to claim 1, which is characterized in that at least two planar inductor includes first
Planar inductor and the second planar inductor, the functional module include chip and package substrate；
First planar inductor is formed in the metal layer of the chip, and second planar inductor is formed in the encapsulation base
In the metal layer of plate.
8. integrated inductance structure according to claim 7, which is characterized in that the chip is flip-chip.
9. integrated inductance structure according to claim 8, which is characterized in that the connecting component be for be bonded it is described fall
The tin ball and/or copper post of cartridge chip.
10. a kind of integrated circuit, which is characterized in that including the integrated inductance structure as described in claim 1-9 is any.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910085845.8A CN109638000A (en) | 2019-01-29 | 2019-01-29 | A kind of integrated inductance structure and integrated circuit |
| US17/426,246 US20220093309A1 (en) | 2019-01-29 | 2019-05-24 | Integrated inductor structure and integrated circuit |
| JP2021544204A JP7398753B2 (en) | 2019-01-29 | 2019-05-24 | Integrated inductor structures and integrated circuits |
| PCT/CN2019/088229 WO2020155478A1 (en) | 2019-01-29 | 2019-05-24 | Integrated inductor structure and integrated circuit |
| KR1020217025147A KR20210111837A (en) | 2019-01-29 | 2019-05-24 | Integrated Inductor Structures and Integrated Circuits |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910085845.8A CN109638000A (en) | 2019-01-29 | 2019-01-29 | A kind of integrated inductance structure and integrated circuit |
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| CN109638000A true CN109638000A (en) | 2019-04-16 |
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| CN201910085845.8A Pending CN109638000A (en) | 2019-01-29 | 2019-01-29 | A kind of integrated inductance structure and integrated circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110247637A (en) * | 2019-07-09 | 2019-09-17 | 安徽安努奇科技有限公司 | A kind of filter circuit construction |
| WO2020155478A1 (en) * | 2019-01-29 | 2020-08-06 | 安徽安努奇科技有限公司 | Integrated inductor structure and integrated circuit |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2780546A1 (en) * | 1998-06-29 | 1999-12-31 | Memscap | MONOLITHIC INTEGRATED CIRCUIT COMPRISING A PLANE INDUCTANCE OR A PLANE TRANSFORMER, AND METHOD FOR MANUFACTURING SUCH A CIRCUIT |
| JP2003297939A (en) * | 2002-04-05 | 2003-10-17 | Innotech Corp | Semiconductor device |
| CN102169868A (en) * | 2011-02-22 | 2011-08-31 | 华东师范大学 | On-chip integrated inductor |
| CN108346642A (en) * | 2018-04-13 | 2018-07-31 | 安徽云塔电子科技有限公司 | A kind of inductance stacked structure |
| CN207993862U (en) * | 2018-04-13 | 2018-10-19 | 安徽云塔电子科技有限公司 | A kind of inductance stacked structure |
| CN209199923U (en) * | 2019-01-29 | 2019-08-02 | 安徽安努奇科技有限公司 | A kind of integrated inductance structure and integrated circuit |
-
2019
- 2019-01-29 CN CN201910085845.8A patent/CN109638000A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2780546A1 (en) * | 1998-06-29 | 1999-12-31 | Memscap | MONOLITHIC INTEGRATED CIRCUIT COMPRISING A PLANE INDUCTANCE OR A PLANE TRANSFORMER, AND METHOD FOR MANUFACTURING SUCH A CIRCUIT |
| JP2003297939A (en) * | 2002-04-05 | 2003-10-17 | Innotech Corp | Semiconductor device |
| CN102169868A (en) * | 2011-02-22 | 2011-08-31 | 华东师范大学 | On-chip integrated inductor |
| CN108346642A (en) * | 2018-04-13 | 2018-07-31 | 安徽云塔电子科技有限公司 | A kind of inductance stacked structure |
| CN207993862U (en) * | 2018-04-13 | 2018-10-19 | 安徽云塔电子科技有限公司 | A kind of inductance stacked structure |
| CN209199923U (en) * | 2019-01-29 | 2019-08-02 | 安徽安努奇科技有限公司 | A kind of integrated inductance structure and integrated circuit |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020155478A1 (en) * | 2019-01-29 | 2020-08-06 | 安徽安努奇科技有限公司 | Integrated inductor structure and integrated circuit |
| CN110247637A (en) * | 2019-07-09 | 2019-09-17 | 安徽安努奇科技有限公司 | A kind of filter circuit construction |
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