CN109637487A - A kind of gated sweep driving circuit and liquid crystal display device - Google Patents
A kind of gated sweep driving circuit and liquid crystal display device Download PDFInfo
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- CN109637487A CN109637487A CN201910077847.2A CN201910077847A CN109637487A CN 109637487 A CN109637487 A CN 109637487A CN 201910077847 A CN201910077847 A CN 201910077847A CN 109637487 A CN109637487 A CN 109637487A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
Abstract
The present invention proposes a kind of gated sweep driving circuit and liquid crystal display device, is related to liquid crystal panel field.The gate driving circuit includes pulling up control module, pull-up module, maintain control node generation module, pull-up control node maintenance module and emptying module to be connected and pull-up control node.Wherein, the maintenance control node generation module input of the n-th stage drive circuit unit is positive and negative sweeps control signal, preceding two-stage clock signal and rear two-stage clock signal；When forward scan, it is described it is positive and negative sweep control signal it is identical as the timing of the preceding two-stage clock signal；When reverse scan, described positive and negative to sweep control signal identical as the timing of two-stage clock signal afterwards.The short problem of the circuit lifetime that this gated sweep driving circuit can effectively improve forward and reverse scanning.
Description
Technical field
The invention belongs to liquid crystal panel fields, and in particular to a kind of gated sweep driving circuit and liquid crystal display device.
Background technique
Current liquid crystal display panel generally can be equipped with gated sweep driving electricity in the left and right sides of viewing area in design
Road, wherein driving circuit can include forward and reverse scanning interlock circuit, have the function of forward scan and reverse scan.
It is a kind of schematic diagram of existing two-way gated sweep driving circuit, the gated sweep driving circuit packet shown in Fig. 1
It includes other modules and maintains control node generation module 3, be the circuit amplification for maintaining control node generation module 3 as shown in Figure 2
Schematic diagram, wherein the forward scan control that the scanning direction of the gated sweep driving circuit passes through maintenance control node generation module 3
Signal U2D processed and reverse scan control signal D2U this pair of mutually opposing constant voltage signal are controlled.
Fig. 3 a is the time diagram of forward scan, and Fig. 3 b is the time diagram of reverse scan, such as Fig. 3 a and Fig. 3 b institute
Show, in forward scan, forward scan control signal U2D maintains always high level level VGH, and reverse scan controls signal
D2U maintains always low level level VGL；In reverse scan, forward scan control signal U2D maintains always low level standard
Position VGL, reverse scan control signal D2U maintain always high level level VGH.
In actual use, because prolonged forward scan or reverse scan, U2D and D2U president's time maintain
In fixed voltage state, the 5th thin film transistor (TFT) M5 and the 7th thin film transistor (TFT) M7 is caused to generate TFT characteristic variations.Such as first
The forward scan control signal U2D of long-time forward scan, the 5th thin film transistor (TFT) M5 is for a long time high level, TFT characteristic
Can impacted deviation design value, cause the 5th thin film transistor (TFT) M5 can not normal switching-off, reversely swept again in this case
It retouches, then maintains the voltage of control node Bn to control signal U2D by forward scan when reverse scan and drag down, lead to the 8th film crystal
Pipe M8 can not be opened, and drag down the voltage for pulling up control node An can not, the tenth thin film transistor (TFT) M10 is caused not close normally
It closes, clock signal CKm is output to gated sweep signal Gn, eventually leads to gated sweep signal Gn output abnormality.
Summary of the invention
The present invention provides a kind of gated sweep driving circuit and liquid crystal display device, and this gated sweep driving circuit can
Effectively improve the short problem of the circuit lifetime of forward and reverse scanning.
Technical scheme is as follows:
The invention discloses a kind of gated sweep driving circuits, including N(N > 4, and N is positive integer) stage drive circuit unit；N-th
(1≤n≤N) stage drive circuit unit includes pull-up control module, pull-up module, maintains control node generation module, pull-up control
Node maintenance module processed empties module, supplementary module and output maintenance module.
It pulls up control module, pull-up module, maintain control node generation module, pull-up control node maintenance module and clear
Empty module is connected and pull-up control node；It maintains control node generation module, pull-up control node maintenance module, empty mould
Block, supplementary module and output maintenance module input constant pressure low level in the particular job time；Pull-up module, empty module with
And output maintenance module is connected to the same level scan signal line, scan signal line exports scanning signal；Control node is maintained to generate
It module, pull-up control node maintenance module and empties module and is connected to maintenance control node.
Wherein, the maintenance control node generation module input of the n-th stage drive circuit unit is positive and negative sweeps control signal, preceding two-stage
Clock signal and rear two-stage clock signal；When forward scan, positive and negative sweep controls signal and the preceding two-stage clock signal
Timing it is identical；When reverse scan, described positive and negative to sweep control signal identical as the timing of two-stage clock signal afterwards.
Preferably, the maintenance control node generation module of the n-th stage drive circuit unit includes the 5th thin film transistor (TFT), the 6th
Thin film transistor (TFT), the 7th thin film transistor (TFT), the 16th thin film transistor (TFT) and the 26th thin film transistor (TFT).
Two-stage clock signal, the control terminal of the 7th thin film transistor (TFT) are defeated before the control terminal of 5th thin film transistor (TFT) inputs
Enter rear two-stage clock signal, the first path terminal of the 5th thin film transistor (TFT) and the first path terminal of the 7th thin film transistor (TFT) are all connected with
In maintaining control node, the alternate path end of the 5th thin film transistor (TFT) is connected and equal with the alternate path end of the 7th thin film transistor (TFT)
It is connected to and positive and negative sweeps control signal.
The control terminal input pull-up control node of 6th thin film transistor (TFT), the two paths end difference of the 6th thin film transistor (TFT)
Connection maintains control node and constant pressure low level；Level Four scanning signal or first before the control terminal of 16th thin film transistor (TFT) inputs
Enabling signal, the two paths end of the 16th thin film transistor (TFT), which is separately connected, maintains control node and constant pressure low level；20th
Level Four scanning signal or the second enabling signal after the control terminal input of six thin film transistor (TFT)s, two of the 26th thin film transistor (TFT)
Path terminal, which is separately connected, maintains control node and constant pressure low level.
Preferably, the pull-up control module of the n-th stage drive circuit unit includes first film transistor and the 9th film
Transistor.
Level Four scanning signal or the first enabling signal, first film transistor before the control terminal of first film transistor inputs
Two paths end be separately connected pull-up control node and forward scan control signal；The control terminal of 9th thin film transistor (TFT) inputs
Level Four scanning signal or the second enabling signal afterwards, the two paths end of the 9th thin film transistor (TFT) be separately connected pull-up control node and
Reverse scan controls signal.
Preferably, the pull-up module of the n-th stage drive circuit unit includes the tenth thin film transistor (TFT)；Tenth thin film transistor (TFT)
Control terminal connection pull-up control node, the two paths end of the tenth thin film transistor (TFT) is separately connected the same level clock signal and the same level is swept
Retouch signal wire.
Preferably, the pull-up control node maintenance module of the n-th stage drive circuit unit includes the 8th thin film transistor (TFT)；8th
The control terminal input of thin film transistor (TFT) maintains control node, and the two paths end of the 8th thin film transistor (TFT) is connected to pull-up control
Node processed and constant pressure low level.
Preferably, the module that empties of the n-th stage drive circuit unit includes the second film transistor, third film transistor and the
12 film transistors.
The control terminal of second film transistor inputs empty signal, and the two paths end of the second film transistor is connected to
Draw control node and constant pressure low level；The control terminal of third film transistor inputs empty signal, and two of third film transistor are logical
Terminal, which is connected to, maintains control node and constant pressure low level；The control terminal of 12nd thin film transistor (TFT) inputs empty signal,
The two paths end of 12nd thin film transistor (TFT) is connected to the same level scan signal line and constant pressure low level.
Preferably, the supplementary module of the n-th stage drive circuit unit includes that the 14th film transistor and the 24th film are brilliant
Body pipe.
Control terminal the first enabling signal of input or constant pressure low level of 14th film transistor, the two of the 14th film transistor
A path terminal is connected to pull-up control node and constant pressure low level；The control terminal input second of 24th thin film transistor (TFT)
Enabling signal or constant pressure low level, the two paths end of the 24th thin film transistor (TFT) are connected to pull-up control node and perseverance
Force down level.
Preferably, the output maintenance module of the n-th stage drive circuit unit includes the 11st film transistor；11st film is brilliant
Level Four clock signal after the control terminal input of body pipe, the two paths end of the 11st thin film transistor (TFT) are connected to the same level scanning
Signal wire and constant pressure low level.
The invention also discloses a kind of liquid crystal display devices, drive electricity including gated sweep described in above-mentioned any one
Road.
Technical solution provided by the invention has the advantages that
On the basis of realizing the normal function of original circuit, it can guarantee the 5th thin film transistor (TFT) and the 7th thin film transistor (TFT)
Path terminal is for a long time no longer fixed voltage, solves the problems, such as that the positive and negative scanning circuit service life is short.
Detailed description of the invention
Below by clearly understandable mode, preferred embodiment is described with reference to the drawings, the present invention is given furtherly
It is bright.
Fig. 1 is the schematic diagram of two-way gated sweep driving circuit in the prior art；
Fig. 2 is the circuit enlarged diagram for maintaining control node generation module in the prior art；
Fig. 3 a is the time diagram of forward scan；
Fig. 3 b is the time diagram of reverse scan；
Fig. 4 is the simplification module diagram of gated sweep driving circuit of the invention；
Fig. 5 is the schematic diagram of gated sweep driving circuit of the invention.
Specific embodiment
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, Detailed description of the invention will be compareed below
A specific embodiment of the invention.It should be evident that drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing, and obtain other embodiments.
To make simplified form, part related to the present invention is only schematically shown in each figure, they are not represented
Its practical structures as product.In addition, there is identical structure or function in some figures so that simplified form is easy to understand
Component only symbolically depicts one of those, or has only marked one of those.Herein, "one" is not only indicated
" only this ", can also indicate the situation of " more than one ".
Technical solution of the present invention is discussed in detail with specific embodiment below.
The present invention provides a kind of gated sweep driving circuit, including N(N > 4, and N is positive integer) stage drive circuit unit；
As shown in figure 4, the n-th (1≤n≤N) stage drive circuit unit includes pull-up control module 1, pull-up module 2, maintains control node
Generation module 3, pull-up control node maintenance module 4 empty module 5, supplementary module 6 and output maintenance module 7.
Pull up control module 1, pull-up module 2, maintain control node generation module 3, pull-up control node maintenance module 4 with
And it empties module 5 and is connected to pull-up control node An；Maintain control node generation module 3, pull-up control node maintenance module
4, module 5, supplementary module 6 and output maintenance module 7 are emptied and inputs constant pressure low level VSS in the particular job time；Pull-up
Module 2 empties module 5 and output maintenance module 7 is connected to the same level scan signal line Gn, scan signal line output scanning letter
Number；It maintains control node generation module 3, pull up control node maintenance module 4 and empties module 5 to be connected to maintain control section
Point Bn；
Wherein, the maintenance control node generation module 3 of the n-th stage drive circuit unit inputs positive and negative sweep and controls signal UDm, preceding two-stage
Clock signal CKm-2 and rear two-stage clock signal CKm+2.
When forward scan, it is described it is positive and negative sweep control signal UDm it is identical as the timing of the preceding two-stage clock signal CKm-2；
When reverse scan, described positive and negative to sweep control signal UDm identical as the timing of two-stage clock signal CKm+2 afterwards.
Fig. 5 is the schematic diagram of gated sweep driving circuit of the invention, wherein the maintenance control of the n-th stage drive circuit unit
Node creation module 3 processed includes the 5th thin film transistor (TFT) M5, the 6th thin film transistor (TFT) M6, the 7th thin film transistor (TFT) M7, the 16th
Thin film transistor (TFT) M16 and the 26th thin film transistor (TFT) M26.
Two-stage clock signal CKm-2, the 7th thin film transistor (TFT) M7 before the control terminal of the 5th thin film transistor (TFT) M5 inputs
Control terminal input after two-stage clock signal CKm+2, the 5th thin film transistor (TFT) M5 the first path terminal and the 7th thin film transistor (TFT)
The first path terminal of M7 is all connected to maintain control node netBn, the alternate path end of the 5th thin film transistor (TFT) M5 and the 7th thin
The alternate path end of film transistor M7, which is connected and is all connected to positive and negative sweep, controls signal UDm.
The control terminal of 6th thin film transistor (TFT) M6, which inputs, pulls up control node netAn, and two of the 6th thin film transistor (TFT) M6
Path terminal, which is separately connected, maintains control node netBn and constant pressure low level VSS.
The two paths end of 16th thin film transistor (TFT) M16, which is separately connected, maintains control node netBn and constant pressure low level
VSS；As n≤2, the control terminal of the 16th thin film transistor (TFT) M16 inputs the first enabling signal GSP1；As n > 2, the 16th
Level Four scanning signal Gn-4 before the control terminal of thin film transistor (TFT) M16 inputs.
The two paths end of 26th thin film transistor (TFT) M26, which is separately connected, maintains control node netBn and the low electricity of constant pressure
Flat VSS；As n≤N-2, level Four scanning signal Gn+4 after the control terminal input of the 26th thin film transistor (TFT) M26；As n > N-2
When, the control terminal of the 26th thin film transistor (TFT) M26 inputs the second enabling signal GSP2.
Wherein, the pull-up control module 1 of the n-th stage drive circuit unit includes first film transistor M1 and the 9th film
Transistor M9.
The two paths end of first film transistor M1 is separately connected pull-up control node netAn and forward scan control letter
Number U2D；As n≤2, the control terminal of first film transistor M1 inputs the first enabling signal GSP1；As n > 2, the first film
Level Four scanning signal Gn-4 before the control terminal of transistor M1 inputs.
The two paths end of 9th thin film transistor (TFT) M9 is separately connected pull-up control node netAn and reverse scan control letter
Number D2U；As n≤N-2, level Four scanning signal Gn+4 after the control terminal input of the 9th thin film transistor (TFT) M9；As n > N-2, the
The control terminal of nine thin film transistor (TFT) M9 inputs the second enabling signal GSP2.
Wherein, the pull-up module of the n-th stage drive circuit unit includes the tenth thin film transistor (TFT) M10；Tenth thin film transistor (TFT)
The control terminal connection pull-up control node netAn of M10, when the two paths end of the tenth thin film transistor (TFT) M10 is separately connected the same level
Clock signal CKm and the same level scanning signal Gn.
Wherein, the pull-up control node maintenance module 4 of the n-th stage drive circuit unit includes the 8th thin film transistor (TFT) M8；The
The control terminal input of eight thin film transistor (TFT) M8 maintains control node netBn, the two paths end difference of the 8th thin film transistor (TFT) M8
It is connected to pull-up control node netAn and constant pressure low level VSS.
Wherein, the n-th stage drive circuit unit empty module 5 include the second film transistor M2, third film transistor M3 with
And the 12nd film transistor M12.
The control terminal of second film transistor M2 inputs empty signal CLR, the two paths end difference of the second film transistor M2
It is connected to pull-up control node netAn and constant pressure low level VSS.
The control terminal of third film transistor M3 inputs empty signal CLR, the two paths end difference of third film transistor M3
It is connected to and maintains control node netBn and constant pressure low level VSS.
The control terminal of 12nd thin film transistor (TFT) M12 inputs empty signal CLR, and two of the 12nd thin film transistor (TFT) M12
Path terminal is connected to the same level scan signal line Gn and constant pressure low level VSS.
Wherein, the supplementary module 6 of the n-th stage drive circuit unit includes the 14th film transistor M14 and the 24th film
Transistor M24.
The two paths end of 14th film transistor M14 is connected to pull-up control node netAn and constant pressure low level
VSS；As n≤3, the control terminal of the 14th film transistor M14 inputs constant pressure low level VSS, as n > 3, the 14th film crystal
The control terminal of pipe M14 inputs the first enabling signal GSP1.
The two paths end of 24th thin film transistor (TFT) M24 is connected to pull-up control node netAn and constant pressure is low
Level VSS；As n≤N-3, the control terminal of the 24th thin film transistor (TFT) M24 inputs the second enabling signal GSP2, as n > N-3
When, the control terminal of the 24th thin film transistor (TFT) M24 inputs constant pressure low level VSS.
Wherein, the output maintenance module 7 of the n-th stage drive circuit unit includes the 11st film transistor M11.
Level Four clock signal CKm+4 after the control terminal input of 11st thin film transistor (TFT) M11, the 11st thin film transistor (TFT)
The two paths end of M11 is connected to the same level scan signal line Gn and constant pressure low level VSS.
The invention further relates to a kind of liquid crystal display devices, including above-mentioned gated sweep driving circuit.
The present invention controls signal UDm, preceding two-stage clock signal by the way that control node generation module 3 will be maintained to input positive and negative sweep
CKm-2 and rear two-stage clock signal CKm+2, so that positive and negative sweep controls signal UDm and the preceding two-stage when forward scan
The timing of clock signal CKm-2 is identical；When reverse scan, positive and negative sweep controls signal UDm and the rear two-stage clock signal
The timing of CKm+2 is identical.In this way on the basis of realizing the normal function of original circuit, the 5th thin film transistor (TFT) M5 also can guarantee
It is no longer for a long time fixed voltage with the path terminal of the 7th thin film transistor (TFT) M7, solving the positive and negative scanning circuit service life short asks
Topic.
It should be noted that the above is only a preferred embodiment of the present invention, but the present invention is not limited to above-mentioned
Detail in embodiment, it is noted that for those skilled in the art, in technology of the invention
In conception range, various improvements and modifications may be made without departing from the principle of the present invention, to technology of the invention
Scheme carries out a variety of equivalents, these are improved, retouching and equivalents also should be regarded as protection scope of the present invention.
Claims (9)
1. a kind of gated sweep driving circuit, which is characterized in that including N(N > 4, and N is positive integer) stage drive circuit unit；The
N(1≤n≤N) stage drive circuit unit include pull-up control module, pull-up module, maintain control node generation module, pull-up control
Node maintenance module processed empties module, supplementary module and output maintenance module；
Pull-up control module, pull-up module maintain control node generation module, pull-up control node maintenance module and empty mould
Block is connected and pull-up control node；Control node generation module is maintained, pull-up control node maintenance module, module is emptied, is auxiliary
Module and output maintenance module is helped to input constant pressure low level in the particular job time；Pull-up module empties module and defeated
Maintenance module is connected to the same level scan signal line out, and scan signal line exports scanning signal；Maintenance control node generation module,
It pulls up control node maintenance module and empties module and be connected to maintenance control node；
Wherein, the maintenance control node generation module input of the n-th stage drive circuit unit is positive and negative sweeps control signal, preceding two-stage clock
Signal and rear two-stage clock signal；
When forward scan, it is described it is positive and negative sweep control signal it is identical as the timing of the preceding two-stage clock signal；
When reverse scan, described positive and negative to sweep control signal identical as the timing of two-stage clock signal afterwards.
2. a kind of gated sweep driving circuit according to claim 1, which is characterized in that the n-th stage drive circuit unit
To maintain control node generation module include the 5th thin film transistor (TFT), the 6th thin film transistor (TFT), the 7th thin film transistor (TFT), the 16th thin
Film transistor and the 26th thin film transistor (TFT)；
Two-stage clock signal before the control terminal of 5th thin film transistor (TFT) inputs, after the control terminal input of the 7th thin film transistor (TFT)
Two-stage clock signal, the first path terminal of the 5th thin film transistor (TFT) and the first path terminal of the 7th thin film transistor (TFT) are all connected to tie up
Control node is held, the alternate path end of the 5th thin film transistor (TFT) is connected and is all connected with the alternate path end of the 7th thin film transistor (TFT)
Control signal is swept in positive and negative；
The control terminal input pull-up control node of 6th thin film transistor (TFT), the two paths end of the 6th thin film transistor (TFT) is separately connected
Maintain control node and constant pressure low level；
Level Four scanning signal or the first enabling signal, the 16th thin film transistor (TFT) before the control terminal of 16th thin film transistor (TFT) inputs
Two paths end be separately connected and maintain control node and constant pressure low level；
Level Four scanning signal or the second enabling signal after the control terminal input of 26th thin film transistor (TFT), the 26th film are brilliant
The two paths end of body pipe, which is separately connected, maintains control node and constant pressure low level.
3. a kind of gated sweep driving circuit according to claim 1, which is characterized in that the n-th stage drive circuit unit
Pulling up control module includes first film transistor and the 9th thin film transistor (TFT)；
Level Four scanning signal or the first enabling signal before the control terminal of first film transistor inputs, the two of first film transistor
A path terminal is separately connected pull-up control node and forward scan control signal；
Level Four scanning signal or the second enabling signal after the control terminal input of 9th thin film transistor (TFT), the two of the 9th thin film transistor (TFT)
A path terminal is separately connected pull-up control node and reverse scan control signal.
4. a kind of gated sweep driving circuit according to claim 1, which is characterized in that the n-th stage drive circuit unit
Pull-up module includes the tenth thin film transistor (TFT)；
The control terminal connection pull-up control node of tenth thin film transistor (TFT), the two paths end of the tenth thin film transistor (TFT) is separately connected
The same level clock signal and the same level scan signal line.
5. a kind of gated sweep driving circuit according to claim 1, which is characterized in that the n-th stage drive circuit unit
Pulling up control node maintenance module includes the 8th thin film transistor (TFT)；
The control terminal input of 8th thin film transistor (TFT) maintains control node, and the two paths end of the 8th thin film transistor (TFT) is separately connected
In pull-up control node and constant pressure low level.
6. a kind of gated sweep driving circuit according to claim 1, which is characterized in that the n-th stage drive circuit unit
Emptying module includes the second film transistor, third film transistor and the 12nd film transistor；
The control terminal of second film transistor inputs empty signal, and the two paths end of the second film transistor is connected to pull-up control
Node processed and constant pressure low level；
The control terminal of third film transistor inputs empty signal, and the two paths end of third film transistor is connected to maintenance control
Node processed and constant pressure low level；
The control terminal of 12nd thin film transistor (TFT) inputs empty signal, and the two paths end of the 12nd thin film transistor (TFT) is separately connected
In the same level scan signal line and constant pressure low level.
7. a kind of gated sweep driving circuit according to claim 1, which is characterized in that the n-th stage drive circuit unit
Supplementary module includes the 14th film transistor and the 24th film transistor；
The control terminal of 14th film transistor inputs the first enabling signal or constant pressure low level, and two of the 14th film transistor are logical
Terminal is connected to pull-up control node and constant pressure low level；
The control terminal of 24th thin film transistor (TFT) inputs the second enabling signal or constant pressure low level, the 24th thin film transistor (TFT)
Two paths end be connected to pull-up control node and constant pressure low level.
8. a kind of gated sweep driving circuit according to claim 1, which is characterized in that the n-th stage drive circuit unit
Exporting maintenance module includes the 11st film transistor；
Level Four clock signal after the control terminal input of 11st thin film transistor (TFT), the two paths end point of the 11st thin film transistor (TFT)
It is not connected to the same level scan signal line and constant pressure low level.
9. a kind of liquid crystal display device, which is characterized in that driven including gated sweep described in the claims 1-8 any one
Dynamic circuit.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102831867A (en) * | 2012-07-26 | 2012-12-19 | 北京大学深圳研究生院 | Grid driving unit circuit, grid driving circuit of grid driving unit circuit, and display |
| CN102956186A (en) * | 2012-11-02 | 2013-03-06 | 京东方科技集团股份有限公司 | Shift register, grid drive circuit and liquid crystal display |
| TW201314653A (en) * | 2011-09-23 | 2013-04-01 | Hydis Tech Co Ltd | Shift register and gate driving circuit using the same |
| US20160071614A1 (en) * | 2014-09-05 | 2016-03-10 | Lg Display Co., Ltd. | Shift register and display device using the same |
| US20160189647A1 (en) * | 2014-12-30 | 2016-06-30 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Goa circuit applied to liquid crystal display device |
| CN106448585A (en) * | 2016-09-23 | 2017-02-22 | 南京华东电子信息科技股份有限公司 | Grid electrode driving circuit with forward and reverse scanning function |
-
2019
- 2019-01-28 CN CN201910077847.2A patent/CN109637487B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201314653A (en) * | 2011-09-23 | 2013-04-01 | Hydis Tech Co Ltd | Shift register and gate driving circuit using the same |
| CN102831867A (en) * | 2012-07-26 | 2012-12-19 | 北京大学深圳研究生院 | Grid driving unit circuit, grid driving circuit of grid driving unit circuit, and display |
| CN102956186A (en) * | 2012-11-02 | 2013-03-06 | 京东方科技集团股份有限公司 | Shift register, grid drive circuit and liquid crystal display |
| US20160071614A1 (en) * | 2014-09-05 | 2016-03-10 | Lg Display Co., Ltd. | Shift register and display device using the same |
| US20160189647A1 (en) * | 2014-12-30 | 2016-06-30 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Goa circuit applied to liquid crystal display device |
| CN106448585A (en) * | 2016-09-23 | 2017-02-22 | 南京华东电子信息科技股份有限公司 | Grid electrode driving circuit with forward and reverse scanning function |
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| CN109637487B (en) | 2020-12-22 |
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Effective date of registration: 20200827 Address after: No.7 Tianyou Road, Qixia District, Nanjing City, Jiangsu Province Applicant after: NANJING CEC PANDA FPD TECHNOLOGY Co.,Ltd. Address before: Nanjing Crystal Valley Road in Qixia District of Nanjing City Tianyou 210033 Jiangsu province No. 7 Applicant before: NANJING CEC PANDA FPD TECHNOLOGY Co.,Ltd. Applicant before: NANJING CEC PANDA LCD TECHNOLOGY Co.,Ltd. Applicant before: Nanjing East China Electronic Information Technology Co.,Ltd. |
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