CN109634879A - A kind of PCIE pinboard and monitoring system server - Google Patents
A kind of PCIE pinboard and monitoring system server Download PDFInfo
- Publication number
- CN109634879A CN109634879A CN201811543900.5A CN201811543900A CN109634879A CN 109634879 A CN109634879 A CN 109634879A CN 201811543900 A CN201811543900 A CN 201811543900A CN 109634879 A CN109634879 A CN 109634879A
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- bmc chip
- bmc
- chip
- pcie
- pinboard
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
- G06F13/126—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine and has means for transferring I/O instructions and statuses between control unit and main processor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
Abstract
The invention discloses a kind of PCIE pinboard and monitoring system server, which includes: board main body, is configured to be plugged into mainboard；With the first BMC chip, it is mounted in board main body, and it is configured to be connected with muti-piece GPU board and passes through bus bar with the second BMC chip on mainboard, wherein, the first BMC chip is configured to the relevant information of monitoring PCIE pinboard and muti-piece GPU board and shares relevant information with the second BMC chip.The present invention obtains information relevant to GPU using the independent BMC chip on PCIE pinboard, can in more detail, comprehensively monitor the information such as GPU chip, GPU pinboard, GPU VR chip status, temperature；A part of information of the BMC chip of the BMC chip of mainboard and PCIE pinboard difference monitoring system, there are many buses to connect between two BMC chips, therefore the shared of monitoring information may be implemented；PCIE pinboard as relatively independent system can independent shipment, realize hardware modularity.
Description
Technical field
The present invention relates to server monitoring technical fields, more specifically, particularly relating to a kind of PCIE pinboard and server
Monitoring system.
Background technique
Server stores more and more information, the stable operation of server as the hardware foundation in network environment
It becomes more and more important.Server has the mechanism of monitoring self-operating state, and wherein core component is exactly BMC (Baseboard
Management Controller, baseboard management controller), as baseboard management controller, BMC can monitor MB (Main
Board, mainboard) and system temperature, voltage, CPU, memory, disk state, board information, regulate and control fan, display system shape
State realizes remote access etc., ensures the stable operation of server.
Currently, GPU is in AI (Artificial Intelligence, artificial intelligence) calculating, deep learning, data mining
Etc. performance ratio CPU it is with the obvious advantage, so having a GPU configuration now in server.GPU is in independent board mostly
On, and the mainboard with CPU separate, due to the PCIE limited amount of CPU, when supporting 8,16 or more GPU, just
PCIE switching chip can be used to extend PCIE, multiple GPU chips are connected by PCIE pinboard.GPU and GPU interconnected communication core
The operating status of piece is also required to monitor in real time by BMC, further needs exist for BMC and realizes update firmware, controls the power supply VR of GPU
The functions such as (conversion of Voltage Regulator voltage) chip.However, in the system of this usually only one piece cpu motherboard,
Also only one BMC chip monitors the state of whole system, the network interface of only one external monitoring management, other than mainboard
Other boards are that I2C or other control signals are taken over by cable or connector, read GPU or other PCIe cards
Information.Since board quantity is more in system, between board in hardware link interconnection protocol limited amount, a therefore BMC
When chip obtains information by I2C or other agreements, cabling is very long, cannot comprehensively obtain monitoring information.
In view of the above-mentioned defects in the prior art, this field urgently needs one kind that can in more detail, comprehensively monitor and GPU phase
The scheme for all information closed.
Summary of the invention
In view of this, the purpose of the embodiment of the present invention is to propose a kind of PCIE pinboard and monitoring system server, energy
Enough solve the prior art is caused using other boards (GPU board, PCIe pinboard etc.) of the BMC monitoring of mainboard other than mainboard
Cabling is too long, obtains the infull problem of information.
Based on above-mentioned purpose, the one side of the embodiment of the present invention provides a kind of PCIE pinboard, comprising:
Board main body is configured to be plugged into mainboard；With
First BMC chip is mounted in board main body, and be configured to be connected with muti-piece GPU board and on mainboard
The second BMC chip by bus bar,
Wherein, the first BMC chip is configured to the relevant information of monitoring PCIE pinboard and muti-piece GPU board and with second
BMC chip shares relevant information.
In some embodiments, the first BMC chip be additionally configured to monitoring power supply status, control fan, monitoring be plugged in
The status information of network interface card or IB card on the PCIE slot of mainboard.
In some embodiments, the PCIE pinboard further include:
First multiple selector, be configured to respectively with the second multichannel on the first BMC chip, RJ45 network interface and mainboard
Selector is connected, and for selecting the second BMC chip of path or access for accessing the first BMC chip by RJ45 network interface
Path.
In some embodiments, the first BMC chip is configured to I2C bus, UART bus or SGPIO bus
It is interconnected with the second BMC chip.
Based on above-mentioned purpose, the another aspect of the embodiment of the present invention additionally provides a kind of monitoring system server, comprising:
First BMC chip is mounted in the board main body of PCIE pinboard and is connected with muti-piece GPU board, board main body
It is plugged into mainboard；With
Second BMC chip is mounted on mainboard and passes through bus bar with the first BMC chip, wherein the first BMC core
Piece is configured to the relevant information of monitoring PCIE pinboard and muti-piece GPU board and shares relevant information with the second BMC chip.
In some embodiments, the first BMC chip be additionally configured to monitoring power supply status, control fan, monitoring be plugged in
The status information of network interface card or IB card on the PCIE slot of mainboard.
In some embodiments, the monitoring system server further include:
First multiple selector, be mounted in the board main body of PCIE pinboard and respectively with the first BMC chip and
One RJ45 network interface is connected；With
Second multiple selector is mounted on mainboard and is connected respectively with the second BMC chip and the 2nd RJ45 network interface,
Wherein, the first multiple selector is connected with the second multiple selector.
In some embodiments, the first multiple selector and the second multiple selector be configured to make the first RJ45 network interface with
Access is formed between first BMC chip and makes to form access between the 2nd RJ45 network interface and the second BMC chip.
In some embodiments, the first multiple selector and the second multiple selector be configured to make the first RJ45 network interface with
Access is formed between second BMC chip or makes to form access between the 2nd RJ45 network interface and the second BMC chip.
In some embodiments, the first BMC chip and the second BMC chip by I2C bus, UART bus or
SGPIO bus bar.
The present invention has following advantageous effects: a kind of PCIE pinboard and server prison provided in an embodiment of the present invention
Control system obtains information relevant to GPU using the independent BMC chip on PCIE pinboard, can in more detail, comprehensively monitor
The information such as GPU chip, GPU pinboard, GPU VR chip status, temperature；The BMC chip of mainboard and the BMC core of PCIE pinboard
Piece distinguishes a part of information of monitoring system, and there are many buses to connect between two BMC chips, therefore monitoring information may be implemented
It is shared；PCIE pinboard and mainboard respectively as relatively independent system can independent shipment, realize hardware modularity.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
Other embodiments are obtained according to these attached drawings.
Fig. 1 is the schematic block diagram according to the PCIE pinboard of one embodiment of the invention；And
Fig. 2 is the schematic block diagram according to the monitoring system server of one embodiment of the invention.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with specific embodiment, and reference
The embodiment of the present invention is further described in attached drawing.
It should be noted that all statements for using " first ", " second " etc. are for distinguishing in the embodiment of the present invention
The non-equal entity of two or more same names or non-equal parameter, it is seen that " first ", " second " etc. are only for statement
Convenience, should not be construed as the restriction to the embodiment of the present invention, subsequent embodiment no longer illustrates this one by one.
Based on above-mentioned purpose, the first aspect of the embodiment of the present invention proposes an a kind of implementation of PCIE pinboard
Example.Shown in fig. 1 is the schematic block diagram of the PCIE pinboard.
As shown in fig. 1, which mainly includes board main body 101 and the first BMC chip 102.Comprising more
In the system of a GPU, which interconnect the PCIE resource of each GPU and CPU in the PCIE resource of extension CPU.
When in use, board main body 101 is plugged into mainboard.First BMC chip 102 is mounted in board main body 101, be configured to
Muti-piece GPU board is connected and with the second BMC chip (not shown) on mainboard by bus bar, for example, the first BMC chip
102 and second BMC chip can pass through I2C bus, UART bus and SGPIO bus at least one interconnection.First
BMC chip 102 is configurable to the relevant information of monitoring PCIE pinboard and muti-piece GPU board and shares with the second BMC chip
Relevant information.Specifically, the first BMC chip 102 is configurable to monitoring PCIE pinboard and the temperature on GPU board, electricity
Pressure, GPU state information, the status information of GPU NvLink Switch, and can be with burning phase by the first BMC chip 102
Close the firmware of chip.In addition, power-supply unit (power supply unit, PSU), fan, PCIE slot are transferred from PCIE
Plate is closer, can also be plugged in by the first BMC chip 102 of PCIE pinboard monitoring power supply status, control fan, monitoring
The status information of network interface card or IB card on the PCIE slot of mainboard.
PCIE pinboard and GPU board may be implemented in first BMC chip 102 of the PCIE pinboard of the embodiment of the present invention
Independent monitoring function, by the way that independent first BMC chip 102 can be passed through in the system of the multiple GPU of PCIE pinboard band
The relevant information of GPU is obtained, monitors the information such as GPU chip, GPU switch, GPU VR chip status, temperature in more detail.It is main
The BMC chip of plate and the BMC chip of PCIE pinboard distinguish a part of information of monitoring system, reserve between two BMC chips
A variety of bus connections, therefore the shared of monitoring information may be implemented.PCIE pinboard can be independent as relatively independent system
Hardware modularity is realized in shipment.
In a preferred embodiment, which can also include the first multiple selector (MUX) (not shown).
First multiple selector is connected with the second multiple selector on the first BMC chip 102, RJ45 network interface and mainboard respectively, and
And for selecting to access the path of the first BMC chip by the RJ45 network interface or accessing the path of the second BMC chip.It is specific and
Speech selects, Yong Huke by the on-off of the first multiple selector on PCIE pinboard and the second multiple selector on mainboard
To select to access the first BMC chip on PCIE pinboard by the RJ45 network interface or pass through the RJ45 network interface to access on mainboard
The second BMC chip.
Based on above-mentioned purpose, the second aspect of the embodiment of the present invention proposes one of a kind of monitoring system server
Embodiment.Fig. 2 shows be the monitoring system server schematic block diagram.
As shown in Figure 2, which is mainly used in the system by the multiple GPU of PCIE pinboard band
In.In the system comprising multiple GPU, which makes each GPU's and CPU in the PCIE resource of extension CPU
The interconnection of PCIE resource.The monitoring system server may include the first BMC chip 201 and the second BMC chip 203.First BMC core
Piece 201 is mounted in the board main body 202 of PCIE pinboard and is connected with multiple GPU boards, and board main body 202 is plugged into mainboard
204.Second BMC chip 203 is mounted on mainboard 204 and with the first BMC chip 201 by bus bar, for example, first
BMC chip 201 and the second BMC chip 203 can pass through at least one of I2C bus, UART bus and SGPIO bus
Interconnection.First BMC chip 201 be configurable to monitoring PCIE pinboard and muti-piece GPU board relevant information and with the 2nd BMC
Chip 203 shares the relevant information.Specifically, in this embodiment, the first BMC chip 201 is configurable to monitoring PCIE
Pinboard and temperature, voltage, GPU state information, the status information of GPU NvLink Switch on GPU board, and pass through
First BMC chip 201 can be with the firmware of burning related chip.In addition, power-supply unit (power supply unit,
PSU), fan, PCIE slot are closer from PCIE pinboard, can also be monitored by the first BMC chip 201 of PCIE pinboard
The status information of network interface card or IB card that power supply status, control fan, monitoring are plugged on the PCIE slot of mainboard.Mainboard 204
On the second BMC chip 203 be responsible for the temperature of each position on monitoring mainboard 204, each voltage status, board in place or
Person's FRU information reads version, the temperature information of CPU and memory, realizes and interconnects with south bridge PCH, print system log, and also negative
State, the firmware of burning related chip etc. of duty monitoring hard disk.
PCIE pinboard and GPU may be implemented in first BMC chip 201 of the monitoring system server of the embodiment of the present invention
The independent monitoring function of board can pass through independent first BMC core in the system by the multiple GPU of PCIE pinboard band
Piece 201 obtains the relevant information of GPU, monitors the letter such as GPU chip, GPU switch, GPU VR chip status, temperature in more detail
Breath.A part of information of the BMC chip of the BMC chip of mainboard and PCIE pinboard difference monitoring system, between two BMC chips
A variety of bus connections are reserved, therefore the shared of monitoring information may be implemented.PCIE pinboard and mainboard are as relatively independent
System can independent shipment, it is only necessary to have PCIE the and BMC interconnecting channels of interconnection, realize hardware modularity.
In a preferred embodiment, which can also include: the first multiple selector 205, installation
It is connected in the board main body 202 of PCIE pinboard and respectively with the first BMC chip 201 and the first RJ45 network interface 206；With
Two multiple selector 207 are mounted on mainboard 204 and are connected respectively with the second BMC chip 203 and the 2nd RJ45 network interface 208,
Wherein, the first multiple selector 205 is connected with the second multiple selector 207.First multiple selector 205 and the second multi-path choice
Device 207 is configurable to make to form access between the first RJ45 network interface 206 and the first BMC chip 201 and make the 2nd RJ45 net
Access is formed between mouth 208 and the second BMC chip 203.Alternatively, the first multiple selector 205 and the second multiple selector 207 can
Be configured to make to form access between the first RJ45 network interface 206 and the second BMC chip 203 or make the 2nd RJ45 network interface 208 with
Access is formed between second BMC chip 203.
Specifically, the first multiple selector 205 and the second multiple selector 207 are 1 turn 2 of MUX chips, can configure
The port B1 is connected for the port A or the port B2 is connected in the port A.When user needs independent control, can configure more than first
The port A of road selector 205 is connected the port B1 and configures the port A of the second multiple selector 207 and the port B1 is connected, with
Access the BMC chip of PCIE pinboard and the BMC core of mainboard respectively by the first RJ45 network interface 206 and the 2nd RJ45 network interface 208
Piece.When user needs the only BMC chip of remote access mainboard, the BMC chip of mainboard can be set as main BMC chip, if
Set BMC chip on pinboard be used as the port A that the first multiple selector 205 is configured from BMC chip the port B2 is connected and
The port B2 is connected in the port A for configuring the second multiple selector 207, to access the BMC core of mainboard by the first RJ45 network interface 206
Piece；Or the port B1 is connected in the port A of the second multiple selector 207 of configuration, to access mainboard by the 2nd RJ45 network interface 208
BMC chip.
It should be understood that the present invention is not limited by embodiment shown in the drawings, also that is, those skilled in the art
Embodiment shown in the drawings can be made under the teachings of the present invention suitably modified.In addition, technical solution of the present invention can be with
It is applied in the principle design of the server of any high density, high integration.
In one or more exemplary designs, the function can be real in hardware, software, firmware or any combination thereof
It is existing.If realized in software, can be stored in using the function as one or more instruction or code computer-readable
It is transmitted on medium or by computer-readable medium.Computer-readable medium includes computer storage media and communication media,
The communication media includes any medium for helping for computer program to be transmitted to another position from a position.Storage medium
It can be any usable medium that can be accessed by a general purpose or special purpose computer.As an example and not restrictive, the computer
Readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disc memory apparatus, disk storage equipment or other magnetic
Property storage equipment, or can be used for carry or storage form be instruct or data structure required program code and can
Any other medium accessed by general or specialized computer or general or specialized processor.In addition, any connection is ok
It is properly termed as computer-readable medium.For example, if using coaxial cable, optical fiber cable, twisted pair, digital subscriber line
(DSL) or such as wireless technology of infrared ray, radio and microwave to send software from website, server or other remote sources,
Then above-mentioned coaxial cable, optical fiber cable, twisted pair, DSL or such as wireless technology of infrared ray, radio and microwave are included in
The definition of medium.As used herein, disk and CD include compact disk (CD), laser disk, CD, digital versatile disc
(DVD), floppy disk, Blu-ray disc, wherein disk usually magnetically reproduce data, and CD using laser optics reproduce data.On
The combination for stating content should also be as being included in the range of computer-readable medium.
It is exemplary embodiment disclosed by the invention above, the disclosed sequence of the embodiments of the present invention is just to retouching
It states, does not represent the advantages or disadvantages of the embodiments.It should be noted that the discussion of any of the above embodiment is exemplary only, it is not intended that
Imply that range disclosed by the embodiments of the present invention (including claim) is limited to these examples, what is limited without departing substantially from claim
Under the premise of range, it may be many modifications and modify.In addition, although element disclosed by the embodiments of the present invention can be with individual
Form description requires, but is unless explicitly limited odd number, it is understood that is multiple.
Claims (10)
1. a kind of PCIE pinboard characterized by comprising
Board main body is configured to be plugged into mainboard；With
First BMC chip is mounted in the board main body, and be configured to be connected with muti-piece GPU board and with the master
The second BMC chip on plate passes through bus bar,
Wherein, first BMC chip is configured to monitor the relevant information of the PCIE pinboard and the muti-piece GPU board simultaneously
The relevant information is shared with second BMC chip.
2. PCIE pinboard according to claim 1, which is characterized in that first BMC chip is additionally configured to monitoring electricity
The status information of network interface card or IB card that source state, control fan, monitoring are plugged on the PCIE slot of the mainboard.
3. PCIE pinboard according to claim 1, which is characterized in that further include:
First multiple selector, be configured to respectively with second on first BMC chip, RJ45 network interface and the mainboard
Multiple selector is connected, and path or access for selecting to access first BMC chip by the RJ45 network interface
The path of second BMC chip.
4. PCIE pinboard according to claim 1, which is characterized in that first BMC chip is configured to I2C
Bus, UART bus or SGPIO bus and second BMC chip interconnect.
5. a kind of monitoring system server characterized by comprising
First BMC chip is mounted in the board main body of PCIE pinboard and is connected with muti-piece GPU board, the board main body
It is plugged into mainboard；With
Second BMC chip, installation pass through bus bar on the main board and with first BMC chip,
Wherein, first BMC chip is configured to monitor the relevant information of the PCIE pinboard and the muti-piece GPU board simultaneously
The relevant information is shared with second BMC chip.
6. monitoring system server according to claim 5, which is characterized in that first BMC chip is additionally configured to supervise
The status information of network interface card or IB card that control power supply status, control fan, monitoring are plugged on the PCIE slot of the mainboard.
7. monitoring system server according to claim 5, which is characterized in that further include:
First multiple selector, be mounted in the board main body of the PCIE pinboard and respectively with the first BMC
Chip and the first RJ45 network interface are connected；With
Second multiple selector, installation on the main board and respectively with second BMC chip and the 2nd RJ45 network interface phase
Even,
Wherein, first multiple selector is connected with second multiple selector.
8. monitoring system server according to claim 7, which is characterized in that first multiple selector and described
Two multiple selector are configured to make to form access between the first RJ45 network interface and first BMC chip and make described the
Access is formed between two RJ45 network interfaces and second BMC chip.
9. monitoring system server according to claim 7, which is characterized in that first multiple selector and described
Two multiple selector are configured to make to form access between the first RJ45 network interface and second BMC chip or make described the
Access is formed between two RJ45 network interfaces and second BMC chip.
10. monitoring system server according to claim 5, which is characterized in that first BMC chip and described second
BMC chip passes through I2C bus, UART bus or SGPIO bus bar.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201811543900.5A CN109634879A (en) | 2018-12-17 | 2018-12-17 | A kind of PCIE pinboard and monitoring system server |
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| CN201811543900.5A CN109634879A (en) | 2018-12-17 | 2018-12-17 | A kind of PCIE pinboard and monitoring system server |
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Application publication date: 20190416 |
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| RJ01 | Rejection of invention patent application after publication |