CN109617440A - Three-level inverter DC side neutral point voltage balance method based on SVPWM - Google Patents

Three-level inverter DC side neutral point voltage balance method based on SVPWM Download PDF

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CN109617440A
CN109617440A CN201811516424.8A CN201811516424A CN109617440A CN 109617440 A CN109617440 A CN 109617440A CN 201811516424 A CN201811516424 A CN 201811516424A CN 109617440 A CN109617440 A CN 109617440A
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vector
voltage
small
point
midpoint
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CN109617440B (en
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施必剑
胥飞
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Shanghai Dianji University
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • H02M7/487Neutral point clamped inverters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/539Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
    • H02M7/5395Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The present invention proposes a kind of three-level inverter DC side neutral point voltage balance method based on SVPWM, the control vector for influencing three level neutral point voltage balances is controlled using corresponding method, for middle vector control use virtual vector, synthesized with big vector of the alignment voltage without influence in vector;And to the control of small vector using the synthesis time of PI control small vector;Two kinds of control methods combine, and after the improvement that centering vector sum small vector carries out, and carry out closed loop feedback control, improve three level mid-point voltage dynamical balance features, meet system stability requirement;Additional auxiliary circuit is not needed, reduces current transformer loss, improves the stability of three-level inverter device dc-voltage balance, control method is simple.

Description

Three-level inverter DC side neutral point voltage balance method based on SVPWM
Technical field
The present invention relates to the DC side neutral point voltage balance methods of three-level inverter, more particularly to one kind to be based on SVPWM Three-level inverter DC side neutral point voltage balance method.
Background technique
In order to reach three-level inverter DC side neutral point voltage balance, traditional method is additional auxiliary circuit to realize Neutral point voltage balance, but entire circuit and control algolithm can become more complicated after improving circuit;Traditional control synthesizes arrow Voltage action time method is measured, is easy to cause Vector modulation action time too small, switchs frequent switching and surge voltage, spike electricity The appearance of stream.Therefore, it is necessary to be improved to this method, to overcome drawbacks described above.
Summary of the invention
The three-level inverter DC side neutral point voltage balance method based on SVPWM that the object of the present invention is to provide a kind of, To improve level mid-point voltage imbalance problem, the dynamic stability of equipment is improved, guarantees the normal fortune of the electrical equipments such as motor Row.
The present invention is that technical solution used by solving its technical problem is:
Three-level inverter DC side neutral point voltage balance method based on SVPWM, comprising the following steps:
Space voltage vector region is divided first, it will according to the switching tube turn-on sequence of diode clamping three-level inverter Space voltage vector region division is six big vector areas, and each big vector area is divided into four small vector regions again, always It is made of altogether 27 vectors;The three-level inverter formed by diode clamping is altogether by 12 switching tubes, wherein every circuitry phase contains 4 A switching tube, by analyzing the turn-on sequence of every phase switching tube, obtaining every phase switching tube has Udc/2、0、-Udc/ 2 three kinds of voltage shapes State, so sharing 3 in three-phase circuit3Different states, is then distributed on certain position by=27 kinds of switch states, then into The division of row zonule;
The influence of zero vector, positive small vector, negative small vector, middle vector to three level mid-point voltages is listed respectively, works as input When vector is zero vector PPP, load-side is connected with P point to be not attached to midpoint m, so alignment voltage is without influence;When input just When small vector POO, load surveys the end a and is connected with P point, and the both ends b, c loaded are connected with midpoint m, is generated by DC voltage Piezoelectric voltage is uneven;When inputting negative small vector ONN, load-side connect with positive small vector and communicates, but electric current iz flows out midpoint M declines capacitor C2 voltage, and C1 voltage rises, and meets C2 < C1, causes mid-point voltage uneven;As vector PON in input, Load-side is connected with P point, midpoint m, N point respectively, and the electric current for flowing into midpoint existing at this time also has the electric current in outflow, finally, To zero vector, big vector alignment voltage without influence, middle vector sum small vector, which balances it, to be had an impact;
In order to allow mid-point voltage to reach balance, centering vector sum small vector is needed to improve, for produced by small vector Imbalance, change the control action time of positive and negative small vector, make positive small vector action time and negative small vector as far as possible Action time is equal, cancels out each other, and makes neutral point voltage balance, for this purpose, introducing midpoint regulatory factor ρ, redistributes V1p、V1n's Action time:
It carries it into the comparison point of SVPWM and obtains:
E is unbalance of neutral-point voltage amount;
Work as Vc1=Vc2When=0, ρ=0;Work as Vc1> Vc2When, ρ < 0;Work as Vc1< Vc2When, ρ > 0;
Deviator amendment is carried out to it using pi regulator:
ρ ∈ [- 11], wherein Δ U (t) is Uc1With Uc2Difference;
By closed-loop control, the size of regulatory factor ρ is constantly adjusted, mid-point voltage is made to reach balance;For middle vector Adjustment, using virtual vector method, i.e., middle vector is synthesized by adjacent big vector according to Vector triangle, middle vectorIt is by swearing greatly AmountWithSynthesis, it is defined asFormer vectorIndicate the switch state of three-phase bridge arm,It indicates the new vector synthesized by PPN, PNN, circuit map analysis inflow and outflow midpoint electricity is drawn according to above three switching vector selector Stream, obtains Ia+Ib+Ic=0, so that entire virtual middle vector action time alignment is without influence.
After carrying out a series of improvement by centering vector sum small vector above, and closed loop feedback control is carried out, in three level The dynamical balance feature of point voltage is more stable, and anti-interference is stronger.
The present invention has the advantages that
The control vector for influencing three level neutral point voltage balances is controlled using corresponding method, for middle vector Control use virtual vector, synthesized with big vector of the alignment voltage without influence in vector;And the control of small vector is used The synthesis time of PI control small vector;Two kinds of control methods combine, after the improvement that centering vector sum small vector carries out, and Closed loop feedback control is carried out, three level mid-point voltage dynamical balance features are improved, meets system stability requirement;It does not need additional Auxiliary circuit reduces current transformer loss, improves the stability of three-level inverter device dc-voltage balance, control method Simply.
Detailed description of the invention
Fig. 1 is three-level inverter space vector schematic diagram;
Fig. 2 is the voltage vector decomposition diagram of sector I;
Fig. 3 is the influence schematic diagram of different vector alignments;
Fig. 4 is capacitor mid-point voltage control schematic diagram.
Specific embodiment
In order to be easy to understand the technical means, the creative features, the aims and the efficiencies achieved by the present invention, tie below Diagram and specific embodiment are closed, the present invention is further explained.
Three-level inverter DC side neutral point voltage balance method proposed by the present invention based on SVPWM, including following step It is rapid:
Space voltage vector region is divided first, it will according to the switching tube turn-on sequence of diode clamping three-level inverter Space voltage vector region division is six big vector areas, and each big vector area is divided into four small vector regions again, always It is made of altogether 27 vectors;Such as Fig. 1, the three-level inverter formed by diode clamping is altogether by 12 switching tubes, wherein every phase Circuit contains 4 switching tubes, and by analyzing the turn-on sequence of every phase switching tube, obtaining every phase switching tube has Udc/2、0、-Udc/ 2 three Kind voltage status, so sharing 3 in three-phase circuit3Different states, is then distributed in certain position by=27 kinds of switch states It sets, as Fig. 2 carries out the division of zonule again;
As shown in figure 3, listing zero vector, positive small vector, negative small vector, middle vector respectively to the shadows of three level mid-point voltages It rings, when input vector is zero vector PPP, load-side is connected with P point to be not attached to midpoint m, so alignment voltage is without influence; When inputting positive small vector POO, load surveys the end a and is connected with P point, and the both ends b, c loaded are connected with midpoint m, by DC side electricity Press the piezoelectric voltage generated uneven;When inputting negative small vector ONN, load-side connect with positive small vector and communicates, but electric current iz Midpoint m is flowed out, capacitor C2 voltage is declined, C1 voltage rises, and meets C2 < C1, causes mid-point voltage uneven;When being sweared in input When measuring PON, load-side is connected with P point, midpoint m, N point respectively, and the electric current for flowing into midpoint existing at this time also has the electric current in outflow, Finally, obtaining zero vector, big vector alignment voltage without influence, middle vector sum small vector, which balances it, to be had an impact;
As Fig. 4 needs centering vector sum small vector to improve, for small vector to allow mid-point voltage to reach balance Generated imbalance changes the control action time of positive and negative small vector, make as far as possible positive small vector action time with bear it is small The action time of vector is equal, cancels out each other, and makes neutral point voltage balance, for this purpose, introducing midpoint regulatory factor ρ, redistributes V1p、 V1nAction time:
It carries it into the comparison point of SVPWM and obtains:
E is unbalance of neutral-point voltage amount;
Work as Vc1=Vc2When=0, ρ=0;Work as Vc1> Vc2When, ρ < 0;Work as Vc1< Vc2When, ρ > 0;
Deviator amendment is carried out to it using pi regulator:
ρ ∈ [- 11], wherein Δ U (t) is Uc1With Uc2Difference;
By the closed-loop control in Fig. 4, the size of regulatory factor ρ is constantly adjusted, mid-point voltage is made to reach balance;For in The adjustment of vector, using virtual vector method, i.e., middle vector is synthesized by adjacent big vector according to Vector triangle, such as Fig. 2, middle arrow AmountIt is by big vectorWithSynthesis, it is defined asFormer vectorIndicate three-phase bridge The switch state of arm,It indicates the new vector synthesized by PPN, PNN, circuit map analysis is drawn according to above three switching vector selector Inflow and outflow midpoint electric current, obtains Ia+Ib+Ic=0, so that entire virtual middle vector action time alignment is without influence.
Embodiment of above only technical concepts and features to illustrate the invention, its object is to allow those skilled in the art Member understands the contents of the present invention and is implemented, and it is not intended to limit the scope of the present invention, all spiritual according to the present invention The equivalent change or modification that essence is done, should be covered by the scope of protection of the present invention.

Claims (1)

1. the three-level inverter DC side neutral point voltage balance method based on SVPWM, which comprises the following steps:
Space voltage vector region is divided first, according to the switching tube turn-on sequence of diode clamping three-level inverter by space Voltage vector region division is six big vector areas, and each big vector area is divided into four small vector regions, Zong Gongyou again 27 vector compositions;The three-level inverter formed by diode clamping is altogether by 12 switching tubes, wherein every circuitry phase is opened containing 4 Guan Guan, by analyzing the turn-on sequence of every phase switching tube, obtaining every phase switching tube has Udc/2、0、-Udc/ 2 three kinds of voltage status, So sharing 3 in three-phase circuit3Different states, is then distributed on certain position by=27 kinds of switch states, then carries out The division of zonule;
The influence of zero vector, positive small vector, negative small vector, middle vector to three level mid-point voltages is listed respectively, works as input vector When for zero vector PPP, load-side is connected with P point to be not attached to midpoint m, so alignment voltage is without influence;When the just small arrow of input When measuring POO, load surveys the end a and is connected with P point, and the both ends b, c loaded are connected with midpoint m, the electricity electricity generated by DC voltage Pressure is uneven;When inputting negative small vector ONN, load-side connect with positive small vector and communicates, but electric current iz flows out midpoint m, makes The decline of capacitor C2 voltage, C1 voltage rise, and meet C2 < C1, cause mid-point voltage uneven;As vector PON in input, load Side is connected with P point, midpoint m, N point respectively, and the electric current for flowing into midpoint existing at this time also has the electric current in outflow, finally, obtaining zero Without influence, middle vector sum small vector, which balances it, to be had an impact for vector, big vector alignment voltage;
In order to allow mid-point voltage to reach balance, centering vector sum small vector is needed to improve, for caused by small vector not Balance, changes the control action time of positive and negative small vector, makes the effect of positive small vector action time and negative small vector as far as possible Time is equal, cancels out each other, and makes neutral point voltage balance, for this purpose, introducing midpoint regulatory factor ρ, redistributes V1p、V1nEffect Time:
It carries it into the comparison point of SVPWM and obtains:
E is unbalance of neutral-point voltage amount;
Work as Vc1=Vc2When=0, ρ=0;Work as Vc1> Vc2When, ρ < 0;Work as Vc1< Vc2When, ρ > 0;
Deviator amendment is carried out to it using pi regulator:
Wherein Δ U (t) is Uc1With Uc2Difference;
By closed-loop control, the size of regulatory factor ρ is constantly adjusted, mid-point voltage is made to reach balance;
Adjustment for middle vector, using virtual vector method, i.e., middle vector is synthesized by adjacent big vector according to Vector triangle, Middle vectorIt is by big vectorWithSynthesis, it is defined asFormer vectorIndicate three The switch state of phase bridge arm,It indicates the new vector synthesized by PPN, PNN, circuit diagram is drawn according to above three switching vector selector Inflow and outflow midpoint electric current is analyzed, obtains Ia+Ib+Ic=0, so that entire virtual middle vector action time alignment is without influence.
CN201811516424.8A 2018-12-12 2018-12-12 SVPWM-based three-level inverter direct-current side midpoint voltage balancing method Active CN109617440B (en)

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Cited By (4)

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Publication number Priority date Publication date Assignee Title
CN111030495A (en) * 2019-12-30 2020-04-17 东北农业大学 Method and system for balancing neutral point voltage of four-partition-based three-level inverter
CN111092562A (en) * 2020-01-09 2020-05-01 东北农业大学 Three-partition-type-based control method and system for midpoint voltage of three-level inverter
CN111181429A (en) * 2020-01-09 2020-05-19 东北农业大学 Three-partition-based three-level inverter neutral-point voltage balancing method and system
CN113037110A (en) * 2021-02-25 2021-06-25 安徽大学绿色产业创新研究院 Five-level inverter midpoint voltage control method

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CN104038091A (en) * 2014-07-04 2014-09-10 国家电网公司 Three-level converter direct-current side neutral-point voltage balance control method based on SVPWM
US20180054150A1 (en) * 2016-08-22 2018-02-22 Hamilton Sundstrand Corporation Three level inverter midpoint control gain correction
CN108054945A (en) * 2017-12-31 2018-05-18 王大方 A kind of Virtual Space Vector Pulse Width Modulation strategy of three-level inverter

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111030495A (en) * 2019-12-30 2020-04-17 东北农业大学 Method and system for balancing neutral point voltage of four-partition-based three-level inverter
CN111092562A (en) * 2020-01-09 2020-05-01 东北农业大学 Three-partition-type-based control method and system for midpoint voltage of three-level inverter
CN111181429A (en) * 2020-01-09 2020-05-19 东北农业大学 Three-partition-based three-level inverter neutral-point voltage balancing method and system
CN111181429B (en) * 2020-01-09 2023-06-13 东北农业大学 Balancing method and system for neutral point voltage of three-level inverter based on three partitions
CN113037110A (en) * 2021-02-25 2021-06-25 安徽大学绿色产业创新研究院 Five-level inverter midpoint voltage control method

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