CN109617430B - A kind of full-bridge synchronous rectification controller - Google Patents
A kind of full-bridge synchronous rectification controller Download PDFInfo
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- CN109617430B CN109617430B CN201811463425.0A CN201811463425A CN109617430B CN 109617430 B CN109617430 B CN 109617430B CN 201811463425 A CN201811463425 A CN 201811463425A CN 109617430 B CN109617430 B CN 109617430B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M7/219—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The invention discloses a kind of full-bridge synchronous rectification controller, it is internally integrated the full-bridge synchronous rectification circuit and its control circuit that two self-powered type PMOS synchronous rectifiers and two its drive type NMOD synchronous rectifiers are formed.Two self-powered type synchronous rectifiers are not necessarily to driving circuit by transformer winding voluntarily selection path.Two its drive type synchronous rectifiers drain after opening and can generate peak voltage, synchronous rectification logic module 1 and synchronous rectification logic module 2 may return the signal for generating and turning off its drive type synchronous rectifier after detecting the peak voltage, therefore the signal that its drive type synchronous rectifier is turned off by minimum turn-on time signal shielding, prevents from immediately turning off after opening.The present invention is able to achieve secondary side only one full-bridge synchronous rectification controller of demand that it swashs push-pull converter, can improve delivery efficiency, save a vice-side winding, improve production efficiency, reduce processing cost and power-supply system cost.
Description
Technical field
The present invention relates to a kind of full-bridge synchronous rectification controllers, in particular to are applied to push-pull converter, full-bridge converter
Synchronous rectifying controller.
Background technique
Push-pull converter circuit structure is simple, transformer bi-directional excitation when work, and the utilization rate of magnetic core is high, therefore the change
Parallel operation has the advantages that small in size, high-efficient and dynamic response is good, needs in low-voltage input, High-current output and input and output
The occasion of electrical isolation is wanted to be widely used.
The patent application document that Chinese Patent Application No. is 201620875467.5 proposes a kind of crystalline substance of push-pull converter
Body pipe drive control method, suitable for the drive control to two push-pull transistors.Its sharp push-pull converter electricity as shown in Figure 1
Pressure input terminal Vin is connect with the centre cap of primary transformer coil Np1 and Np2；Primary transformer coil Np1's and Np2 is another
Outer two ends are respectively connected to VD1, VD2 pin of push-pull converter；The anode of output rectifier diode D1, D2 respectively with change
Two ends of the secondary coil Ns1 and Ns2 of depressor connect, and the cathode of output rectifier diode D1, D2 is respectively connected to export
Hold Vout；The centre cap of the secondary coil Ns1 and Ns2 of transformer are connected to output ground VSS；Co is output filter capacitor,
Both ends are connected between output end vo ut and output ground VSS；Ro is output resistance, and both ends are connected to output end
Between Vout and output ground VSS.
VD1, VD2 pin are connected to the collection of the drain of built-in power NMOS tube or built-in power NPN pipe in push-pull converter
Electrode.
Have that centre tapped transformer is complex in winding process, and technique is cumbersome, production efficiency is lower.In addition,
The conduction voltage drop VBE of output rectifier diode D1, D2 is usually above 0.3V, if flowing through the electric current of output rectifier diode D1, D2
For 0.4A, then the power of output rectifier diode D1, D2 consumption is greater than 0.12W, recommends power supply for output power for 2W
It says, the power of output rectifier diode D1, D2 consumption occupies 6% of output power or more.
To improve the production efficiency that it swashs transformer in push-pull converter, processing cost is reduced, can be used as shown in Figure 2
Circuit, secondary side use full-bridge rectification, and a winding is used only in transformer secondary, it is no longer necessary to which pair can be completed in centre cap winding
Side rectification function.But the circuit requirements 4 rectifier diodes D11, D12, D13, D14, further increase it swash recommend transformation
The loss of device reduces the output power that it swashs push-pull converter.Furthermore two diodes D13, D14 are increased, are further increased
It has been added to swash the cost of push-pull converter.
In order to improve the output power that it swashs push-pull converter, NMOS synchronous rectifier can be used and replace two poles of output rectification
Pipe.As shown in figure 3, selecting conducting internal resistance for NMOS synchronous rectifier MN1, MN2 of 0.1 Ω, if flowing through NMOS synchronous rectifier
The electric current of MN1, MN2 are 0.4A, then the power of NMOS synchronous rectifier MN1, MN2 consumption is 0.016W, are for output power
2W's recommends for power supply, and the power of NMOS synchronous rectifier MN1, MN2 consumption occupies the 0.8% of output power, relative to adopting
The 6% of output power is occupied with diode rectification, the program substantially increases the efficiency of push-pull converter.But the circuit pair side is still
Old demand has centre tapped transformer, reduces the production efficiency that it swashs transformer in push-pull converter.
As shown in figure 4, PMOS synchronous rectifier MP1, MP2 that conducting internal resistance is 0.1 Ω can also be used, but the circuit is still
Demand has centre tapped transformer.
Vice-side winding is saved in conjunction with full-bridge rectification and synchronous rectifier improves the advantage of power-supply system delivery efficiency, such as Fig. 5
Shown, the NMOS for using conducting internal resistance to be 0.1 Ω for PMOS synchronous rectifier MP11, MP12 of 0.1 Ω, conducting internal resistance synchronizes whole
Flow tube MN11, MN12 connects into the form of full-bridge rectification, and it is that it drives that the defect of the circuit, which is MP11, MP12, MN11, MN12,
The driving circuit of type and demand complexity.For the driving circuit complexity for reducing which, Fig. 6 proposes a solution, conducting
Internal resistance is that PMOS synchronous rectifier MP21, MP22 of 0.1 Ω is self-powered type, by transformer winding voluntarily selection path, simultaneously
The gate capacitance of PMOS synchronous rectifier plays natural filter action, the NMOS synchronous rectifier that conducting internal resistance is 0.1 Ω
MN21, MN22 are its drive type.4 external synchronous rectifiers of the equal demand of Fig. 5 and Fig. 6 two schemes and respective drive control circuit,
Increase power-supply system cost.
Summary of the invention
Have in view of that, the technical problem to be solved by the present invention is to propose a kind of full-bridge synchronous rectification controller and its controlling party
Method can reduce the complexity of driving circuit, while can also save a vice-side winding, improve the defeated of production efficiency and power-supply system
Power out reduces processing cost and power-supply system cost.
Present invention design are as follows: be internally integrated 4 synchronous rectifiers and its control in full-bridge synchronous rectification controller
Circuit processed, 4 synchronous rectifiers include that two self-powered type PMOS synchronous rectifiers and two its drive type NMOS synchronous rectifications are tubular
At full-bridge synchronous rectification.Voluntarily selection path, self-powered type PMOS are same by transformer winding for two self-powered type PMOS synchronous rectifiers
It walks rectifying tube and is not necessarily to driving circuit, reduce the driving circuit complexity of which, while the gate capacitance of PMOS synchronous rectifier
Play natural filter action.Two its drive type NMOS synchronous rectifiers drain after opening there are parasitic inductance, parasitic capacitance,
Dead resistance and generate peak voltage, by synchronous rectification logic module 1, synchronous rectification logic module 2 detect the spike electricity
The signal for turning off its drive type NMOS synchronous rectifier may be generated after pressure, therefore is also needed through minimum turn-on time signal screen
The signal for turning off its drive type NMOS synchronous rectifier is covered, is immediately turned off after preventing its drive type NMOS synchronous rectifier from opening.To
So that swash push-pull converter pair side only one full-bridge synchronous rectification controller of demand using of the invention it, improves it and swash and recommend
The output power of converter saves a vice-side winding, improves production efficiency, reduces processing cost and power-supply system cost.
Based on such inventive concept, a kind of full-bridge synchronous rectification controller proposed by the present invention is as follows:
A kind of full-bridge synchronous rectification controller is applied to push-pull converter or full-bridge converter, it is characterised in that: including two
A self-powered type PMOS synchronous rectifier MP31 and MP32, two its drive type NMOS synchronous rectifier MN31 and MN32, synchronous rectification
Logic module 1, synchronous rectification logic module 2, minimum turn-on time module, VDS1 pin, VDS2 pin, VCC pin and VSS draw
Foot；
The VDS1 pin is used to connect one end of transformer secondary winding Ns1, and the VDS2 pin is for connecting transformation
The other end of device vice-side winding Ns1, the VCC pin is used to connect the output end of push-pull converter or full-bridge converter, described
VSS pin is used to connect the output ground of push-pull converter or full-bridge converter；
The source connection VCC pin of synchronous rectifier MP31, drain terminal connection VDS1 pin, grid end connect VDS2 pin, together
Source connection VCC pin, the drain terminal for walking rectifying tube MP32 connect VDS2 pin, and grid end connects VDS1 pin, synchronous rectifier
The drain terminal connection VDS1 pin of MN31, source connection VSS pin, grid end connect the third end of synchronous rectification logic module 1, synchronous
The drain terminal connection VDS2 pin of rectifying tube MN32, source connection VSS pin, grid end connect the third of synchronous rectification logic module 2
End, the substrate of synchronous rectifier MN31 and the substrate of synchronous rectifier MN32 are connected to VSS pin；The lining of synchronous rectifier MP31
The substrate of bottom and synchronous rectifier MP32 are connected to VCC pin；
The minimum turn-on time module detects VDS1 pin voltage by its first end, generates the first minimum turn-on time
Signal passes through the second end of its three-polar output to synchronous rectification logic module 1；Simultaneously minimum turn-on time module by its
VDS2 pin voltage is detected at two ends, generates the second minimum turn-on time signal, is exported by its 4th end to synchronous rectification logic
The second end of module 2；
The synchronous rectification logic module 1 detects VDS1 pin voltage by its first end, is received most by its second end
The signal of small turn-on time module output, controls signal by its three-polar output and controls the open-minded of NMOS synchronous rectifier MN31
With shutdown；
The synchronous rectification logic module 2 detects VDS2 pin voltage by its first end, is received most by its second end
The signal of small turn-on time module output, controls signal by its three-polar output and controls leading out for NMOS synchronous rectifier MN32
Logical and shutdown.
A kind of specific embodiment as above-mentioned technical proposal, it is characterised in that:
Threshold value VTH_on1, synchronous rectifier are opened by minimum turn-on time module setting synchronous rectifier MN31
MN32's opens threshold value VTH_on2；
The shutdown threshold value VTH_off1 of synchronous rectifier MN31 is set by synchronous rectification logic module 1, and VTH_on1 is low
It is lower than output ground VSS in VTH_off1, VTH_off1；
The shutdown threshold value VTH_off2 of synchronous rectifier MN32 is set by synchronous rectification logic module 2, and VTH_on2 is low
It is lower than output ground VSS in VTH_off2, VTH_off2；
When the voltage of VDS1 pin falls to negative pressure by high level, the first of minimum turn-on time module three-polar output
Minimum turn-on time signal is low level and the duration is t1, and 1 third end of synchronous rectification logic module is defeated in this time t1
High level opens NMOS synchronous rectifier MN31 out；After timet, the first of minimum turn-on time module three-polar output
Minimum turn-on time signal rises to high level by low level, and 1 third end of synchronous rectification logic module continues to output high level and opens
Logical NMOS synchronous rectifier MN31, until the voltage of VDS1 pin is by the shutdown threshold value VTH_off1 lower than synchronous rectifier MN31
To be higher than synchronous rectifier MN31 shutdown threshold value VTH_off1 when, 1 third end of synchronous rectification logic module just exports low level
Turn off NMOS synchronous rectifier MN31；
When the voltage of VDS2 pin falls to negative pressure by high level, the second of minimum the 4th end of turn-on time module output
Minimum turn-on time signal is low level and the duration is t2, and 2 third end of synchronous rectification logic module is defeated in this time t2
High level opens NMOS synchronous rectifier MN32 out；After the time t 2, the second of minimum the 4th end of turn-on time module output
Minimum turn-on time signal rises to high level by low level, and 2 third end of synchronous rectification logic module continues to output high level and opens
Logical NMOS synchronous rectifier MN32, until the voltage of VDS2 pin is by the shutdown threshold value VTH_off2 lower than synchronous rectifier MN32
To be higher than synchronous rectifier MN32 shutdown threshold value VTH_off2 when, 2 third end of synchronous rectification logic module just exports low level
Turn off NMOS synchronous rectifier MN32.
Preferably, synchronous rectifier MN31 open threshold value VTH_on1 and synchronous rectifier MN32 open threshold value VTH_
On2 is identical；The shutdown threshold value VTH_off2 phase of the shutdown threshold value VTH_off1 and synchronous rectifier MN32 of synchronous rectifier MN31
Together.
Preferably, t1=t2.
Preferably, high level is pin VCC voltage, i.e. push-pull converter or full-bridge converter output voltage；Low level is
Pin VSS voltage, i.e. push-pull converter or full-bridge converter output ground；Negative pressure is that voltage is lower than low level, i.e. voltage is lower than and pushes away
Draw converter or full-bridge converter output ground.
A kind of specific embodiment as above-mentioned synchronous rectification logic module 1, characterized by comprising: comparator
CMP1, NAND gate NAND1, NAND gate NAND2；Wherein, the non-inverting input terminal of comparator CMP1 inputs synchronous rectification logic module 1
The shutdown threshold value VTH_off1 of the synchronous rectifier MN31 of setting, it is whole that the inverting input terminal of comparator CMP1 is connected to full bridge synchronous
The VDS1 pin of stream controller；The output end of comparator CMP1 is connected to an input terminal of NAND gate NAND2, NAND gate
Another input terminal of NAND2 is connected to the output end of NAND gate NAND1, and it is same that the output end of NAND gate NAND1 is connected to NMOS
Walk the grid end of rectifying tube MN31；An input terminal of NAND gate NAND1 inputs minimum turn-on time signal, NAND gate NAND1's
Another input terminal is connected to the output end of NAND gate NAND2.
A kind of specific embodiment as above-mentioned synchronous rectification logic module 2, characterized by comprising: comparator
CMP2, NAND gate NAND3, NAND gate NAND4；Wherein, the non-inverting input terminal of comparator CMP2 inputs synchronous rectification logic module 2
The shutdown threshold value VTH_off2 of the synchronous rectifier MN32 of setting, it is whole that the inverting input terminal of comparator CMP2 is connected to full bridge synchronous
The VDS2 pin of stream controller；The output end of comparator CMP2 is connected to an input terminal of NAND gate NAND4, NAND gate
Another input terminal of NAND4 is connected to the output end of NAND gate NAND3, and it is same that the output end of NAND gate NAND3 is connected to NMOS
Walk the grid end of rectifying tube MN32；An input terminal of NAND gate NAND3 inputs minimum turn-on time signal, NAND gate NAND3's
Another input terminal is connected to the output end of NAND gate NAND4.
A kind of specific embodiment as above-mentioned minimum turn-on time module, characterized by comprising: comparator
CMP3, comparator CMP4, pulse-generating circuit PULSE1, pulse-generating circuit PULSE2；Wherein, the reverse phase of comparator CMP3 is defeated
Enter the synchronous rectifier MN31 of the minimum turn-on time module setting of end input opens threshold value VTH_on1, and comparator CMP3's is same
Phase input terminal is connected to the VDS1 pin of full-bridge synchronous rectification controller, and the output end of comparator CMP3 is connected to pulse and generates electricity
One end of road PULSE1, pulse-generating circuit PULSE1 export minimum turn-on time signal BLK1 to synchronous rectification logic module 1；
The synchronous rectifier MN32's of the minimum turn-on time module setting of the inverting input terminal input of comparator CMP4 opens threshold value VTH_
On2, the non-inverting input terminal of comparator CMP4 are connected to the VDS2 pin of full-bridge synchronous rectification controller, the output of comparator CMP4
End is connected to one end of pulse-generating circuit PULSE2, and pulse-generating circuit PULSE2 exports minimum turn-on time signal BLK2 extremely
In synchronous rectification logic module 2.
Preferably, pulse-generating circuit PULSE1 persistently exports high level when input signal arrives without failing edge；Once
Input signal failing edge arrives, and pulse-generating circuit PULSE1 first persistently exports the low level of a period of time immediately, exports low electricity
A length of t1, then exports high level again when flat.
Preferably, pulse-generating circuit PULSE2 persistently exports high level when input signal arrives without failing edge；Once
Input signal failing edge arrives, and pulse-generating circuit PULSE2 first persistently exports the low level of a period of time immediately, exports low electricity
A length of t2, then exports high level again when flat.Control strategy of the invention is described in detail in specific embodiment, this
Advantageous effect of the invention is:
1, full-bridge synchronous rectification controller collection is whole for the synchronous rectifier formation full bridge synchronous of 0.1 Ω at 4 conducting internal resistances
Stream, improves the output power of push-pull converter.
2, the no longer centre tapped vice-side winding of demand band, it is only necessary to seek a winding, improve transformer in push-pull converter
Production efficiency.
3, push-pull converter pair side only needs a full-bridge synchronous rectification controller, reduces push-pull converter power supply cost, subtracts
Plate suqare is accounted for less.
Detailed description of the invention
Fig. 1 is that the transistor for the patent application document push-pull converter that Chinese Patent Application No. is 201620875467.5 drives
The schematic block circuit diagram of movement controller；
Fig. 2 is the push-pull converter application circuit that the prior art forms full-bridge rectification using 4 diodes；
Fig. 3 is the push-pull converter application circuit that the prior art uses the rectification of 2 NMOS synchronous rectifiers；
Fig. 4 is the push-pull converter application circuit that the prior art uses the rectification of 2 PMOS synchronous rectifiers；
Fig. 5 is that the prior art is pushed away using what 2 its drive PMOS synchronous rectifiers, 2 its drive NMOS synchronous rectifiers rectified
Draw converter applications circuit diagram；
Fig. 6 is that the prior art is pushed away using what 2 self-powered PMOS synchronous rectifiers, 2 its drive NMOS synchronous rectifiers rectified
Draw converter applications circuit diagram；
Fig. 7 is 1 embodiment circuit diagram of full-bridge synchronous rectification controller synchronous rectification logic of the present invention；
Fig. 8 is 2 embodiment circuit diagram of full-bridge synchronous rectification controller synchronous rectification logic of the present invention；
Fig. 9 is full-bridge synchronous rectification controller minimum turn-on time module embodiment circuit diagram of the present invention；
Figure 10 is full-bridge synchronous rectification controller application of the present invention in the application circuit of push-pull converter；
Figure 11 is full-bridge synchronous rectification controller timing figure of the present invention；
Figure 12 is conventional full bridge converter power section circuit diagram；
Figure 13 is full-bridge synchronous rectification controller application of the present invention in the application circuit of Figure 12 full-bridge converter.
Specific embodiment
Made improvement compared with the existing technology for a better understanding of the present invention, to a specific embodiment of the invention
It is described in detail.
As shown in Figure 10, it is full-bridge synchronous rectification controller application of the present invention in the application circuit of push-pull converter, pushes away
Draw converter primary side be the patent application document that Chinese Patent Application No. is 201620875467.5 propose it is a kind of it swash and recommend
The transistor driving controller of converter, push-pull converter pair side are a kind of full-bridge synchronous rectification controller proposed by the present invention,
It is connected between the output end of push-pull converter and output ground after output capacitance Co and output resistance Ro are in parallel.
Wherein, full-bridge synchronous rectification controller include two self-powered type PMOS synchronous rectifiers MP31 and MP32, two it
Drive type NMOS synchronous rectifier MN31 and MN32, synchronous rectification logic module 1, synchronous rectification logic module 2, minimum turn-on time
Module, VDS1 pin, VDS2 pin, VCC pin and VSS pin.
VDS1 pin is connected to one end of transformer secondary winding Ns1, and VDS2 pin is connected to transformer secondary winding Ns1
The other end, VCC pin connect push-pull converter output end, VSS pin connect push-pull converter output ground.
It is synchronous that 1 first end of synchronous rectification logic module connects VDS1 pin, the first end of minimum turn-on time module, PMOS
The drain terminal of rectifying tube MP31, the grid end of PMOS synchronous rectifier MP32, NMOS synchronous rectifier MN31 drain terminal；Synchronous rectification is patrolled
The first end for collecting module 2 is connected to the grid of VDS2 pin, the second end of minimum turn-on time module, PMOS synchronous rectifier MP31
End, the drain terminal of PMOS synchronous rectifier MP32, NMOS synchronous rectifier MN32 drain terminal；The third end of minimum turn-on time module
It is connected to the second end of synchronous rectification logic module 1；4th end of minimum turn-on time module is connected to synchronous rectification logic mould
The second end of block 2；The third end of synchronous rectification logic module 1 is connected to the grid end of NMOS synchronous rectifier MN31.Synchronous rectification
The third end of logic module 2 is connected to the grid end of NMOS synchronous rectifier MN32；The source of NMOS synchronous rectifier MN31, NMOS
The substrate of synchronous rectifier MN31, the source of NMOS synchronous rectifier MN32, NMOS synchronous rectifier MN32 substrate be connected to
VSS pin；The source of PMOS synchronous rectifier MP31, the substrate of PMOS synchronous rectifier MP31, PMOS synchronous rectifier MP32
Source, PMOS synchronous rectifier MP32 substrate be connected to VCC pin.
Fig. 7 is the physical circuit figure of the present embodiment synchronous rectification logic module 1, the synchronous rectification logic module 1 of the circuit
Including comparator CMP1, NAND gate NAND1, NAND gate NAND2；Wherein, the non-inverting input terminal input of comparator CMP1 synchronizes whole
The inverting input terminal for flowing shutdown the threshold value VTH_off1, comparator CMP1 for the synchronous rectifier MN31 that logic module 1 is set is it
First end is connected to the VDS1 pin of full-bridge synchronous rectification controller；The output end of comparator CMP1 is connected to NAND gate NAND2
An input terminal, another input terminal of NAND gate NAND2 is connected to the output end of NAND gate NAND1, NAND gate NAND1's
Output end is its third end, is connected to the grid end of NMOS synchronous rectifier MN31；An input terminal of NAND gate NAND1 be its
Two ends, input minimum turn-on time signal, and another input terminal of NAND gate NAND1 is connected to the output end of NAND gate NAND2.
Fig. 8 is the physical circuit figure of the present embodiment synchronous rectification logic module 2, the synchronous rectification logic module 2 of the circuit
Including comparator CMP2, NAND gate NAND3, NAND gate NAND4；Wherein, the non-inverting input terminal input of comparator CMP2 synchronizes whole
The inverting input terminal for flowing shutdown the threshold value VTH_off2, comparator CMP2 for the synchronous rectifier MN32 that logic module 2 is set is it
First end is connected to the VDS2 pin of full-bridge synchronous rectification controller；The output end of comparator CMP2 is connected to NAND gate NAND4
An input terminal, another input terminal of NAND gate NAND4 is connected to the output end of NAND gate NAND3, NAND gate NAND3's
Output end is its third end, is connected to the grid end of NMOS synchronous rectifier MN32；An input terminal of NAND gate NAND3 be its
Two ends, input minimum turn-on time signal, and another input terminal of NAND gate NAND3 is connected to the output end of NAND gate NAND4.
Fig. 9 is the physical circuit figure of the present embodiment minimum turn-on time module, the minimum turn-on time module of the circuit diagram
Including comparator CMP3, comparator CMP4, pulse-generating circuit PULSE1, pulse-generating circuit PULSE2；Wherein, comparator
The synchronous rectifier MN31's of the minimum turn-on time module setting of the inverting input terminal input of CMP3 opens threshold value VTH_on1, than
Non-inverting input terminal compared with device CMP3 is its first end, is connected to the VDS1 pin of full-bridge synchronous rectification controller, comparator CMP3
Output end be connected to one end of pulse-generating circuit PULSE1, the other end of pulse-generating circuit PULSE1 is its third end,
Minimum turn-on time signal BLK1 is exported to synchronous rectification logic module 1；The inverting input terminal input minimum of comparator CMP4 is led
The synchronous rectifier MN32's of logical time module setting opens threshold value VTH_on2, the non-inverting input terminal of comparator CMP4 be its
Two ends, are connected to the VDS2 pin of full-bridge synchronous rectification controller, and the output end of comparator CMP4 is connected to pulse-generating circuit
One end of PULSE2, the other end of pulse-generating circuit PULSE2 are its 4th end, export minimum turn-on time signal BLK2 extremely
In synchronous rectification logic module 2.
Minimum turn-on time module setting synchronous rectifier MN31's opens threshold value VTH_on1's and synchronous rectifier MN32
Open threshold value VTH_on2；The voltage of minimum turn-on time module first end detection VDS1 pin, when the voltage of VDS1 pin is by height
When level falls to negative pressure, minimum turn-on time module third end export immediately low level and the low level duration be t1, with
Export the minimum turn-on time signal BLK1 of high level immediately afterwards, other time minimum turn-on time module third supports continuous output
The minimum turn-on time signal BLK1 of high level；The voltage of minimum turn-on time module second end detection VDS2 pin simultaneously, when
When the voltage of VDS2 pin falls to negative pressure by high level, minimum the 4th end of turn-on time module exports low level and low electricity immediately
The flat duration is t2, immediately exports the minimum turn-on time signal BLK2 of high level, other time minimum turn-on time
Module the 4th supports the minimum turn-on time signal BLK2 of continuous output high level；
The shutdown threshold value VTH_off1 of synchronous rectifier MN31 is arranged in synchronous rectification logic module 1, and VTH_on1 is lower than
VTH_off1, VTH_off1 are lower than output ground VSS；Synchronous rectification logic module 1 detects the voltage of VDS1 pin by first end,
When VDS1 pin voltage falls to negative pressure and negative pressure lower than when opening threshold value VTH_on1 of synchronous rectifier MN31 from high level,
The second end of synchronous rectification logic module 1 receives the minimum turn-on time signal BLK1 of minimum turn-on time module output, then
Pass through its three-polar output high level and open NMOS synchronous rectifier MN31, in minimum turn-on time signal BLK1 by low level
After rising to high level, when VDS1 pin voltage is same to being higher than by the shutdown threshold value VTH_off1 lower than synchronous rectifier MN31
The shutdown threshold value VTH_off1 of rectifying tube MN31 is walked, the three-polar output low level of synchronous rectification logic module 1 simultaneously turns off NMOS
Synchronous rectifier MN31；If VDS1 pin voltage is when minimum turn-on time signal BLK1 is low level, by being lower than synchronous rectification
The shutdown threshold value VTH_off1 of pipe MN31 to be higher than synchronous rectifier MN31 shutdown threshold value VTH_off1, synchronous rectification logic mould
The third of block 1 supports continuous output high level and persistently opens NMOS synchronous rectifier MN31, in minimum turn-on time signal BLK1
After rising to high level by low level, the three-polar output low level of synchronous rectification logic module 1 simultaneously turns off NMOS synchronous rectification
Pipe MN31；
The shutdown threshold value VTH_off2 of synchronous rectifier MN32 is arranged in synchronous rectification logic module 2, and VTH_on2 is lower than
VTH_off2, VTH_off2 are lower than output ground VSS；Synchronous rectification logic module 2 detects the voltage of VDS2 pin by first end,
When VDS2 pin voltage falls to negative pressure and negative pressure lower than when opening threshold value VTH_on2 of synchronous rectifier MN32 from high level,
The second end of synchronous rectification logic module 2 receives the minimum turn-on time signal BLK2 of minimum turn-on time module output, then
Pass through its three-polar output high level and open NMOS synchronous rectifier MN32, in minimum turn-on time signal BLK2 by low level
After rising to high level, when VDS2 pin voltage is same to being higher than by the shutdown threshold value VTH_off2 lower than synchronous rectifier MN32
The shutdown threshold value VTH_off2 of rectifying tube MN32 is walked, the three-polar output low level of synchronous rectification logic module 2 simultaneously turns off NMOS
Synchronous rectifier MN32；If VDS2 pin voltage is when minimum turn-on time signal BLK2 is low level, by being lower than synchronous rectification
The shutdown threshold value VTH_off2 of pipe MN32 to be higher than synchronous rectifier MN32 shutdown threshold value VTH_off2, synchronous rectification logic mould
The third of block 2 supports continuous output high level and persistently opens NMOS synchronous rectifier MN32, in minimum turn-on time signal BLK2
After rising to high level by low level, the third end of synchronous rectification logic module 2 just export low level and turn off NMOS synchronize it is whole
Flow tube MN32.
Concrete operating principle are as follows:
It as shown in figure 11, is that high level, VDS1 pin fall to negative pressure by high level and negative pressure is lower than most in VDS2 pin
When the opening threshold value VTH_on1 of synchronous rectifier MN31 of small turn-on time module setting, comparator CMP3 export low level extremely
One end of pulse-generating circuit PULSE1, pulse-generating circuit PULSE1 exports low level immediately and the low level duration is t1
Minimum turn-on time signal BLK1 into synchronous rectification logic 1, comparator CMP4 exports high level to pulse-generating circuit
One end of PULSE2, the minimum turn-on time signal BLK2 that pulse-generating circuit PULSE2 output is continuously high level are whole to synchronizing
It flows in logic 2.An input terminal of NAND gate NAND1 receives minimum turn-on time signal BLK1 in synchronous rectification logic module 1,
NAND gate NAND1 output high level simultaneously opens NMOS synchronous rectifier MN31.Comparator CMP1 exports high level, NAND gate
NAND2 exports low level to one end of NAND gate NAND1.The low level shielding synchronous rectification of minimum turn-on time signal BLK1 is patrolled
The signal for collecting the issuable shutdown NMOS synchronous rectifier MN31 of module 1, stands after preventing NMOS synchronous rectifier MN31 from opening
It is turned off.PMOS synchronous rectifier MP32 grid end voltage be VDS1 pin negative pressure, drain terminal voltage, that is, VDS2 pin high level,
Its source voltage terminal, that is, VCC pin high level, PMOS synchronous rectifier MP32 by the transformer secondary that is connect with VDS1 pin around
Group one end carries out driving conducting, is self-powered type without additional driving.Since VDS2 pin is high level, comparator CMP2 output
For low level to one end of NAND gate NAND4, NAND gate NAND4 exports high level to one end of NAND gate NAND3, NAND gate
The other end of NAND3 is connected to minimum turn-on time signal BLK2, and minimum turn-on time BLK2 is high level, NAND gate at this time
NAND3 output low level and turn off NMOS synchronous rectifier MN32, PMOS synchronous rectifier MP31 at this time grid end be VDS2 pin
High level, drain terminal are VDS1 pin negative pressure, and source is VCC pin high level, therefore PMOS synchronous rectifier MP31 is turned off,
PMOS synchronous rectifier MP31 carries out driving shutdown by the transformer secondary winding one end connecting with VDS2 pin, without additional
Driving is self-powered type.Electric current passes through PMOS synchronous rectifier MP32, output by the transformer secondary one end connecting with VDS2 pin
Resistance Ro, output capacitance Co, output ground VSS, NMOS synchronous rectifier MN31 flow to the transformer secondary connecting with VDS1 pin
One end forms current loop, while providing required energy for output resistance Ro, output capacitance Co.
Since output resistance Ro, output capacitance Co persistently consume energy, the electric current for flowing through NMOS synchronous rectifier MN31 is held
Continuous to reduce, it is that 0.1 Ω is constant that internal resistance, which is connected, in NMOS synchronous rectifier MN31, NMOS synchronous rectifier MN31 drain terminal voltage, that is, full-bridge
Synchronous rectifying controller VDS1 pin voltage is begun to ramp up by negative pressure, is higher than synchronous rectification logic module 1 in VDS1 pin voltage
After the synchronous rectifier shutdown threshold value VTH_off1 of setting, comparator CMP1 output low level to one end of NAND gate NAND2, with
NOT gate NAND2 exports high level to one end of NAND gate NAND1, and the other end of NAND gate NAND1 is connected to minimum turn-on time
BLK1, minimum turn-on time BLK1 is high level at this time, and NAND gate NAND1 output low level simultaneously turns off NMOS synchronous rectifier
Hereafter afterflow is connected by the parasitic diode of NMOS synchronous rectifier MN31 in MN31.
High level, full-bridge synchronous rectification controller VDS2 are risen to by negative pressure in full-bridge synchronous rectification controller VDS1 pin
Pin, which by high level falls to negative pressure and negative pressure and is lower than the synchronous rectifier MN32 of minimum turn-on time module setting, opens threshold
When value VTH_on2, comparator CMP4 exports low level to one end with pulse-generating circuit PULSE2, pulse-generating circuit
PULSE2 exports minimum turn-on time signal BLK2 that low level and the low level duration are t2 to synchronous rectification logic 2 immediately
In, comparator CMP3 exports high level to one end of pulse-generating circuit PULSE1, and pulse-generating circuit PULSE1 output continues
For high level minimum turn-on time signal BLK1 into synchronous rectification logic 1.NAND gate in synchronous rectification logic module 2
An input terminal of NAND3 receives minimum turn-on time signal BLK2, NAND gate NAND3 output high level and opens NMOS and synchronizes
Rectifying tube MN32.Comparator CMP2 exports high level, and NAND gate NAND4 exports low level to one end of NAND gate NAND3.It is minimum
The low level of turn-on time signal BLK2 shields the issuable shutdown NMOS synchronous rectifier M32 of synchronous rectification logic module 2
Signal, be turned off immediately after preventing NMOS synchronous rectifier M32 from opening.PMOS synchronous rectifier MP32 grid end voltage is VDS1
Pin negative pressure, drain terminal voltage, that is, VDS2 pin high level, source voltage terminal, that is, VCC pin high level, PMOS synchronous rectifier
MP32 carries out driving by the transformer secondary winding one end connected with VDS1 pin and is connected, and is self-powered type without additional driving.
Since VDS1 pin is high level, comparator CMP1 exports low level to one end of NAND gate NAND2, NAND gate NAND2 output
High level is to one end of NAND gate NAND1, and the other end of NAND gate NAND1 is connected to minimum turn-on time signal BLK1, at this time
Minimum turn-on time BLK1 is high level, NAND gate NAND1 output low level and to turn off NMOS synchronous rectifier MN31, PMOS same
Walking rectifying tube MP31, grid end is VDS2 pin high level at this time, and drain terminal is VDS1 pin negative pressure, and source is the high electricity of VCC pin
Flat, therefore PMOS synchronous rectifier MP31 is turned off, PMOS synchronous rectifier MP31 passes through the transformer pair that connect with VDS2 pin
Side winding one end carries out driving shutdown, is self-powered type without additional driving.Electric current is by the transformer secondary that connect with VDS2 pin
One end passes through PMOS synchronous rectifier MP32, output resistance Ro, output capacitance Co, output ground VSS, NMOS synchronous rectifier MN31
The transformer secondary one end connecting with VDS1 pin is flowed to, forms current loop, while mentioning for output resistance Ro, output capacitance Co
For required energy.
Since output resistance Ro, output capacitance Co persistently consume energy, the electric current for flowing through NMOS synchronous rectifier MN32 is held
Continuous to reduce, it is that 0.1 Ω is constant that internal resistance, which is connected, in NMOS synchronous rectifier MN32, NMOS synchronous rectifier MN32 drain terminal voltage, that is, full-bridge
Synchronous rectifying controller VDS2 pin voltage is begun to ramp up by negative pressure, is higher than synchronous rectification logic module 2 in VDS2 pin voltage
After the synchronous rectifier shutdown threshold value VTH_off2 of setting, comparator CMP2 output low level to one end of NAND gate NAND4, with
NOT gate NAND4 exports high level to one end of NAND gate NAND3, and the other end of NAND gate NAND3 is connected to minimum turn-on time
BLK2, minimum turn-on time BLK2 is high level at this time, and NAND gate NAND3 output low level simultaneously turns off NMOS synchronous rectifier
Hereafter afterflow is connected by the parasitic diode of NMOS synchronous rectifier MN32 in MN32.
And so on, push-pull converter full-bridge synchronous rectification is completed.
Figure 12 is conventional full bridge converter power section circuit diagram, and still demand has centre tapped two to transformer secondary
A winding, and rectified using diode, reduce full-bridge power-supply system output power.
Figure 13 be integrated 2 self-powered PMOS synchronous rectifiers, 2 it drive the rectification of NMOS synchronous rectifiers full bridge synchronous it is whole
Stream controller is applied to full-bridge converter application circuit, and transformer pair only needs a winding, and improves full-bridge converter
Output power saves accounting area.Working principle repeats no more.
The above is only the preferred embodiment of the present invention, it is noted that above-mentioned preferred embodiment is not construed as pair
Limitation of the invention, protection scope of the present invention should be defined by the scope defined by the claims..For the art
For those of ordinary skill, without departing from the spirit and scope of the present invention, several improvements and modifications can also be made, these change
It also should be regarded as protection scope of the present invention into retouching.
Claims (10)
1. a kind of full-bridge synchronous rectification controller is applied to push-pull converter or full-bridge converter, it is characterised in that: including two
Self-powered type PMOS synchronous rectifier MP31 and MP32, two its drive type NMOS synchronous rectifier MN31 and MN32, synchronous rectifications are patrolled
Module 1, synchronous rectification logic module 2, minimum turn-on time module, VDS1 pin, VDS2 pin, VCC pin and VSS is collected to draw
Foot；
The VDS1 pin is used to connect one end of transformer secondary winding Ns1, and the VDS2 pin is for connecting transformer pair
The other end of side winding Ns1, the VCC pin are used to connect the output end of push-pull converter or full-bridge converter, and the VSS draws
Foot is used to connect the output ground of push-pull converter or full-bridge converter；
The source connection VCC pin of synchronous rectifier MP31, drain terminal connection VDS1 pin, grid end connect VDS2 pin, synchronize whole
Source connection VCC pin, the drain terminal of flow tube MP32 connects VDS2 pin, and grid end connects VDS1 pin, synchronous rectifier MN31's
Drain terminal connects the third end that VDS1 pin, source connection VSS pin, grid end connect synchronous rectification logic module 1, synchronous rectifier
The drain terminal connection VDS2 pin of MN32, source connection VSS pin, grid end connect the third end of synchronous rectification logic module 2, synchronous
The substrate of rectifying tube MN31 and the substrate of synchronous rectifier MN32 are connected to VSS pin；The substrate of synchronous rectifier MP31 and same
The substrate of step rectifying tube MP32 is connected to VCC pin；
The minimum turn-on time module detects VDS1 pin voltage by its first end, generates the first minimum turn-on time letter
Number, pass through the second end of its three-polar output to synchronous rectification logic module 1；Simultaneously minimum turn-on time module by its second
Detection VDS2 pin voltage in end generates the second minimum turn-on time signal, is exported by its 4th end to synchronous rectification logic mould
The second end of block 2；
The synchronous rectification logic module 1 detects VDS1 pin voltage by its first end, receives minimum by its second end and leads
The signal of logical time module output, controls signal by its three-polar output and controls opening and closing for NMOS synchronous rectifier MN31
It is disconnected；
The synchronous rectification logic module 2 detects VDS2 pin voltage by its first end, receives minimum by its second end and leads
The signal of logical time module output controls conducting and the pass that signal controls NMOS synchronous rectifier MN32 by its three-polar output
It is disconnected.
2. full-bridge synchronous rectification controller according to claim 1, it is characterised in that:
Threshold value VTH_on1, synchronous rectifier MN32 are opened by what minimum turn-on time module was arranged synchronous rectifier MN31
Open threshold value VTH_on2；
The shutdown threshold value VTH_off1 of synchronous rectifier MN31 is set by synchronous rectification logic module 1, and VTH_on1 is lower than
VTH_off1, VTH_off1 are lower than output ground VSS；
The shutdown threshold value VTH_off2 of synchronous rectifier MN32 is set by synchronous rectification logic module 2, and VTH_on2 is lower than
VTH_off2, VTH_off2 are lower than output ground VSS；
When the voltage of VDS1 pin falls to negative pressure by high level, the first of minimum turn-on time module three-polar output is minimum
Turn-on time signal is low level and the duration is t1, and 1 three-polar output of synchronous rectification logic module is high in this time t1
Level opens NMOS synchronous rectifier MN31；After timet, the first of minimum turn-on time module three-polar output is minimum
Turn-on time signal rises to high level by low level, and it is open-minded that 1 third end of synchronous rectification logic module continues to output high level
NMOS synchronous rectifier MN31, until VDS1 pin voltage by lower than synchronous rectifier MN31 shutdown threshold value VTH_off1 to
When shutdown threshold value VTH_off1 higher than synchronous rectifier MN31,1 third end of synchronous rectification logic module just exports low level pass
Disconnected NMOS synchronous rectifier MN31；
When the voltage of VDS2 pin falls to negative pressure by high level, the second of minimum the 4th end of turn-on time module output is minimum
Turn-on time signal is low level and the duration is t2, and 2 three-polar output of synchronous rectification logic module is high in this time t2
Level opens NMOS synchronous rectifier MN32；After the time t 2, the second of minimum the 4th end of turn-on time module output is minimum
Turn-on time signal rises to high level by low level, and it is open-minded that 2 third end of synchronous rectification logic module continues to output high level
NMOS synchronous rectifier MN32, until VDS2 pin voltage by lower than synchronous rectifier MN32 shutdown threshold value VTH_off2 to
When shutdown threshold value VTH_off2 higher than synchronous rectifier MN32,2 third end of synchronous rectification logic module just exports low level pass
Disconnected NMOS synchronous rectifier MN32.
3. full-bridge synchronous rectification controller according to claim 2, it is characterised in that: synchronous rectifier MN31's opens threshold
Value VTH_on1 and synchronous rectifier MN32 to open threshold value VTH_on2 identical；The shutdown threshold value VTH_ of synchronous rectifier MN31
The shutdown threshold value VTH_off2 of off1 and synchronous rectifier MN32 is identical.
4. full-bridge synchronous rectification controller according to claim 2, it is characterised in that: t1=t2.
5. full-bridge synchronous rectification controller according to claim 2, it is characterised in that: high level is pin VCC voltage, i.e.,
Push-pull converter or full-bridge converter output voltage；Low level is pin VSS voltage, i.e. push-pull converter or full-bridge converter is defeated
Out；Negative pressure is that voltage is lower than low level, i.e. voltage is lower than push-pull converter or full-bridge converter output ground.
6. full-bridge synchronous rectification controller according to claim 2, it is characterised in that: wrapped in synchronous rectification logic module 1
Include comparator CMP1, NAND gate NAND1, NAND gate NAND2；Wherein, the non-inverting input terminal of comparator CMP1 inputs synchronous rectification
The shutdown threshold value VTH_off1 for the synchronous rectifier MN31 that logic module 1 is set, the inverting input terminal of comparator CMP1 are connected to
The VDS1 pin of full-bridge synchronous rectification controller；The output end of comparator CMP1 is connected to an input terminal of NAND gate NAND2,
Another input terminal of NAND gate NAND2 is connected to the output end of NAND gate NAND1, and the output end of NAND gate NAND1 is connected to
The grid end of NMOS synchronous rectifier MN31；An input terminal of NAND gate NAND1 inputs minimum turn-on time signal, NAND gate
Another input terminal of NAND1 is connected to the output end of NAND gate NAND2.
7. full-bridge synchronous rectification controller according to claim 2, it is characterised in that: wrapped in synchronous rectification logic module 2
Include comparator CMP2, NAND gate NAND3, NAND gate NAND4；Wherein, the non-inverting input terminal of comparator CMP2 inputs synchronous rectification
The shutdown threshold value VTH_off2 for the synchronous rectifier MN32 that logic module 2 is set, the inverting input terminal of comparator CMP2 are connected to
The VDS2 pin of full-bridge synchronous rectification controller；The output end of comparator CMP2 is connected to an input terminal of NAND gate NAND4,
Another input terminal of NAND gate NAND4 is connected to the output end of NAND gate NAND3, and the output end of NAND gate NAND3 is connected to
The grid end of NMOS synchronous rectifier MN32；An input terminal of NAND gate NAND3 inputs minimum turn-on time signal, NAND gate
Another input terminal of NAND3 is connected to the output end of NAND gate NAND4.
8. full-bridge synchronous rectification controller according to claim 2, it is characterised in that: include in minimum turn-on time module
Comparator CMP3, comparator CMP4, pulse-generating circuit PULSE1, pulse-generating circuit PULSE2；Wherein, comparator CMP3
The synchronous rectifier MN31's of the minimum turn-on time module setting of inverting input terminal input opens threshold value VTH_on1, comparator
The non-inverting input terminal of CMP3 is connected to the VDS1 pin of full-bridge synchronous rectification controller, and the output end of comparator CMP3 is connected to arteries and veins
One end of generation circuit PULSE1 is rushed, pulse-generating circuit PULSE1 output minimum turn-on time signal BLK1 to synchronous rectification is patrolled
Collect module 1；The inverting input terminal of comparator CMP4 inputs the open-minded of the synchronous rectifier MN32 of minimum turn-on time module setting
Threshold value VTH_on2, the non-inverting input terminal of comparator CMP4 are connected to the VDS2 pin of full-bridge synchronous rectification controller, comparator
The output end of CMP4 is connected to one end of pulse-generating circuit PULSE2, and pulse-generating circuit PULSE2 exports minimum turn-on time
Signal BLK2 is into synchronous rectification logic module 2.
9. full-bridge synchronous rectification controller according to claim 8, it is characterised in that: pulse-generating circuit PULSE1 is defeated
When entering signal without failing edge arrival, high level is persistently exported；Once input signal failing edge arrives, pulse-generating circuit PULSE1
The low level of a period of time is first persistently exported immediately, and a length of t1, then exports high level again when exporting low level.
10. full-bridge synchronous rectification controller according to claim 8, it is characterised in that: pulse-generating circuit PULSE2 exists
When input signal arrives without failing edge, high level is persistently exported；Once input signal failing edge arrives, pulse-generating circuit
PULSE2 first persistently exports the low level of a period of time immediately, and a length of t2, then exports high level again when exporting low level.
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| PCT/CN2019/119575 WO2020114246A1 (en) | 2018-12-03 | 2019-11-20 | Full-bridge synchronous rectification controller |
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| CN110601541A (en) * | 2019-09-10 | 2019-12-20 | 深圳南云微电子有限公司 | Control method and controller of full-bridge converter |
| CN111726011B (en) * | 2020-07-27 | 2022-03-01 | 上海川土微电子有限公司 | Digital isolator circuit comprising integrated isolated DC-DC and digital isolator comprising circuit |
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