CN109616046A - 一种像素驱动电路、像素驱动方法及像素驱动系统 - Google Patents
一种像素驱动电路、像素驱动方法及像素驱动系统 Download PDFInfo
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- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
Abstract
本发明公开了一种像素驱动电路、像素驱动方法及像素驱动系统,其中驱动电路包括源开关单元(1)、像素单元(2)和放电单元(3),所述放电单元(3)连接于所述源开关单元(1)和所述像素单元(2)之间,或者所述放电单元(3)连接于所述源开关单元(1)和斜坡电压VDAC之间。本发明克服了上一帧显示数据对当前待显示数据产生影响,减小了像素显示失真。
Description
技术领域
本发明涉及一种像素驱动电路、像素驱动方法及像素驱动系统。
背景技术
显示技术经历了从CRT到LCD、LED、OLED、QLED以及Micro-OLED等一系列技术的发展,视频显示的效果越来越精良,同时,人们对色彩饱和度、对比度、动态范围、色彩还原度等性能要求也越来越高。图1为现有的一种像素驱动电路,包含源开关单元1和像素单元2,其中,源开关单元由一对PMOS管P1和NMOS管N1构成,像素单元包括门开关单元(由一对PMOS管P2和NMOS管N2构成)、储能电容CS、驱动管N4、偏置管N5、OLED发光单元等。图2为现有的一种像素驱动电路时序图,在进行视频显示时,某一行的各像素单元的门开关单元同时打开,选中该行,VDAC根据行同步信号产生固定的斜坡电压,源开关单元产生一个截取窗口,控制像素单元对斜坡电压VDC进行采样,同时,储能电容进行充电,并维持一帧的时间驱动OLED发光单元进行发光。当后一帧的同一行需要进行刷新数据时,只需要重新产生VDAC斜坡电压,控制该行中的各像素重新对斜坡电压VDC进行采样即可。但是,当后一帧的某一行像素单元中储能电容存储的驱动电压小于前一帧的同一行像素单元中储能电容存储的驱动电压时,储能电容会存在电流倒灌,这就要求VDAC具有电流倒灌功能,同时,假如后一帧与前一帧同一行的驱动电压相差过大,可能导致电流倒灌不及时,储能电容中存储的驱动电压没有减小到视频数据对应的电压值,导致视频显示失真。
发明内容
为了解决现有技术中所存在的问题,本发明的在此的目的之一在于提供一种能够减小像素阵列显示失真的像素驱动电路。
为实现本发明的目的,在此所提供的像素驱动电路包括源开关单元、像素单元和放电单元,所述放电单元连接于所述源开关单元和所述像素单元之间,或者所述放电单元连接于所述源开关单元和斜坡电压VDAC之间;所述像素单元包括门开关单元、储能电容CS、驱动管N4、以及PWM管P3;所述储能电容CS连接于所述门开关单元的输出端和地之间,所述驱动管N4的控制端接所述门开关单元的输出端,所述驱动管N4的电源端上加载控制信号VAN,所述驱动管N4的输出端接所述PWM管P3的电源端,所述PWM管P3的控制端上加载控制信号,所述PWM管P3的输出端作为所述像素单元的输出端用于连接待驱动发光管。
具体的,所述源开关单元为传输门。
具体的,所述门开关单元为传输门。
具体的,本发明所提供的装置还包括用于对待驱动子像素的电流进行分流的偏置管N5。利用偏置管N5实现了分流,以便更加容易地调节并实现子像素的小电流,精细地控制子像素的发光亮度。
本发明在此的第二个目的在于提供一种基于本发明所提供的像素驱动电路的像素驱动方法,该方法采用一行同时驱动的方式进行视频显示,当选中一帧中的第n行进行驱动显示时,以第n行的行同步信号作为基准,在加载待显示视频前,对像素单元进行放电。
具体的,当所述放电单元连接于所述源开关单元和所述像素单元之间时,采用一行同时驱动的方式进行视频显示,当选中一帧中的第n行进行驱动显示时,以第n行的行同步信号作为基准,具体步骤如下:
步骤A1:放电,闭合所述门开关单元和所述放电单元储能电容CS进行放电,待放电完成后断开所述放电单元;
步骤A2:充电,在所述源开关单元的输入端上加载斜坡电压VDCA,并闭合所述源开关单元使斜坡电压VDCA加载于所述储能电容CS上对其进行充电;
步骤A3:待充电完成后,导通所述PWM管P3,所述储能电容CS上的电压经所述驱动管N4和所述PWM管P3加载于待驱动发光管上驱动其发光,并持续一帧时间。
具体的,所述放电单元连接于所述源开关单元和斜坡电压VDAC之间时,采用一行同时驱动的方式进行视频显示,当选中一帧中的第n行进行驱动显示时,以第n行的行同步信号作为基准,具体步骤如下:
步骤B1:放电,闭合所述源开关单元、所述门开关单元和所述放电单元使储能电容CS进行放电,待放电完成后断开所述放电单元;
步骤B2:充电,在所述源开关单元的输入端上加载斜坡电压VDCA使斜坡电压VDCA加载于所述储能电容CS上对其进行充电;
步骤B3:待充电完成后,导通所述PWM管P3,所述储能电容CS上的电压经所述驱动管N4和所述PWM管P3加载于待驱动发光管上驱动其发光,并持续一帧时间。
具体的,在充电过程中,所述源开关单元根据第n行中各列视频数据断开,产生截取窗口,对斜坡电压VDAC进行采样。
本发明在此的第三个目的在于提供一种用于本发明所提供的像素驱动电路工作的像素驱动系统,该系统包括:
源驱动单元,输出用于控制源开关单元开断的控制信号;
门驱动单元,输出用于控制门开关单元开断的控制信号;
时序控制单元,输出用于控制放电单元开断的控制信号;
斜坡电压单元,输出用于对储能电容CS进行充电的斜坡电压VDAC。
本发明的有有益效果是:本发明提供的像素驱动电路利用放电单元对像素单元的储能电容在进行充电之前进行放电,即在加载当前待显示视频数据帧时,将像素单元中存储的上一帧待显示视频数据进行放电处理,克服了上一帧待显示数据对当前带显示数据产生影响,减小了像素显示失真。
基于本发明所提供的像素驱动电路的像素驱动方法在对当前待显示视频数据进行显示前进行放电处理,克服了上一帧待显示数据对当前带显示数据产生影响,减小了像素显示失真。
附图说明
图1为现有的一种像素驱动电路的电路图;
图2为现有的一种像素驱动电路工作的时序图;
图3为本发明所提供的像素驱动电路的电路图之一;
图4为本发明所提供的像素驱动电路的电路图之二;
图5为利用图3所示的电路图构成的像素驱动电路;
图6为利用图4所示的电路图构成的像素驱动电路
图7为图3的工作时序图;
图8为图4的工作时序图;
图9为本发明所提供的控制系统的原理框图;
图中:1-源开关单元,2-像素单元,3-放电单元,4-待驱动发光管,5-源驱动单元,6-门驱动单元,6-时序控制单元,8-斜坡电压单元;
工作时序图中,VS表示帧同步信号,HS为行同步信号,VDAC为斜坡电压,Gate Driver为门开关单元的控制信号,Discharge为放电单元3的控制信号,Source Driver为源开关单元的控制信号,VDAC、Gate Driver、Source Driver等信号都是以行同步信号HS作为基准进行输出控制。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚明白,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。在不冲突的情况下,本发明中的实施例及实施例中的特征可以相互任意组合。
在此详细地对示例性实施例进行说明,下面的描述涉及附图时,除非另有说明,不同附图中的相同数字表示相同或相似的要素。
为了解决现有的像素驱动电路存在的视频显示失真的问题,本发明在此提供一种像素驱动电路,该装置的电路结构如图3和图4所示,包括了源开关单元1、像素单元2和放电单元3;其中,像素单元2包括门开关单元21、储能电容CS、驱动管N4以及PWM管P3;储能电容CS连接于门开关单元21的输出端和地之间,驱动管N4的控制端接门开关单元21的输出端,驱动管N4的电源端上加载控制信号VAN,驱动管N4的输出端接PWM管P3的电源端,PWM管P3的控制端上加载控制信号,PWM管P3的输出端作为像素单元的输出端用于连接待驱动发光管4。
放电单元3的连接方式包括两种,一种是连接于源开关单元1和像素单元2之间;第二中连接于源开关单元1和斜坡电压VDAC之间。放电单元3无论连接于何处,其作用均是用于对储能电容CS进行放电,仅是控制信号时序会有一些不同,分别如图7和图8所示。
为了更加精细地控制发光亮度的亮度,本发明所提供的驱动电路还包括用于分流的偏置管N5,该偏置管N5的电源端接驱动管N4的输出端,输出端接地,控制端作为连接端,用于外部控制信号加载,控制其导通、截止,实现分流。
本发明所记载的源开关单元1可以采用现有的任何一种在受控制信号控制能够实现通、断的可控器件或可控电路,如可控硅、晶体三极管或场效应三极管等可控开关器件,在此源开关单元采用由一NMOS管N1和一PMOS管P1构成一传输门,门开关单元采用由一NMOS管N2和一PMOS管P2构成一传输门。
所记载的放电单元3可以采用现有的任何一种在受控制信号控制能够实现通、断的可控器件或可控电路,如可控硅、晶体三极管或场效应三极管等可控开关器件,在此采用晶体三极管或场效应三极管作为放电管N3实现放电。
本发明所记载的驱动管N4、PWM管P3、偏置管N5既可以为晶体三极管,也可以为场效应管。
本像素驱动电路可以用于驱动现有的任何一种发光管,如OLED,AMOLED,QLED,Mini-LED,Nano-LED,Micro-OLED等主动发光器件。
利用本发明所提供的驱动电路驱动像素阵列中子像素,具体是利用储能电容CS加载于像素阵列中子像素上的电压和PWM管P3的导通时间共同控制子像素发光;其中,储能电容CS加载于子像素上的电压与子像素对应的图像或视频数据灰阶值成线性关系。
图5是利用图3所示例的像素驱动电路驱动像素阵列进行视频数据显示的电路连接关系,图5中的像素阵列由像素单元构成,该像素单元为本发明所记载的像素单元2和待驱动发光管4构成;该像素驱动电路采用一行同时驱动的方式进行视频显示,当选中一帧中的第n行进行驱动显示时,以第n行的行同步信号作为基准驱动像素阵列中的某个或某些像素进行显示,具体步骤如下:
步骤A1:放电,闭合门开关单元21和放电单元3使第n行中的各像素单元中的储能电容CS进行放电,放电的时间由储能电容的放电特性决定,待放电完成后断开放电单元3;
步骤A2:充电,在源开关单元1的输入端上加载斜坡电压VDCA,并闭合源开关单元1使斜坡电压VDCA加载于储能电容CS上对其进行充电;斜坡电压VDAC为同一固定的斜坡电压,由最低电压线性升至最高电压,并经过源开关单元导入至该行像素单元的各列中;
步骤A3:待斜坡电压VDAC对第n行的像素单元中各储能电容CS充电完成后,导通PWM管P3,储能电容CS上的电压经驱动管N4和PWM管P3加载于待驱动发光管4上驱动其发光,并持续一帧时间。
在利用斜坡电压VDAC对第n行的像素单元中各储能电容CS进行充电时,源开关单元根据该行中各列的视频数据断开源开关单元,产生截取窗口,对斜坡电压VADC进行采样,储能电容CS上的电压与各像素单元视频数据对应的电压值作比较,用于控制源开关单元1的通断,当储能电容CS上的电压与各像素单元视频数据对应的电压值相等时,控制源开关单元1断开,停止充电;否则持续充电,直至储能电容CS上的电压等于各像素单元视频数据对应的电压值后断开源开关单元1。
图6是利用图4所示例的像素驱动电路驱动像素阵列进行视频数据显示的电路连接关系,图6中的像素阵列由像素单元构成,该像素单元为本发明所记载的像素单元2和待驱动发光管构成;该像素驱动电路采用一行同时驱动的方式进行视频显示,当选中一帧中的第n行进行驱动显示时,以第n行的行同步信号作为基准驱动像素阵列中的某个或某些像素进行显示,具体步骤如下:
步骤B1:放电,闭合源开关单元1、门开关单元21和放电单元3使储能电容CS进行放电,放电的时间由储能电容的放电特性决定,待放电完成后断开放电单元3;
步骤B2:充电,在源开关单元1的输入端上加载斜坡电压VDCA使斜坡电压VDCA加载于所述储能电容CS上对其进行充电;斜坡电压VDAC为同一固定的斜坡电压,由最低电压线性升至最高电压,并经过源开关单元导入至该行像素单元的各列中;
步骤B3:待斜坡电压VDAC对第n行的像素单元中各储能电容CS充电完成后,导通PWM管P3,储能电容CS上的电压经驱动管N4和PWM管P3加载于待驱动发光管4上驱动其发光,并持续一帧时间。
在利用斜坡电压VDAC对第n行的像素单元中各储能电容CS进行充电时,源开关单元根据该行中各列的视频数据断开源开关单元,产生截取窗口,对斜坡电压VADC进行采样,储能电容CS上的电压与各像素单元视频数据对应的电压值作比较,用于控制源开关单元1的通断,当储能电容CS上的电压与各像素单元视频数据对应的电压值相等时,控制源开关单元1断开,停止充电;否则持续充电,直至储能电容CS上的电压等于各像素单元视频数据对应的电压值后断开源开关单元1。
本发明所记载的源开关单元1、门开关单元21、放电单元3、PWM管P3和偏置管N5上分别加载有控制信号控制通断,控制信号可以由任何系统产生,在此提供一种用于控制本发明所记载的像素驱动电路工作的像素驱动系统,如图9所示包括:
源驱动单元5,输出用于控制源开关单元1开断的控制信号;
门驱动单元6,输出用于控制门开关单元21开断的控制信号;
时序控制单元7,输出用于控制放电单元3开断的控制信号;
斜坡电压单元8,输出用于对储能电容CS进行充电的斜坡电压VDAC。
其中,源驱动单元5、门驱动单元6和时序控制单元7是数字电路,源驱动单元5和门驱动单元6用于产生源开关单元1和像素单元的门开关单元21的控制信号,斜坡电压单元则是模拟模块,产生如图7、图8中所示的斜坡电压VDAC(Pixel Voltage)。
源驱动单元5中还包括比较器和数据寄存器,其中数据寄存器中存储像素阵列中各列的视频数据,源开关单元采集到的斜坡电压VDAC转化成对应计数值输入比较器,数据寄存器中存储的各列视频数据同样输入比较器中,两信号进行比较后输出控制信号,当两者信号相等时控制源开关单元1断开。
本发明所提供的控制系统支持各类数字视频数据(Digital Video Data)输入,包括MPG、RMVB、WMV、3GP、MP4、MPEG、AVI等,支持各类视频数据传输接口,包括VGA、DVI、HDMI、DP等;各单元输出的信号加载于驱动像素阵列(Pixel Array)显示的像素驱动电路中源开关单元、门开关单元、放电单元、PWM管P3上用于控制开、断。
以上所述为本发明的具体实施例子,并不用于限制本发明,凡在本发明的精神和原则之内所做的任何修改,替换,改进均属于本发明所保护的范围之内。
Claims (10)
1.一种像素驱动电路,其特征在于,包括源开关单元(1)、像素单元(2)和放电单元(3),所述放电单元(3)连接于所述源开关单元(1)和所述像素单元(2)之间,或者所述放电单元(3)连接于所述源开关单元(1)和斜坡电压VDAC之间;所述像素单元(2)包括门开关单元(21)、储能电容CS、驱动管N4、以及PWM管P3;所述储能电容CS连接于所述门开关单元(21)的输出端和地之间,所述驱动管N4的控制端接所述门开关单元(21)的输出端,所述驱动管N4的电源端上加载控制信号VAN,所述驱动管N4的输出端接所述PWM管P3的电源端,所述PWM管P3的控制端上加载控制信号,所述PWM管P3的输出端作为所述像素单元(2)的输出端用于连接待驱动发光管(4)。
2.根据权利要求1所述的像素驱动电路,其特征在于:所述源开关单元(1)为传输门。
3.根据权利要求1或2所述的像素驱动电路,其特征在于:所述门开关单元(21)为传输门。
4.根据权利要求1或2所述的像素驱动电路,其特征在于:还包括用于对待驱动子像素的电流进行分流的偏置管N5。
5.根据权利要求3所述的像素驱动电路,其特征在于:还包括用于对待驱动子像素的电流进行分流的偏置管N5。
6.基于权利要求1-5任意一项所述的像素驱动电路的像素驱动方法,其特征在于:该方法采用一行同时驱动的方式进行视频显示,当选中一帧中的第n行进行驱动显示时,以第n行的行同步信号作为基准,在加载待显示视频前,对像素单元进行放电。
7.根据权利要求6所述的驱动方法,其特征在于:当所述放电单元(3)连接于所述源开关单元(1)和所述像素单元(2)之间时,采用一行同时驱动的方式进行视频显示,当选中一帧中的第n行进行驱动显示时,以第n行的行同步信号作为基准,具体步骤如下:
步骤A1:放电,闭合所述门开关单元(21)和所述放电单元(3)使储能电容CS进行放电,待放电完成后断开所述放电单元(3);
步骤A2:充电,在所述源开关单元(1)的输入端上加载斜坡电压VDCA,并闭合所述源开关单元(1)使斜坡电压VDCA加载于所述储能电容CS上对其进行充电;
步骤A3:待充电完成后,导通所述PWM管P3,所述储能电容CS上的电压经所述驱动管N4和所述PWM管P3加载于待驱动发光管(4)上驱动其发光,并持续一帧时间。
8.根据权利要求6所述的驱动方法,其特征在于:所述放电单元(3)连接于所述源开关单元(1)和斜坡电压VDAC之间时,采用一行同时驱动的方式进行视频显示,当选中一帧中的第n行进行驱动显示时,以第n行的行同步信号作为基准,具体步骤如下:
步骤B1:放电,闭合所述源开关单元(1)、所述门开关单元(21)和所述放电单元(3)使储能电容CS进行放电,待放电完成后断开所述放电单元(3);
步骤B2:充电,在所述源开关单元(1)的输入端上加载斜坡电压VDCA使斜坡电压VDCA加载于所述储能电容CS上对其进行充电;
步骤B3:待充电完成后,导通所述PWM管P3,所述储能电容CS上的电压经所述驱动管N4和所述PWM管P3加载于待驱动发光管(4)上驱动其发光,并持续一帧时间。
9.根据权利要求7或8所述的驱动方法,其特征在于:在充电过程中,所述源开关单元根据第n行中各列视频数据断开,产生截取窗口,对斜坡电压VDAC进行采样。
10.用于控制权利要求1-5任意一项所述的像素驱动电路工作的像素驱动系统,其特征在于:该系统包括:
源驱动单元(5),输出用于控制所述源开关单元(1)开断的控制信号;
门驱动单元(6),输出用于控制所述门开关单元(21)开断的控制信号;
时序控制单元(7),输出用于控制所述放电单元(3)开断的控制信号;
斜坡电压单元(8),输出用于对所述储能电容CS进行充电的斜坡电压VDAC。
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