CN109600938A - A kind of autocontrol method and device of PCB layout - Google Patents

A kind of autocontrol method and device of PCB layout Download PDF

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Publication number
CN109600938A
CN109600938A CN201811619143.5A CN201811619143A CN109600938A CN 109600938 A CN109600938 A CN 109600938A CN 201811619143 A CN201811619143 A CN 201811619143A CN 109600938 A CN109600938 A CN 109600938A
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CN
China
Prior art keywords
hole
edge pth
conductive layer
pth hole
edge
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CN201811619143.5A
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Chinese (zh)
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CN109600938B (en
Inventor
王英娜
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Zhengzhou Yunhai Information Technology Co Ltd
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Zhengzhou Yunhai Information Technology Co Ltd
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Priority to CN201811619143.5A priority Critical patent/CN109600938B/en
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0005Apparatus or processes for manufacturing printed circuits for designing circuits by computer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4679Aligning added circuit layers or via connections relative to previous circuit layers

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

The invention discloses the autocontrol methods and device of a kind of printing board PCB layout, this method comprises: in PCB layout process, when increasing new conductive layer, for scheduled edge PTH hole, judge whether the quantity of the current connected conductive layer of the edge PTH hole has reached the preset maximum number of plies, if it is, by being electrically isolated between the edge PTH hole and newly-increased conductive layer.Above scheme can accurately and efficiently limit the connection number of plies of edge PTH hole, with this come avoid due to the connection number of plies of edge PTH hole it is excessive caused by the bad problem of upper tin.

Description

A kind of autocontrol method and device of PCB layout
Technical field
The present invention relates to the automatic control technology of PCB layout, espespecially a kind of autocontrol method of PCB layout.
Background technique
With the fast development of server product and the mass production of server pcb board card, how design is quickly improved Already become a key factor for determining time cost and material cost with production efficiency and the qualification rate of pcb board card.
Pcb board card production one of piece uploading link, i.e. PCBA (Printed Circuit Board+ Assembly) in production, (dual inline-pin package, dual-inline package technology are also referred to as double by many DIP Interior wire wrapping or hand part mate) encapsulation soldering part there is a problem of that upper tin is bad.After board production is completed, also need It tries again and mends tin processing, can just make part firm welding, just can guarantee the continuous stability of product.
The analysis found that largely upper tin bad problem the reason of be:
DIP part need to weld PTH (Plated Through Hole, the direct insertion member of through-hole of stitch when pcb board card designs Part, also referred to as through hole part or plank through-hole processing procedure) welding hole and heat dissipation copper face connection area it is excessive, cause to add in PCBA Edge PTH hole heat loss is very fast when tin in work, shortage of heat, to influence the upper tin rate of DIP stitch and edge PTH hole.
Layout engineer can targetedly check PTH welding hole when pcb board card designs.On avoiding The bad problem of tin, it will usually the connection number of plies of edge PTH hole and copper face is limited, if it exceeds the number of plies of setting, layout engineer Edge PTH hole can be dug out manually by, connection level is reduced to the scheduled number of plies or less than the scheduled number of plies.Due to service The soldering part that DIP is encapsulated on device board is more, if handling the connection number of plies of edge PTH hole manually by layout engineer Problem will be expend a great deal of time, and manually be easy to omit, and working efficiency is too low.If moreover, changing DIP part position when plate It is equipped with change, it is also necessary to handle again, it is easy to malfunction.
Summary of the invention
In order to solve the above-mentioned technical problems, the present invention provides a kind of PCB layout autocontrol method and device, with The working efficiency of the number of plies processing of edge PTH hole is improved, and is not allowed error-prone.
In order to reach the object of the invention, adopt the following technical scheme that
The autocontrol method of a kind of printing board PCB layout, comprising: new when increasing in PCB layout process When conductive layer, for scheduled edge PTH hole, it is default to judge whether the quantity of the current connected conductive layer of the edge PTH hole has reached The maximum number of plies, if it is, by being electrically isolated between the edge PTH hole and newly-increased conductive layer.
Wherein, the preset maximum number of plies is 3 layers.
Wherein, the scheduled edge PTH hole include one or more with the hole of attribute or one or more do not belong to The hole of property.
Wherein, for the edge PTH hole of same attribute, described the step of disconnecting the edge PTH hole and the connection of newly-increased conductive layer, is wrapped It includes: creating and the pad area Jin Bu of the same size is isolated, the conductive layer for making the edge PTH hole of same attribute by the area Jin Bu and increasing newly It is electrically isolated.
Wherein, for the edge PTH hole of different attribute, described the step of disconnecting the edge PTH hole and the connection of newly-increased conductive layer, is wrapped It includes: being electrically isolated the edge PTH hole of different attribute and newly-increased conductive layer by the way that pad is isolated.
A kind of automatic control device of printing board PCB layout, the device include:
Memory: for storing the program for carrying out automatically controlling;
Processor, for executing the program for carrying out automatically controlling, to be used for: when increasing new conductive layer, For scheduled edge PTH hole, judge whether the quantity of the current connected conductive layer of the edge PTH hole has reached preset maximum layer Number, if it is, by being electrically isolated between the edge PTH hole and newly-increased conductive layer.
Wherein, the processor is used for described in execution when detecting that the respective menu items in skill menu are clicked The program carried out automatically controlling.
Wherein, the processor also executes described program, to be used for: the setting preset maximum number of plies is 3 layers.
Wherein, the processor also executes described program, to be used for: the setting scheduled edge PTH hole is one or more With the hole of attribute or the hole of one or more different attributes.
Wherein, the processor also executes described program, to be used for:
For the edge PTH hole of same attribute, creates and the pad area Jin Bu of the same size is isolated, make to belong to by the area Jin Bu Property edge PTH hole and newly-increased conductive layer be electrically isolated;
For the edge PTH hole of different attribute, by be isolated pad make different attribute edge PTH hole and newly-increased conductive layer electricity every From.
Compared with prior art, the present invention includes: to increase new layer in PCB generating process;For scheduled PTH Hole, judges whether the number of plies that the edge PTH hole is connected has reached the preset maximum number of plies;If it is, the hole is not connected to Newly-increased layer can accurately and efficiently limit the connection number of plies of edge PTH hole in this way, avoid the connection number of plies due to edge PTH hole with this The bad problem of upper tin caused by excessive.
Other features and advantages of the present invention will be illustrated in the following description, also, partly becomes from specification It obtains it is clear that understand through the implementation of the invention.The objectives and other advantages of the invention can be by specification, power Specifically noted structure is achieved and obtained in sharp claim and attached drawing.
Detailed description of the invention
Attached drawing is used to provide to further understand technical solution of the present invention, and constitutes part of specification, with this The embodiment of application technical solution for explaining the present invention together, does not constitute the limitation to technical solution of the present invention.
Fig. 1 a is the encapsulating structure top view of edge PTH hole in the pcb in the embodiment of the present invention;
Fig. 1 b is the encapsulating structure longitudinal direction 3D figure of edge PTH hole in the pcb in the embodiment of the present invention;
Fig. 1 c is the encapsulating structure longitudinal direction 2D figure of edge PTH hole in the pcb in the embodiment of the present invention;
Fig. 2 is the autocontrol method flow diagram that the PCB of the embodiment of the present invention is laid out;
Fig. 3 corresponding pcb board knot when being the autocontrol method selection edge PTH hole being laid out using the PCB of the embodiment of the present invention Structure schematic diagram;
Fig. 4 is one of the user interface schematic diagram of skill menu of the embodiment of the present invention;
Fig. 5 is the schematic diagram of PCB after the automatic control being laid out using the PCB of the embodiment of the present invention;
Fig. 6 is the automatic control device structural schematic diagram that the PCB of the embodiment of the present invention is laid out.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with attached drawing to the present invention Embodiment be described in detail.It should be noted that in the absence of conflict, embodiment and embodiment in the application In feature can mutual any combination.
Step shown in the flowchart of the accompanying drawings can be in a computer system such as a set of computer executable instructions It executes.Also, although logical order is shown in flow charts, and it in some cases, can be to be different from herein suitable Sequence executes shown or described step.
The encapsulating structure of edge PTH hole in the pcb, as illustrated by figures 1 a-1 c, Fig. 1 a are top view, and innermost circle is PCB Drilling on plate, i.e. edge PTH hole, first annulus outside hole are conductive metallisation annulus pad, such as apply copper coin ring pad, outermost The circle size on side is antipad, and antipad is isolation pad i.e. anti-pad, plays the role of that other conductors are isolated, Conductive properties copper face is such as isolated.In longitudinal 3D figure of Fig. 1 b, it is reduced to two surface layers and internal layer up and down, it is perforative from top to bottom Cylinder is edge PTH hole, and hole wall is coated with metal, such as copper facing, and the annulus around hole is becket (i.e. pad), such as copper ring.It is different conductive Layer, is exactly connected by this edge PTH hole.Longitudinal 2D of Fig. 1 c schemes, and shows each layer respectively.It should be noted that picture is only Citing, the pcb board number of plies is different with characteristic according to each pcb board card function, in addition, because antipad has been buffer action , that play conducting is pad and hole, is not shown in longitudinal 3D figure and longitudinal direction 2D figure.
Based on above structure, the embodiment of the invention discloses a kind of autocontrol methods of PCB layout, as shown in Fig. 2, This method comprises:
Step 201, in PCB layout process, increase new conductive layer;
Step 202, for scheduled edge PTH hole, whether to judge the quantity of the current connected conductive layer of the edge PTH hole Reach the preset maximum number of plies;
Step 203, if it is, by being electrically isolated between the edge PTH hole and newly-increased conductive layer.
In an illustrative embodiment, this method further include: step 204, if it is decided that the layer that edge PTH hole is connected Number does not reach the preset maximum number of plies, then the hole is connected to newly-increased conductive layer, executes the step 201 later, until The number of plies that the edge PTH hole is connected reaches the preset maximum number of plies.
In an illustrative embodiment, the preset maximum number of plies is 3 layers.
In an illustrative embodiment, the scheduled edge PTH hole includes one or more holes with attribute.Wherein, Hole with attribute can be the hole with same power supplies, being 12v such as the hole for the Kong Weitong attribute that voltage is 3v3 or voltage The hole of Kong Weitong attribute.Alternatively, can be the hole with identical signal with the hole of attribute, it is of course also possible to be other attribute phases Same hole.
In an illustrative embodiment, the scheduled edge PTH hole also may include one or more different attributes Hole.
For the edge PTH hole of same attribute, creates and the pad area Jin Bu of the same size is isolated, make to belong to by the area Jin Bu Property edge PTH hole and newly-increased conductive layer be electrically isolated.
For the edge PTH hole of different attribute, the connection for disconnecting the edge PTH hole and newly-increased conductive layer includes: to pass through isolation Pad is electrically isolated the edge PTH hole of different attribute and newly-increased conductive layer.
In an illustrative embodiment, for the hole of different attribute, the preset maximum number of plies can be identical, It can also be different.Such as, for the hole 3v3, the preset maximum number of plies can be 3, and be directed to the hole 12v, and the preset maximum number of plies can be with It is 2.Certainly, the preset maximum number of plies is also possible to other values, and details are not described herein.
To illustrate how the present invention specifically realizes by several specific embodiments below.
Embodiment one:
When the allegro software developed with Cadence company carries out PCB design, by being carried out to candence software Secondary development skill limits the connection number of plies of edge PTH hole, once more than 3 layers connect, behind have again copper face spread incite somebody to action from It is dynamic to be avoided according to the antipad size of edge PTH hole.Specifically, PCB is carried out in the allegro software for being used in the exploitation of Cadence company When design, limits edge PTH hole by writing and connect the number of plies and more than automatically avoiding belonging to according to antipad size after limiting the number of plies The Skill program, is then put into Skill menu, executing the Skill program can be to institute by the skill program of property copper face Connection number of plies requirement in some edge PTH hole settings, the problem for avoiding the edge PTH hole connection number of plies more automatically in layout design.
Specific steps can be such that
1) Skill program is run;
2) edge PTH hole for currently needing to be arranged is selected;
3) OK is clicked after the completion of selection;
4) operation Skill terminates, and exports Done order.
An attribute is arranged to PTH in above-mentioned skill program: maximum connection level number is 3, after 3 layers, skill meeting After the part surface of this edge PTH hole starts counting 3 layers of connection, in the area Jin Bu of remaining level addition antipad size (rout keepout) forbids any copper wire or copper sheet to connect with this hole in this area Jin Bu.It is existing or there is copper face to spread again It goes to avoid automatically.
The skill program that the edge PTH hole connection number of plies is limited by writing, avoids layout engineer from checking and modify manually, It reduces and omits and reduce error rate, effectively improve working efficiency.PCBA plant produced efficiency and pcb board card can quickly be improved Qualification rate.The design time cost of layout engineer and time and the material cost of production and processing can be effectively reduced.From And can solve to manually check and be dug out manually by the time waste of the connection number of plies and omit, when improving the restriction edge PTH hole connection number of plies Working efficiency, and avoid malfunctioning, upper tin is bad when causing production with this to solve the problems, such as that the edge PTH hole connection number of plies is more.
Embodiment two:
The autocontrol method of the PCB layout of the embodiment of the present invention, includes the following steps:
1, as shown in figure 3, the power supply pin to slot slot is configured, such as the hole PTH and right side four of 3 3v3 in left side The edge PTH hole of a 12V.
2, there is following dialog box in operation skill program.It is as shown in Figure 4:
3, selection needs the edge PTH hole being arranged to click OK after choosing by taking 7 edge PTH holes in Fig. 3 as an example.
4, after being provided with, done order is exported.
5, can avoid connection according to the antipad size of edge PTH hole automatically when there is the 4th layer of copper face to spread (is with 12v Example).Its effect is as shown in Figure 5.
In Fig. 3 and Fig. 5, the black region for covering 3V3 is the conductive copper sheet of 3V3 attribute, and the black region for covering 12v is The copper sheet of 12v attribute, the as hole with the conductive copper sheet covering of attribute with attribute, the conductive copper sheet for being shown as same attribute of Fig. 3 There is connection with edge PTH hole, Fig. 5 is to disconnect company with the conductive copper sheet of attribute and edge PTH hole using after methods and apparatus of the present invention It connects.
The method and device can avoid omission and mistake caused by layout engineer's manual operation, improve design effect Rate;Upper tin bad problem when also avoiding the edge PTH hole connection number of plies is more from causing production, improve PCBA factory production efficiency and Product qualification rate;The design and production cost in R & D of complex are reduced simultaneously.Improve Layout design and PCBA production Efficiency reduces manpower, time and material cost.
The embodiment of the invention also discloses a kind of automatic control devices of PCB layout, as shown in Figure 6, comprising:
Memory 601: for storing the program for carrying out automatically controlling;
Processor 602 executes described program, to be used for: when increasing new conductive layer, for scheduled edge PTH hole, sentencing Whether the quantity of the current connected conductive layer of the edge PTH hole of breaking has reached the preset maximum number of plies, if it is, by the PTH It is electrically isolated between hole and newly-increased conductive layer.
In an illustrative embodiment, the processor ought detect the respective menu items in skill menu by point When hitting, the program for carrying out automatically controlling is executed.
In an illustrative embodiment, the processor 602 also executes described program, to be used for: if it is determined that The number of plies that edge PTH hole is connected does not reach the preset maximum number of plies, then the hole is connected to newly-increased conductive layer.
In an illustrative embodiment, the processor 602 also executes described program, to be used for: setting is described pre- If the maximum number of plies be 3 layers.
In an illustrative embodiment, the processor 602 also executes described program, to be used for: setting is described pre- Fixed edge PTH hole is the hole in one or more holes with attribute or one or more different attributes.
In an illustrative embodiment, the processor 602 also executes described program, to be used for: being directed to same attribute Edge PTH hole, creation with the pad area Jin Bu of the same size is isolated, by the area Jin Bu make the edge PTH hole of same attribute with increase newly lead Electric layer is electrically isolated;For the edge PTH hole of different attribute, keep the edge PTH hole of different attribute and newly-increased conductive layer electric by the way that pad is isolated Isolation.
In an illustrative embodiment, for the hole of different attribute, the preset maximum number of plies can be identical, It can also be different.Such as, for the hole 3v3, the preset maximum number of plies can be 3, and be directed to the hole 12v, and the preset maximum number of plies can be with It is 2.Certainly, the preset maximum number of plies is also possible to other values, and details are not described herein.
The above method and device can accurately and efficiently limit the connection number of plies of edge PTH hole, be avoided with this due to edge PTH hole The connection number of plies it is excessive caused by the bad problem of upper tin.
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with attached drawing to the present invention Embodiment be described in detail.It should be noted that in the absence of conflict, embodiment and embodiment in the application In feature can mutual any combination.
Step shown in the flowchart of the accompanying drawings can be in a computer system such as a set of computer executable instructions It executes.Also, although logical order is shown in flow charts, and it in some cases, can be to be different from herein suitable Sequence executes shown or described step.
It will appreciated by the skilled person that whole or certain steps, system in method disclosed hereinabove, Functional module/unit in device may be implemented as software, firmware, hardware and its combination appropriate.In hardware embodiment In, the division between functional module/unit referred in the above description not necessarily corresponds to the division of physical assemblies;For example, One physical assemblies can have multiple functions or a function or step and can be executed by several physical assemblies cooperations.Certain A little components or all components may be implemented as by processor, such as the software that digital signal processor or microprocessor execute, or Person is implemented as hardware, or is implemented as integrated circuit, such as specific integrated circuit.Such software can be distributed in calculating On machine readable medium, computer-readable medium may include computer storage medium (or non-transitory medium) and communication media (or fugitive medium).As known to a person of ordinary skill in the art, term computer storage medium is included in for storing letter Implement in any method or technique of breath (such as computer readable instructions, data structure, program module or other data) easy The property lost and non-volatile, removable and nonremovable medium.Computer storage medium include but is not limited to RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storages, magnetic holder, magnetic Band, disk storage or other magnetic memory apparatus or it can be used for storing desired information and can be accessed by a computer Any other medium.In addition, known to a person of ordinary skill in the art be, communication media generally comprises computer-readable finger It enables, other numbers in the modulated data signal of data structure, program module or such as carrier wave or other transmission mechanisms etc According to, and may include any information delivery media.

Claims (10)

1. a kind of autocontrol method of printing board PCB layout characterized by comprising in PCB layout process, when When increasing new conductive layer, for scheduled edge PTH hole, whether the quantity of the current connected conductive layer of the edge PTH hole is judged Reach the preset maximum number of plies, if it is, by being electrically isolated between the edge PTH hole and newly-increased conductive layer.
2. the autocontrol method of PCB layout as described in claim 1, which is characterized in that the preset maximum number of plies is 3 Layer.
3. the autocontrol method of PCB according to claim 1 layout, which is characterized in that the scheduled edge PTH hole includes One or more hole with the hole of attribute or one or more different attribute.
4. the autocontrol method of PCB according to claim 3 layout, which is characterized in that for the edge PTH hole of same attribute, The step of connection for disconnecting the edge PTH hole and the conductive layer increased newly includes: creation and the pad area Jin Bu of the same size is isolated, The edge PTH hole of same attribute and newly-increased conductive layer are electrically isolated by the area Jin Bu.
5. the autocontrol method of PCB layout according to claim 3, which is characterized in that for the PTH of different attribute The step of hole, the connection for disconnecting the edge PTH hole and newly-increased conductive layer includes: to make the PTH of different attribute by the way that pad is isolated Hole and newly-increased conductive layer are electrically isolated.
6. a kind of automatic control device of printing board PCB layout, which is characterized in that the device includes:
Memory: for storing the program for carrying out automatically controlling;
Processor, for executing the program for carrying out automatically controlling, to be used for: when increasing new conductive layer, for Scheduled edge PTH hole, judges whether the quantity of the current connected conductive layer of the edge PTH hole has reached the preset maximum number of plies, such as Fruit is will to be then electrically isolated between the edge PTH hole and newly-increased conductive layer.
7. the automatic control device of PCB layout as claimed in claim 6, which is characterized in that the processor, which is worked as, to be detected When respective menu items in skill menu are clicked, the program for carrying out automatically controlling is executed.
8. the automatic control device of PCB layout as claimed in claim 6, which is characterized in that described in the processor also executes Program, to be used for: the setting preset maximum number of plies is 3 layers.
9. the automatic control device of PCB layout as claimed in claim 6, which is characterized in that described in the processor also executes Program, to be used for: the setting scheduled edge PTH hole is one or more holes with attribute or one or more different attributes Hole.
10. the automatic control device of PCB layout as claimed in claim 9, which is characterized in that described in the processor also executes Program, to be used for:
For the edge PTH hole of same attribute, creates and the pad area Jin Bu of the same size is isolated, same attribute is made by the area Jin Bu Edge PTH hole and newly-increased conductive layer are electrically isolated;
For the edge PTH hole of different attribute, it is electrically isolated the edge PTH hole of different attribute and newly-increased conductive layer by the way that pad is isolated.
CN201811619143.5A 2018-12-28 2018-12-28 Automatic control method and device for PCB layout Active CN109600938B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114218886A (en) * 2021-11-29 2022-03-22 北京百度网讯科技有限公司 Method and device for realizing patterned bonding pad, electronic equipment and storage medium

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CN101557675A (en) * 2008-04-11 2009-10-14 鸿富锦精密工业(深圳)有限公司 Printed circuit board and wiring method thereof
CN104427788A (en) * 2013-09-10 2015-03-18 上海空间电源研究所 Through hole setting method and structure of multi-layer power printed circuit board for power supply controller
CN104470203A (en) * 2013-09-25 2015-03-25 深南电路有限公司 HDI circuit board and interlayer interconnection structure and machining method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060223236A1 (en) * 2005-03-30 2006-10-05 Shinko Electric Industries Co., Ltd. Method of manufacturing flexible circuit substrate
CN101557675A (en) * 2008-04-11 2009-10-14 鸿富锦精密工业(深圳)有限公司 Printed circuit board and wiring method thereof
CN104427788A (en) * 2013-09-10 2015-03-18 上海空间电源研究所 Through hole setting method and structure of multi-layer power printed circuit board for power supply controller
CN104470203A (en) * 2013-09-25 2015-03-25 深南电路有限公司 HDI circuit board and interlayer interconnection structure and machining method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114218886A (en) * 2021-11-29 2022-03-22 北京百度网讯科技有限公司 Method and device for realizing patterned bonding pad, electronic equipment and storage medium

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