CN109597654A - Initialization of register method, the generation method and embedded system of configurations table - Google Patents

Initialization of register method, the generation method and embedded system of configurations table Download PDF

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Publication number
CN109597654A
CN109597654A CN201811496343.6A CN201811496343A CN109597654A CN 109597654 A CN109597654 A CN 109597654A CN 201811496343 A CN201811496343 A CN 201811496343A CN 109597654 A CN109597654 A CN 109597654A
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memory
register
configurations table
updated
dma controller
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CN109597654B (en
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刘练
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Hunan Goke Microelectronics Co Ltd
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Hunan Goke Microelectronics Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping
    • G06F9/4403Processor initialisation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/65Updates

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  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

The present invention relates to field of embedded technology, a kind of initialization of register method, the generation method and embedded system of configurations table are provided, which comprises store the configurations table that first memory stores to second memory by dma controller;The configurations table in second memory is updated according to preset rules by processor;By dma controller according to updated configurations table initialization register.Compared with prior art, the present invention is by being organized into configurations table according to preset order for the basic value of the register in embedded system, dma controller is responsible for configurations table and copies to second memory from first memory and copy to register from second memory, processor is responsible in second memory being on demand updated configurations table, the utilization rate of processor in embedded system initialization procedure is reduced, to substantially reduce the time of embedded system initialization.

Description

Initialization of register method, the generation method and embedded system of configurations table
Technical field
The present invention relates to field of embedded technology, in particular to a kind of initialization of register method, configurations table Generation method and embedded system.
Background technique
In order to make the various peripheral hardwares in embedded system according to preset mode of operation, need in embedded system All registers in all peripheral hardwares are initialized when electric, the prior art will be written the operation of initialization of register and be embedded in In the bootstrap of formula, when powering on, bootstrap is run by processor, the initialization of register is realized, with embedded system Using more and more extensive, embedded system also becomes increasingly complex, and the quantity for the register being directed to also increases severely therewith, deposit Device generally requires to configure a large amount of table and parameter when initializing, for this scene, in the prior art processor to register into The longer execution time is often expended when row initialization, causes the initialization time of embedded system to be increased sharply, significantly impacts use Family experience.
Summary of the invention
The embodiment of the present invention be designed to provide a kind of initialization of register method, the generation method of configurations table and Embedded system, by the way that the basic value of the register in embedded system is organized into configurations table according to preset order, directly It connects memory access (Direct Memory Access, DMA) controller and is responsible for configurations table and copy to from first memory Two memories and register is copied to from second memory, processor is responsible on demand matching basis in second memory It sets table to be updated, reduces the utilization rate of processor in embedded system initialization procedure, to substantially reduce embedded The time of system initialization.
To achieve the goals above, technical solution used in the embodiment of the present invention is as follows:
In a first aspect, being applied to embedded system, insertion the embodiment of the invention provides a kind of initialization of register method Formula system includes first memory, second memory, register, dma controller and processor, first memory, the second storage Device and register are sequentially connected electrically, and dma controller is electrically connected with first memory, second memory and register, processor It is electrically connected with second memory and dma controller, which comprises stored first memory by dma controller Configurations table is stored to second memory, wherein configurations table includes the corresponding basic value of register;It is pressed by processor The configurations table in second memory is updated according to preset rules;By dma controller according in second memory Updated configurations table initialization register.
Second aspect, the embodiment of the invention also provides a kind of generation methods of configurations table, are applied to embedded system System, the embedded system include first memory, second memory, multiple registers, dma controller and processor, described Method includes: that each register is numbered according to preset order;Obtain the basic value of each register, and by each deposit The basic value of device is organized into configurations table so that configurations table is used to deposit by dma controller from first according to preset order Reservoir store to second memory and for being updated in second memory by processor according to preset rules, with And for passing through dma controller initialization register after updating.
The third aspect, the embodiment of the invention also provides a kind of embedded system, embedded system include first memory, Second memory, register, dma controller and processor, first memory, second memory and register are sequentially connected electrically, Dma controller is electrically connected with first memory, second memory and register, and processor and second memory and DMA control Device is electrically connected;Dma controller is for storing the configurations table that first memory stores to second memory, wherein base Plinth allocation list includes the corresponding basic value of register;Processor is used for according to preset rules to the configurations in second memory Table is updated;Dma controller is used for according to updated configurations table initialization register.
Compared with the prior art, the generation of a kind of initialization of register method, configurations table provided in an embodiment of the present invention Method and embedded system, firstly, dma controller sends to processor and obtains bus control right when embedded system powers on Request stores the configurations table that first memory stores to second memory after obtaining bus control right;Next, Processor is updated the configurations table in second memory according to preset rules, finally, dma controller is sent out to processor The request for obtaining bus control right is sent, after obtaining bus control right, according to updated configurations table initialization register. Compared with prior art, the embodiment of the present invention by by the basic value of the register in embedded system according to preset order tissue At configurations table, dma controller is responsible for configurations table and copies to second memory from first memory and deposit from second Reservoir copies to register, and processor is responsible in second memory being on demand updated configurations table, be reduced embedding The utilization rate of processor in embedded system initialization procedure, to substantially reduce the time of embedded system initialization.
To enable the above objects, features and advantages of the present invention to be clearer and more comprehensible, special embodiment below, and appended by cooperation Attached drawing is described in detail below.
Detailed description of the invention
In order to illustrate the technical solution of the embodiments of the present invention more clearly, below will be to needed in the embodiment attached Figure is briefly described, it should be understood that the following drawings illustrates only certain embodiments of the present invention, therefore is not construed as pair The restriction of range for those of ordinary skill in the art without creative efforts, can also be according to this A little attached drawings obtain other relevant attached drawings.
Fig. 1 shows embedded system structure schematic diagram provided in an embodiment of the present invention.
Fig. 2 shows the update exemplary diagrams of the configurations table in the second memory of the invention for implementing to provide.
Fig. 3 shows configurations table provided in an embodiment of the present invention in first memory, second memory and register Between the exemplary diagram successively transmitted.
Fig. 4 shows the exemplary diagram of configurations table provided in an embodiment of the present invention.
Fig. 5 shows a kind of initialization of register method flow diagram provided in an embodiment of the present invention.
Fig. 6 shows another initialization of register method flow diagram provided in an embodiment of the present invention.
Fig. 7 shows another initialization of register method flow diagram provided in an embodiment of the present invention.
Fig. 8 shows the generation method flow chart of configurations table provided in an embodiment of the present invention.
Icon: 10- first memory;20- second memory;30- processor;40-DMA controller;50- external equipment; 501- register;60- system bus.
Specific embodiment
Below in conjunction with attached drawing in the embodiment of the present invention, technical solution in the embodiment of the present invention carries out clear, complete Ground description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.Usually exist The component of the embodiment of the present invention described and illustrated in attached drawing can be arranged and be designed with a variety of different configurations herein.Cause This, is not intended to limit claimed invention to the detailed description of the embodiment of the present invention provided in the accompanying drawings below Range, but it is merely representative of selected embodiment of the invention.Based on the embodiment of the present invention, those skilled in the art are not doing Every other embodiment obtained under the premise of creative work out, shall fall within the protection scope of the present invention.
It should also be noted that similar label and letter indicate similar terms in following attached drawing, therefore, once a certain Xiang Yi It is defined in a attached drawing, does not then need that it is further defined and explained in subsequent attached drawing.Meanwhile of the invention In description, term " first ", " second " etc. are only used for distinguishing description, are not understood to indicate or imply relative importance.
Fig. 1 is please referred to, Fig. 1 shows embedded system structure schematic diagram provided in an embodiment of the present invention.In Fig. 1, insertion Formula system includes first memory 10, second memory 20, processor 30, dma controller 40, external equipment 50 and system bus 60, external equipment 50 includes register 501, and first memory 10, second memory 20 and register 501 are sequentially connected electrically, DMA Controller 40 is electrically connected with first memory 10, second memory 20 and register 501, processor 30 and second memory 20 It is electrically connected with dma controller 40, first memory 10, second memory 20, processor 30, dma controller 40, external equipment 50 are electrically connected with system bus 60.
First memory 10 is for being stored in advance configurations table, wherein includes according to register 501 in configurations table The basic value of correspondence register 501 that is arranged successively of number.First memory 10 can be non-volatile memory medium, for example, Flash storage, read-only memory, Erasable Programmable Read Only Memory EPROM etc..
Second memory 20 is used for when embedded system powers on, and stores the configurations read from first memory 10 Table.Second memory 20 can be volatile storage medium, for example, Static RAM, dynamic RAM etc..
Processor 30 is for being updated the configurations table in second memory 20 according to preset rules, firstly, place Manage the default initial address for the configurations table that device 30 obtains in second memory 20;Then, processor 30 is according to preset rules Determine the number and updated value of register 501 to be updated;Next, processor 30 is according to initial address and register to be updated 501 number determines the destination address of basic value to be updated in second memory 20;Finally, processor 30 by updated value more Newly into the destination address, to replace basic value to be updated, to be deposited for example, Fig. 2 shows provided in an embodiment of the present invention second The update exemplary diagram of configurations table in reservoir 20 includes 3 basic values in configurations table, wherein 12 be 0# register Basic value, 34 be the basic value of 1# register, 56 be 2# register basic value, each basic value is in second memory 20 4 bytes are accounted for, presetting address of the basic value of 0# register in second memory 20 is 0X0000_0000,1# deposit The basic value of device and the basic value of 2# register are successively stored in the address of second memory 20 respectively from 0X0000_0000 In 0X0000_0004 and 0X0000_0008, processor 30 determines that the number of register 501 to be updated is 2# according to preset rules, Updated value is 11, then destination address of the 2# register in second memory 20 are as follows: 0X0000_0000+4*2=0X0000_ 0008, updated value 11 is updated to 0X0000_0008 in the destination address by processor 20.
Dma controller 40 is used to store the configurations table that first memory 10 stores to second memory 20, and According to the updated configurations table initialization register 501 stored in second memory 20, when dma controller 40 need by When the configurations table that first memory 10 stores is stored to second memory 20, the first DMA is initiated to processor 30 first and is asked It asks, processor 30 responds first DMA request and the controller of system bus 60 is transferred to dma controller 40, and then DMA is controlled The configurations table that first memory 10 stores successively is transmitted in the second memory 20 by device 40 by system bus 60 The initial address of configurations table is stored, when dma controller 40 is needed according to the base in updated second memory 20 When plinth allocation list initialization register 501, the second DMA request is initiated to processor 30 first, processor 30 responds the 2nd DMA The controller of system bus 60 is transferred to dma controller 40 by request, and then dma controller 40 passes through system bus 60 for second The configurations table that memory 20 stores successively is transmitted in corresponding register 501, and with initialization register 501, Fig. 3 is shown Configurations table provided in an embodiment of the present invention between first memory 10, second memory 20 and the register 501 successively The exemplary diagram of transmission, in Fig. 3, register 501 shares 3 in embedded system, be respectively as follows: 0# register, 1# register and 2# register, it is suitable according to the arrangement of 0# register, 1# register and 2# register in the configurations table in first memory 10 Sequence successively stores the basic value 56 of the basic value 12 of 0# register, the basic value 34 of 1# register and 2# register, DMA control Device 40 stores the configurations table in first memory 10 into second memory 20, and processor 30 is according to preset rules by The basic value 34 of 1# register is revised as 11 in two memories 20, and dma controller 40 will be in modified second memory 20 Configurations table is successively stored into corresponding register 501, i.e., the basic value stored in 0# register is initialized to 12,1# The basic value that the basic value stored in register is initialized to store in 11,2# register is initialized to 56.
External equipment 50 can be multiple, include at least one register 501 in each external equipment 50, multiple outsides are set Standby 50 number according to preset order, and then, multiple registers 501 in each external equipment 50 are also numbered according to preset order, When there is multiple external equipments 50, the basic value of the register 501 of configurations table storage is arranged according to the number of external equipment 50 Column, wherein the number of the register 501 in each external equipment 50 arranges, for example, Fig. 4 shows offer of the embodiment of the present invention Configurations table exemplary diagram, in Fig. 4, embedded system includes 2 external equipments 50, is respectively as follows: 0# external equipment, outside 1# Portion's equipment, 0# external equipment include 3 registers 501, are respectively as follows: 0# register, 1# register and 2# register, set outside 1# Standby includes 3 registers 501, is respectively as follows: 3# register, 4# register, then the basic value stored in configurations table is successively right The register 501 answered are as follows: 0# register, 1# register, 2# register, 3# register, 4# register.
System bus 60 be used under the control of dma controller 40 by the configurations table in first memory 10 store to In second memory 20, the configurations table in modified second memory 20 is stored into corresponding register 501, most The initialization of register 501 is completed eventually.
Compared with prior art, the embodiment of the present invention has the advantages that
Firstly, since in embedded system the basic value of most of register 501 be it is not changed, will be embedded The basic value of all registers 501 in system is stored in advance into first memory 10, in the process that register 501 initializes In, processor 30 need to carry out more according to basic value of the preset rules to some registers 501 corresponding in configurations table Newly, the utilization rate of processor 30 is significantly reduced, allow processor 30 in embedded system initialization procedure and is distributed At other relevant operations, the time of embedded system initialization is considerably reduced.
Secondly, use dma controller 40 to be transmitted to configurations table in second memory 20 from first memory 10, with And be transmitted in corresponding register 501 from second memory 20, this data transfer mode efficiency of transmission is high, reduces initial Change the processing time of register 501, and then reduces the time of embedded system initialization on the whole.
Again, since first memory 10 is nonvolatile memory, configurations table is solidificated in first memory 10 In, so that configurations table will not be lost because of power down.
Finally, due to the readwrite performance of second memory 20 is higher than first memory 10, after powering on by configurations table from First memory 10 is stored to second memory 20, is updated in second memory 20 according to preset rules, so that basic The renewal speed of allocation list is fast, high-efficient.
The embedded system provided based on the above embodiment, the embodiment of the invention also provides be applied to the embedded system 501 initial method of register embodiment, referring to figure 5., Fig. 5 shows a kind of register provided in an embodiment of the present invention Initial method flow chart, the described method comprises the following steps:
Step 101, the configurations table that first memory stores is stored to second memory by dma controller.
In embodiments of the present invention, register 501 is pressed into preset order number consecutively, the register in configurations table 501 basic value is arranged according to the number of register 501, in the configurations table and second memory 20 in first memory 10 Configurations table in the basic value of register 501 that stores and its put in order it is completely the same, due to first memory 10 Reading and writing data speed is slower than the reading and writing data speed of second memory 20, therefore, by the configurations table in first memory 10 It is stored by dma controller 40 into second memory 20, processor 30 can be made to match in second memory 20 to basis Setting renewal speed when table is updated, faster, to improve the efficiency of the initialization of register 501, final realize shortens embedded system The purpose of system initialization time.
Step 102, the configurations table in second memory is updated according to preset rules by processor.
In embodiments of the present invention, why configurations table is updated in second memory 20, is because the The data read-write efficiency of two memories 20 is higher than first memory 10, it is thus possible to improve processor 30 updates configurations table Efficiency.
Step 103, deposit is initialized according to the updated configurations table in second memory by dma controller Device.
In embodiments of the present invention, DMA is according to corresponding to register in configurations table in updated second memory 20 The arrangement sequencing of 501 basic value will successively correspond to the basis of register 501 in configurations table in second memory 20 Value is transmitted to corresponding register 501, completes the initialization of corresponding register 501.
Further, processor 30 can determine the basic value of register 501 to be updated according to preset rules Address and updated value in two memories 20, the application provides a kind of possible implementation, and on the basis of Fig. 5, Fig. 6 is this Another initialization of register method flow diagram that inventive embodiments provide, referring to Fig. 6, step 102 this method specifically includes:
Step 102-1, the default initial address of the configurations table in second memory is obtained;
Step 102-2, the number and updated value of register to be updated are determined according to preset rules;
Step 102-3, the number according to initial address and register to be updated determines that basic value to be updated is deposited second Destination address in reservoir;
Step 102-4, updated value is updated in destination address, to replace basic value to be updated.
In the embodiment of the present invention, since the quantity for the register 501 for needing to update basic value in embedded system is to account for less Several, therefore, processor 30 only needs the basic value to register 501 a small number of in second memory 20 to be updated, greatly Ground reduces the utilization rate of processor 30, shortens the time-consuming of initialization register 501.
Further, the configurations table in first memory 10 can be transmitted to second memory by dma controller 40 It is stored in 20, and the updated configurations table in second memory 20 is transmitted in corresponding register 501 with first The corresponding register 501 of beginningization, the application provides a kind of possible implementation, and on the basis of Fig. 6, Fig. 7 is that the present invention is real Another initialization of register method flow diagram of example offer is applied, referring to Fig. 7, step 101 this method specifically includes:
Step 101-1, the first DMA request is initiated to processor, so that the first DMA request of processor response is by system bus Control right transfer to dma controller;
Step 101-2, the configurations table that first memory stores is transmitted in second memory by system bus Storage;
Step 103, it specifically includes:
Step 103-1, the second DMA request is initiated to processor, so that the second DMA request of processor response is by system bus Control right transfer to dma controller;
Step 103-2, the configurations table that second memory stores is transmitted to by register by system bus, with initial Change register.
In embodiments of the present invention, the transmission of basic value in configurations table, pole are carried out due to using dma controller 40 The earth saves configurations table and is transmitted to second memory 20 from first memory 10 and is transmitted to from second memory 20 The transmission time of register 501 further reduces the time-consuming of initialization register 501.
In embodiments of the present invention, configurations table can pre-generate, in order to cooperate provided in an embodiment of the present invention post Storage initial method improves the speed for passing through configurations table initialization register 501, and the embodiment of the invention provides one kind The step of generation method of configurations table, please refers to Fig. 8, the generation method of configurations table include:
Step 201, each register is numbered according to preset order;
In embodiments of the present invention, the number order of each register 501 can be fixed in advance according to the demand of actual scene Justice.
Step 202, the basic value of each register is obtained, and by the basic value of each register according to preset order tissue At configurations table so that configurations table be used to store from first memory to second memory by dma controller and For being updated in second memory by processor according to preset rules and for passing through dma controller after updating Initialization register.
In embodiments of the present invention, preset order be not limited to be incremented by according to number or successively decrease according to number or other Sequentially, as long as basic value and register 501 correspond in configurations table.Configurations table is in first memory 10 Storage mode, the sequence that can be incremented by according to address, can also be according to the sequence of decreasing addresses, wherein is incremented by according to address Sequence carries out being stored as preferred storage mode, because the sequential storage being incremented by using address, is matched basis by dma controller 40 Set biography when table is transmitted into second memory 20 from first memory 10 and is transmitted to register 501 from second memory 20 Defeated speed faster, finally makes 501 initial procedure of register more efficient.
It should be noted that as an implementation, the basic value in configurations table can be aligned with 32bit to be carried out Storage, it is therefore an objective to which basic value can be quickly located in first memory according to the number of the corresponding register 501 of basic value Thus storage address in 10 improves the speed for updating configurations table.
It should also be noted that, configurations table is in the storage mode and second memory 20 in first memory 10 Storage mode is consistent, and purpose is transmitted into second memory 20 also for making configurations table from first memory 10 When transmission speed faster.
In conclusion a kind of initialization of register method provided by the invention, the generation method and insertion of configurations table Formula system, the method are applied to the embedded system, and embedded system includes first memory, second memory, deposit Device, dma controller and processor, first memory, second memory and register are sequentially connected electrically, dma controller and first Memory, second memory and register are electrically connected, and processor is electrically connected with second memory and dma controller, described Method includes: to be stored the configurations table that first memory stores to second memory by dma controller, wherein basis Allocation list includes the corresponding basic value of register;By processor according to preset rules to the configurations table in second memory It is updated;By dma controller according to the updated configurations table initialization register in second memory.With it is existing Technology is compared, and the present invention is by being organized into configurations according to preset order for the basic value of the register in embedded system Table, dma controller are responsible for configurations table and copy to second memory from first memory and copy to from second memory Register, processor is responsible in second memory being on demand updated configurations table, at the beginning of reducing embedded system The utilization rate of processor during beginningization, to substantially reduce the time of embedded system initialization.
In several embodiments provided herein, it should be understood that disclosed device and method can also pass through Other modes are realized.The apparatus embodiments described above are merely exemplary, for example, flow chart and block diagram in attached drawing Show the device of multiple embodiments according to the present invention, the architectural framework in the cards of method and computer program product, Function and operation.In this regard, each box in flowchart or block diagram can represent the one of a module, section or code Part, a part of the module, section or code, which includes that one or more is for implementing the specified logical function, to be held Row instruction.It should also be noted that function marked in the box can also be to be different from some implementations as replacement The sequence marked in attached drawing occurs.For example, two continuous boxes can actually be basically executed in parallel, they are sometimes It can execute in the opposite order, this depends on the function involved.It is also noted that every in block diagram and or flow chart The combination of box in a box and block diagram and or flow chart can use the dedicated base for executing defined function or movement It realizes, or can realize using a combination of dedicated hardware and computer instructions in the system of hardware.
In addition, each functional module in each embodiment of the present invention can integrate one independent portion of formation together Point, it is also possible to modules individualism, an independent part can also be integrated to form with two or more modules.
It, can be with if the function is realized and when sold or used as an independent product in the form of software function module It is stored in a computer readable storage medium.Based on this understanding, technical solution of the present invention is substantially in other words The part of the part that contributes to existing technology or the technical solution can be embodied in the form of software products, the meter Calculation machine software product is stored in a storage medium, including some instructions are used so that a computer equipment (can be a People's computer, server or network equipment etc.) it performs all or part of the steps of the method described in the various embodiments of the present invention. And storage medium above-mentioned includes: that USB flash disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), arbitrary access are deposited The various media that can store program code such as reservoir (RAM, Random Access Memory), magnetic or disk.It needs Illustrate, herein, relational terms such as first and second and the like be used merely to by an entity or operation with Another entity or operation distinguish, and without necessarily requiring or implying between these entities or operation, there are any this realities The relationship or sequence on border.Moreover, the terms "include", "comprise" or its any other variant are intended to the packet of nonexcludability Contain, so that the process, method, article or equipment for including a series of elements not only includes those elements, but also including Other elements that are not explicitly listed, or further include for elements inherent to such a process, method, article, or device. In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that including the element Process, method, article or equipment in there is also other identical elements.
The foregoing is only a preferred embodiment of the present invention, is not intended to restrict the invention, for the skill of this field For art personnel, the invention may be variously modified and varied.All within the spirits and principles of the present invention, made any to repair Change, equivalent replacement, improvement etc., should all be included in the protection scope of the present invention.It should also be noted that similar label and letter exist Similar terms are indicated in following attached drawing, therefore, once being defined in a certain Xiang Yi attached drawing, are then not required in subsequent attached drawing It is further defined and explained.

Claims (10)

1. a kind of initialization of register method is applied to embedded system, which is characterized in that the embedded system includes first Memory, second memory, register, dma controller and processor, which comprises
The configurations table that the first memory stores is stored to the second memory by the dma controller, In, the configurations table includes the corresponding basic value of the register;
The configurations table in the second memory is updated according to preset rules by the processor;
It is posted by the dma controller according to described in the updated configurations table initialization in the second memory Storage.
2. initialization of register method as described in claim 1, which is characterized in that the register is multiple and suitable by presetting Sequence number consecutively includes and the one-to-one basic value of the number of each register in the configurations table.
3. initialization of register method as claimed in claim 2, which is characterized in that it is described by the processor according to default The step of rule is updated the configurations table in the second memory, comprising:
Obtain the default initial address of the configurations table in the second memory;
The number and updated value of register to be updated are determined according to preset rules;
Number according to the initial address and the register to be updated determines basic value to be updated in second storage Destination address in device;
The updated value is updated in the destination address, to replace basic value to be updated.
4. initialization of register method as described in claim 1, which is characterized in that it is described by the dma controller by institute State the step of configurations table of first memory storage is stored to the second memory, comprising:
The first DMA request is initiated to the processor, so that the first DMA request described in the processor response is by system bus Control right transfer is to the dma controller;
The configurations table that first memory stores is transmitted in the second memory by the system bus and is stored.
5. initialization of register method as described in claim 1, which is characterized in that described to pass through the dma controller foundation The step of updated configurations table in second memory initializes the register, comprising:
The second DMA request is initiated to the processor, so that the second DMA request described in the processor response is by system bus Control right transfer is to the dma controller;
The configurations table that second memory stores is transmitted to the register by the system bus, described in initialization Register.
6. a kind of generation method of configurations table, it is applied to embedded system, which is characterized in that the embedded system includes First memory, second memory, multiple registers, dma controller and processor, which comprises
Each register is numbered according to preset order;
The basic value of each register is obtained, and the basic value of each register is organized into base according to preset order Plinth allocation list is so that the configurations table is used to store from the first memory to described second by the dma controller Memory and for being updated and being used in the second memory according to preset rules by the processor The register is initialized by the dma controller after update.
7. the generation method of configurations table as claimed in claim 6, which is characterized in that the basis in the configurations table Value is stored in advance with 32bit alignment into the first memory.
8. the generation method of configurations table as claimed in claim 7, which is characterized in that the basis in the configurations table Value is incremented by form according to address and is stored.
9. a kind of embedded system, which is characterized in that the embedded system includes first memory, second memory, deposit Device, dma controller and processor, the first memory, the second memory and the register are sequentially connected electrically, described Dma controller is electrically connected with the first memory, the second memory and the register, the processor with it is described Second memory and the dma controller are electrically connected;
The dma controller is used to store the configurations table that the first memory stores to the second memory, In, the configurations table includes the corresponding basic value of the register;
The processor is for being updated the configurations table in the second memory according to preset rules;
The dma controller is used to post according to described in the updated configurations table initialization in the second memory Storage.
10. a kind of embedded system as claimed in claim 9, which is characterized in that the first memory is non-volatile deposits Storage media, the second memory is volatile storage mediums and the performance of the second memory is higher than first storage Device.
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