CN109581917A - A kind of control device that GNSS pulse per second (PPS) smoothly exports - Google Patents
A kind of control device that GNSS pulse per second (PPS) smoothly exports Download PDFInfo
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- CN109581917A CN109581917A CN201811426449.9A CN201811426449A CN109581917A CN 109581917 A CN109581917 A CN 109581917A CN 201811426449 A CN201811426449 A CN 201811426449A CN 109581917 A CN109581917 A CN 109581917A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/21—Pc I-O input output
- G05B2219/21109—Field programmable gate array, fpga as I-O module
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
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Abstract
The invention discloses a kind of control devices that GNSS pulse per second (PPS) smoothly exports, the first port of GNSS input pulse per second (PPS) is received including one, the time stamp of one record input pulse per second (PPS) beats time stamp module, one receives the second port of navigation equipment unified standard interface protocol, and TAI/UTC time module, the TAI/UTC time module obtains the TAI/UTC time being aligned with the input pulse per second (PPS) by the second port, it further include a software time stamp processing module, it include the complete time stamp buffer area of software in the software time stamp processing module, and software time stamp Processing Algorithm treatment region, the software time stamp processing module passes through the time stab information for knowing input pulse per second (PPS) and TAI/UTC temporal information and combines the complete time stamp caching of software, and it is handled by software time stamp Algorithm fits output pulse per second (PPS) curve and is cached in FPGA nanosecond time stamp caching, and output pulse per second (PPS) processing judging module exports the corresponding current address value of pulse per second (PPS) curve according to real-time judge and local nanosecond counter status exports pulse per second (PPS).
Description
Technical field
The present invention relates to satellite navigation system, especially a kind of control device that GNSS pulse per second (PPS) smoothly exports.
Background technique
GNSS Global Satellite Navigation System is using observed quantities such as the pseudorange of one group of satellite, ephemeris, satellite launch times
, while must also be noted that user's clock deviation.Global Navigation Satellite System is can at the earth's surface or any place of terrestrial space
The space base radio-navigation positioning system of round-the-clock 3 dimension coordinate and speed and temporal information is provided for user.
And in the prior art, the characteristics of pulse per second (PPS) is that short term jitter is larger, and long-term second deviation levels off to 0, and GNSS chip
When mould group loses satellite connection, output pulse per second (PPS) is interrupted, these cause the pulse per second (PPS) of navigation to go wrong, to influence system
It operates normally.
Summary of the invention
Present invention purpose to be achieved is just to provide a kind of control device that GNSS pulse per second (PPS) smoothly exports, it is ensured that system
Reliability service, and software and hardware is made full use of to divide the work, so that system is more convenient and reliable.
In order to achieve the above object, the present invention adopts the following technical scheme: a kind of control that GNSS pulse per second (PPS) smoothly exports
Device, the time stamp for inputting pulse per second (PPS) is recorded including a first port for receiving GNSS input pulse per second (PPS), one beats time stamp mould
Block, one receive navigation equipment unified standard interface protocol second port and TAI/UTC time module, the TAI/UTC
Time module obtains the TAI/UTC time being aligned with the input pulse per second (PPS) by the second port, further includes a software
Time stamp processing module includes the complete time stamp buffer area of software and the processing of software time stamp in the software time stamp processing module
Algorithm process area, the software time stamp processing module, which passes through, knows that the time stab information of input pulse per second (PPS) and TAI/UTC time are believed
It ceases and combines the complete time stamp caching of software, and output pulse per second (PPS) curve is fitted by software time stamp Processing Algorithm and is cached in
FPGA nanosecond time stamp caching, output pulse per second (PPS) processing judging module export the corresponding current position of pulse per second (PPS) curve according to real-time judge
Location value and local nanosecond counter status export pulse per second (PPS).
Further, further include high-precision local oscillations clock circuit, provide one to the local nanosecond counter
Clock reference safeguards the operation of the local nanosecond counter.
Further, the local oscillations clock is High Precision Crystal Oscillator, and the frequency of oscillation of the crystal oscillator is 25MHZ.
Further, the TAI/UTC time module includes TAI/UTC time extraction module and TAI/UTC time dimension
Module is protected, the TAI/UTC time extraction module obtains corresponding temporal information by second port and gives TAI/UTC time maintenance mould
Block, the output pulse per second (PPS) maintenance that the TAI/UTC time maintenance module passes through feedback again obtain the TAI/UTC time.
Further, including a software time stamp interface, the software time stamp interface will input the time stab information of pulse per second (PPS)
And TAI/UTC temporal information is given to software time stamp processing module by Local Bus bus.
Further, when inputting the arrival of pulse per second (PPS) rising edge, the numerical value ns_cnt_ of NS_CNT nanosecond counter is recorded
Pps, and the input pulse per second (PPS) timestamp value is passed to software time stamp interface.
Further, software time stamp processing module needs to record the input pulse per second (PPS) time stamp in S of past period
Value, and pulse per second (PPS) timestamp value is inputted according to the series and fits the polynomial curve of a N rank, and is derived according to the multinomial
The match value at the pulse per second (PPS) arrival moment in following a period of time.
Further, through in software algorithm treated match value needs to be filled into FPGA nanosecond time stamp caching, FPGA is received
The scale of second time stamp caching is 1 second, and depth is T seconds.
Further, the read/write address of FPGA nanosecond time stamp caching is the second part after converting the TAI/UTC time.
Further, output pulse per second (PPS) processing decision circuit real-time judge current address time stamp cache size and local nanosecond count
Whether number devices are equal, when the two is equal or mutual added time, then carry out output pulse per second (PPS).
After adopting the above technical scheme, the present invention has the advantage that by software and hardware function division, very by required precision
Hardware/FPGA processing is transferred in high time stamp sampling and the very high pulse per second (PPS) of reliability requirement periodically output, and by complicated N rank
Polynomial fitting transfers to software to handle, and increases the flexibility of algorithm upgrading.Input pulse per second (PPS) interruption can be resisted, software collapses
The failures such as routed, are greatly improved the reliability of output pulse per second (PPS).
Detailed description of the invention
The present invention will be further explained below with reference to the attached drawings:
Fig. 1 is the system block diagram for the control device embodiment that GNSS pulse per second (PPS) of the present invention smoothly exports；
Ideal time stamp schematic diagram in the control device embodiment that Fig. 2 smoothly exports for GNSS pulse per second (PPS) of the present invention；
Practical time stamp schematic diagram in the control device embodiment that Fig. 3 smoothly exports for GNSS pulse per second (PPS) of the present invention；
Software is fitted schematic diagram in the control device embodiment that Fig. 4 smoothly exports for GNSS pulse per second (PPS) of the present invention.
Specific embodiment
In the present invention, FPGA is writing a Chinese character in simplified form for Field-Programmable Gate Array, i.e. field-programmable gate array
Column；GNSS is writing a Chinese character in simplified form for Global Navigation Satellite System, i.e. Global Satellite Navigation System；PPS is
Pulse Per Second's writes a Chinese character in simplified form, i.e. pulse per second (PPS), and TAI is writing a Chinese character in simplified form for International Atomic Time, i.e., international former
The period of the day from 11 p.m. to 1 a.m；UTC is writing a Chinese character in simplified form for Coordinated Universal Time, i.e. Coordinated Universal Time(UTC)；NMEA is that navigation equipment is unified
RTCM standard interface protocol.
Embodiment:
A kind of control device that GNSS pulse per second (PPS) smoothly exports receives the first end of GNSS input pulse per second (PPS) including one
Mouthful, the time stamp of record input pulse per second (PPS) beat time stamp module, one receive navigation equipment and seek unity of standard the of interface protocol
Two-port netwerk and TAI/UTC time module, the TAI/UTC time module are obtained and the input by the second port
The TAI/UTC time of pulse per second (PPS) alignment, further includes a software time stamp processing module, include in the software time stamp processing module
There are the complete time stamp buffer area of software and software time stamp Processing Algorithm treatment region, the software time stamp processing module is by knowing
The time stab information and TAI/UTC temporal information for inputting pulse per second (PPS) simultaneously combine software complete time stamp caching, and when passing through software
Stamp Processing Algorithm fits output pulse per second (PPS) curve and is cached in FPGA nanosecond time stamp caching, and output pulse per second (PPS) handles judging module
The corresponding current address value of pulse per second (PPS) curve is exported according to real-time judge and local nanosecond counter status carries out output pulse per second (PPS).
As shown in Figure 1, further including high-precision local oscillations clock circuit, the local oscillations clock is that high-precision is brilliant
Vibration, the frequency of oscillation of the crystal oscillator are 25MHZ, and the High Precision Crystal Oscillator is electrically connected local nanosecond counter, receives to the local
Second counter provides a clock reference, safeguards the operation of the local nanosecond counter.The local nanosecond counter is electrically connected
Time stamp module is taken, when inputting the arrival of pulse per second (PPS) rising edge, records the numerical value ns_cnt_pps of NS_CNT nanosecond counter,
And the input pulse per second (PPS) timestamp value is passed to software time stamp interface, it is read for software time stamp processing module.The crystal oscillator and ideal
There is short-term fixed frequency deviation and long-term frequency drift in pulse per second (PPS).The crystal oscillator exports 250Mhz clock, safeguards nanosecond counter
NS_CNT (count down to 0.999_999_996 nanosecond from 0 nanosecond with the stride of 4 nanoseconds, be repeated cyclically after returning 0).
GNSS chip module can provide the NMEA-0183 interface (UART/IIC etc.) of standard simultaneously, extract TAI/ for user
The information such as UTC time.GNSS chip module is while providing pulse per second (PPS), when additionally providing the TAI/UTC being aligned with pulse per second (PPS)
Between, which also passes to software time stamp interface together, reads for software time stamp processing module.
In the present embodiment, when the TAI/UTC time module includes TAI/UTC time extraction module and TAI/UTC
Between maintenance module, the TAI/UTC time extraction module obtains corresponding temporal information by second port and gives TAI/UTC time dimension
Module is protected, the output pulse per second (PPS) maintenance that the TAI/UTC time maintenance module passes through feedback again obtains the TAI/UTC time.It is described
The time stab information for inputting pulse per second (PPS) and TAI/UTC temporal information are given to soft by software time stamp interface by Local Bus bus
Part time stamp processing module.
Ideally, i.e., local crystal oscillator is 0 with pulse per second (PPS) frequency deviation and pulse per second (PPS) is not shaken, then the nanosecond that software obtains
Timestamp value is answered constant.Under actual conditions, there is short-term fixed frequency deviation and long-term variable drift, GNSS core in local crystal oscillator and pulse per second (PPS)
Piece mould group exports pulse per second (PPS), and there are short term jitter and missings.Nanosecond time stamp between adjacent pulse per second (PPS) had for 0 to tens nanoseconds
The deviation of (ppb of 0ppb~tens).Fig. 2 is the schematic diagram of ideal situation down-sampling time stamp.Fig. 3 is to actually enter sampling time stamp to show
It is intended to.
Therefore, software time stamp processing module needs to record the input pulse per second (PPS) timestamp value in S of past period, and
Pulse per second (PPS) timestamp value is inputted according to the series and fits the polynomial curve of a N rank, and is connect down according to the multinomial to derive
Carry out the match value at the pulse per second (PPS) arrival moment in a period of time.In principle, the derived value closer to last samples value is more accurate, when
The sampled value not updated for a long time then the accumulated error of derived value can constantly increase, that is, enters the defeated of hold mode
Pulse per second (PPS) precision constantly deteriorates out.The curve of fitting is as shown in Figure 4.
Through in software algorithm treated match value needs to be filled into FPGA nanosecond time stamp caching, FPGA nanosecond time stamp caching
Scale be 1 second, depth be T seconds.That is, software need will be T second following in match value be filled into FPGA cache in.T
It should be greater than software crash and restart the time worked normally to the end to the reset of hard dog.In the situation that software and input pulse per second (PPS) are normal
Under, software should be cached every several seconds refreshing FPGA time stamps, to guarantee that FPGA uses the value of newest fitting.When FPGA nanosecond
The read/write address of stamp caching is the second part after converting the TAI/UTC time.Output pulse per second (PPS) processing decision circuit real-time judge is worked as
Whether preceding address time stamp cache size and local nanosecond counter are equal, when the two is equal or mutual added time, then carry out output second arteries and veins
Punching.Due to exporting the continuous continuity of pulse per second (PPS), can be used for driving TAI/UTC time maintenance.
By software and hardware function division, by the very high time stamp sampling of required precision and reliability requirement very high pulse per second (PPS) week
Hardware/FPGA processing is transferred in the output of phase property, and transfers to software to handle complicated N rank multinomial fitting algorithm, increases algorithm
The flexibility of upgrading.The failures such as input pulse per second (PPS) interruption, software crash can be resisted, the reliability of output pulse per second (PPS) is greatly improved.
In addition to above preferred embodiment, there are other embodiments of the invention, and those skilled in the art can be according to this
Invention makes various changes and modifications, and as long as it does not depart from the spirit of the invention, should belong to appended claims of the present invention and determines
The range of justice.
Claims (10)
1. a kind of control device that GNSS pulse per second (PPS) smoothly exports, feature exist, GNSS input pulse per second (PPS) is received including one
First port, record input pulse per second (PPS) time stamp beat time stamp module, receptions navigation equipment interface of seeking unity of standard is assisted
The second port and TAI/UTC time module of view, the TAI/UTC time module is obtained by the second port and institute
The TAI/UTC time for stating input pulse per second (PPS) alignment, further includes a software time stamp processing module, the software time stamp processing module
It inside include the complete time stamp buffer area of software and software time stamp Processing Algorithm treatment region, the software time stamp processing module is logical
It crosses the time stab information for knowing input pulse per second (PPS) and TAI/UTC temporal information and combines the complete time stamp caching of software, and pass through
Software time stamp Processing Algorithm fits output pulse per second (PPS) curve and is cached in FPGA nanosecond time stamp caching, and output pulse per second (PPS) processing is sentenced
Certainly module exports the corresponding current address value of pulse per second (PPS) curve according to real-time judge and local nanosecond counter status exports second arteries and veins
Punching.
2. the control device that GNSS pulse per second (PPS) according to claim 1 smoothly exports, which is characterized in that further include high-precision
Local oscillations clock circuit, provide a clock reference to the local nanosecond counter, safeguard that the local nanosecond counts
The operation of device.
3. the control device that GNSS pulse per second (PPS) according to claim 2 smoothly exports, which is characterized in that the local oscillations
Clock is High Precision Crystal Oscillator, and the frequency of oscillation of the crystal oscillator is 25MHZ.
4. the control device that GNSS pulse per second (PPS) according to claim 1 smoothly exports, which is characterized in that the TAI/UTC
Time module includes TAI/UTC time extraction module and TAI/UTC time maintenance module, and the TAI/UTC time extracts mould
Block obtains corresponding temporal information by second port and gives TAI/UTC time maintenance module, and the TAI/UTC time maintenance module is again
The TAI/UTC time is obtained by the output pulse per second (PPS) maintenance of feedback.
5. the control device that GNSS pulse per second (PPS) according to claim 2 smoothly exports, which is characterized in that including a software
The time stab information for inputting pulse per second (PPS) and TAI/UTC temporal information are passed through Local by time stamp interface, the software time stamp interface
Bus bus is given to software time stamp processing module.
6. the control device that GNSS pulse per second (PPS) according to claim 5 smoothly exports, which is characterized in that when input pulse per second (PPS)
When rising edge reaches, the numerical value ns_cnt_pps of NS_CNT nanosecond counter is recorded, and the input pulse per second (PPS) timestamp value is passed
Pass software time stamp interface.
7. the control device that GNSS pulse per second (PPS) according to claim 6 smoothly exports, which is characterized in that the processing of software time stamp
Module needs to record the input pulse per second (PPS) timestamp value in S of past period, and inputs pulse per second (PPS) time stamp according to the series
Value fits the polynomial curve of a N rank, and the pulse per second (PPS) arrival in following a period of time is derived according to the multinomial
The match value at moment.
8. the control device that GNSS pulse per second (PPS) according to claim 7 smoothly exports, which is characterized in that at software algorithm
Match value after reason needs to be filled into FPGA nanosecond time stamp caching, and the scale of FPGA nanosecond time stamp caching is 1 second, depth T
Second.
9. the control device that GNSS pulse per second (PPS) according to claim 8 smoothly exports, which is characterized in that FPGA nanosecond time stamp
The read/write address of caching is the second part after converting the TAI/UTC time.
10. the control device that GNSS pulse per second (PPS) according to claim 8 smoothly exports, which is characterized in that output pulse per second (PPS)
Handle decision circuit real-time judge current address time stamp cache size and whether local nanosecond counter equal, when the two is equal or
The mutual added time then carries out output pulse per second (PPS).
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| CN201811426449.9A CN109581917B (en) | 2018-11-27 | 2018-11-27 | GNSS second pulse smooth output control device |
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| CN201811426449.9A CN109581917B (en) | 2018-11-27 | 2018-11-27 | GNSS second pulse smooth output control device |
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Cited By (1)
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| CN116671193A (en) * | 2021-01-29 | 2023-08-29 | 华为技术有限公司 | Sampling method, sampling circuit and clock synchronization method of distributed network |
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| CN109581917B (en) | 2023-07-25 |
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