CN109581917B - GNSS second pulse smooth output control device - Google Patents
GNSS second pulse smooth output control device Download PDFInfo
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- CN109581917B CN109581917B CN201811426449.9A CN201811426449A CN109581917B CN 109581917 B CN109581917 B CN 109581917B CN 201811426449 A CN201811426449 A CN 201811426449A CN 109581917 B CN109581917 B CN 109581917B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/21—Pc I-O input output
- G05B2219/21109—Field programmable gate array, fpga as I-O module
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
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Abstract
The invention discloses a GNSS second pulse smooth output control device, which comprises a first port for receiving GNSS input second pulses, a time stamping module for recording the time stamps of the input second pulses, a second port for receiving unified standard interface protocol of navigation equipment, and a TAI/UTC time module, wherein the TAI/UTC time module obtains the TAI/UTC time aligned with the input second pulses through the second port, the control device also comprises a software time stamping processing module, the software time stamping processing module comprises a software complete time stamping buffer area and a software time stamping processing algorithm processing area, and the software time stamping processing module obtains the time stamping information of the input second pulses and the TAI/UTC time information and combines the software complete time stamping buffer, fits an output second pulse curve through a software time stamping processing algorithm and buffers the output second pulse curve in an FPGA time stamping buffer, and the output second pulse processing judgment module outputs second pulses according to the state of a current address value corresponding to the real-time judgment output second pulse curve and a local nanosecond counter.
Description
Technical Field
The invention relates to a satellite navigation system, in particular to a GNSS second pulse smooth output control device.
Background
GNSS global satellite navigation systems utilize the pseudorange, ephemeris, satellite time of transmission, etc. observations of a set of satellites while also having to know the user clock bias. Global navigation satellite systems are space-based radio navigation positioning systems that can provide all-weather 3-dimensional coordinates and velocity and time information to a user at any location on the surface of the earth or near earth space.
In the prior art, the second pulse is characterized in that short-term jitter is large, long-term second deviation approaches 0, and when the GNSS chip module loses satellite connection, the second pulse is output to be interrupted, and the second pulse of navigation is problematic, so that the normal operation of the system is affected.
Disclosure of Invention
The invention aims to provide a GNSS pulse per second smooth output control device, which ensures the reliable operation of a system, fully utilizes software and hardware division and ensures that the system is more convenient and reliable.
In order to achieve the above purpose, the invention adopts the following technical scheme: the utility model provides a GNSS second pulse smooth output's controlling means, including a first port that receives GNSS input second pulse, a time stamping module that records the time stamp of input second pulse, a second port that receives navigation equipment unified standard interface protocol, and TAI/UTC time module, TAI/UTC time module obtains with the time of input second pulse alignment through the second port, still include a software time stamping processing module, software time stamping processing module includes software complete time stamp buffer memory and software time stamping processing algorithm processing area in the module, software time stamping processing module is through obtaining input second pulse's time stamp information and TAI/UTC time information and combining the time stamp buffer memory of software complete, and output second pulse curve is fit through software time stamping processing algorithm and buffer memory in FPGA time stamp buffer memory, output second pulse processing decision module is according to the current address value that real-time judgement output second pulse curve corresponds and local nanosecond counter state output second pulse.
Further, the system also comprises a high-precision local oscillation clock circuit which provides a clock reference for the local nanosecond counter and maintains the operation of the local nanosecond counter.
Furthermore, the local oscillation clock is a high-precision crystal oscillator, and the oscillation frequency of the crystal oscillator is 25MHz.
Further, the TAI/UTC time module includes a TAI/UTC time extraction module and a TAI/UTC time maintenance module, where the TAI/UTC time extraction module obtains corresponding time information through the second port and sends the corresponding time information to the TAI/UTC time maintenance module, and the TAI/UTC time maintenance module obtains the TAI/UTC time through feedback output second pulse maintenance.
Further, the system comprises a software time stamp interface, wherein the software time stamp interface sends the time stamp information of the input second pulse and the TAI/UTC time information to a software time stamp processing module through a Local Bus.
Further, when the rising edge of the input second pulse arrives, the value ns_cnt_pps of the ns_cnt nanosecond counter is recorded, and the input second pulse timestamp value is transferred to the software timestamp interface.
Further, the software timestamp processing module needs to record the input second pulse timestamp value in the past time period S, fit an N-order polynomial curve according to the series of input second pulse timestamp values, and deduce the fitting value of the second pulse arrival time in the next period according to the polynomial.
Furthermore, the fitting value processed by the software algorithm needs to be filled into the FPGA nanosecond time stamp buffer, the scale of the FPGA nanosecond time stamp buffer is 1 second, and the depth is T seconds.
Further, the read-write address of the FPGA nanosecond time stamp buffer is a second part after TAI/UTC time conversion.
Further, the output second pulse processing judgment circuit judges whether the current address time stamp buffer value is equal to the local nanosecond counter in real time, and when the current address time stamp buffer value is equal to or complementary to the local nanosecond counter, the output second pulse processing judgment circuit outputs the second pulse.
After the technical scheme is adopted, the invention has the following advantages: the time stamp sampling with high accuracy requirement and the second pulse periodic output with high reliability requirement are processed by the hardware/FPGA through software and hardware function division, and the complex N-order polynomial fitting algorithm is processed by the software, so that the flexibility of algorithm upgrading is improved. The method can resist faults such as input second pulse interruption, software breakdown and the like, and greatly improves the reliability of output second pulse.
Drawings
The invention is further described below with reference to the accompanying drawings:
FIG. 1 is a system block diagram of an embodiment of a GNSS pulse-per-second smooth output control device according to the present invention;
FIG. 2 is a schematic diagram of ideal time stamps in an embodiment of a GNSS second pulse smoothing output control device according to the present invention;
FIG. 3 is a schematic diagram of actual time stamps in an embodiment of a GNSS second pulse smoothing output control device according to the present invention;
fig. 4 is a software fitting schematic diagram of an embodiment of a control device for smooth output of GNSS second pulses according to the present invention.
Detailed Description
In the invention, the FPGA is abbreviated as Field-Programmable Gate Array, namely a Field programmable gate array; GNSS is Global Navigation Satellite System, a short term for Global navigation satellite System; PPS is abbreviated as Pulse Per Second, i.e., pulse Per Second, TAI is abbreviated as International Atomic Time, i.e., international atomic time; UTC is Coordinated Universal Time, namely, coordination world time; NMEA is an RTCM standard interface protocol unified for navigation devices.
Examples:
the utility model provides a GNSS second pulse smooth output's controlling means, including a first port that receives GNSS input second pulse, a time stamping module that records the time stamp of input second pulse, a second port that receives navigation equipment unified standard interface protocol, and TAI/UTC time module, TAI/UTC time module obtains with the time of input second pulse alignment through the second port, still include a software time stamping processing module, software time stamping processing module includes software complete time stamp buffer memory and software time stamping processing algorithm processing area in the module, software time stamping processing module is through obtaining input second pulse's time stamp information and TAI/UTC time information and combining software complete time stamp buffer memory, and output second pulse curve is fit through software time stamping processing algorithm and buffer memory in FPGA time stamp buffer memory, output second pulse processing decision module carries out output second pulse according to real-time judgement output second pulse curve corresponding current address value and local nanosecond counter state.
As shown in fig. 1, the system further comprises a high-precision local oscillation clock circuit, the local oscillation clock is a high-precision crystal oscillator, the oscillation frequency of the crystal oscillator is 25MHZ, the high-precision crystal oscillator is electrically connected with a local nanosecond counter, a clock reference is provided for the local nanosecond counter, and the operation of the local nanosecond counter is maintained. The local nanosecond counter is electrically connected with the time stamping module, records the numerical value ns_cnt_pps of the NS_CNT nanosecond counter when the rising edge of the input second pulse arrives, and transmits the input second pulse time stamp value to the software time stamp interface for being read by the software time stamp processing module. The crystal oscillator has short-term fixed frequency offset and long-term frequency drift with ideal second pulse. The crystal oscillator outputs a 250Mhz clock, maintaining a nanosecond counter ns_cnt (counting from 0 NS to 0.999_999_996 NS in steps of 4 NS, repeating periodically after returning to 0).
The GNSS chip module also provides a standard NMEA-0183 interface (UART/IIC, etc.) for users to extract TAI/UTC time information. The GNSS chip module provides the TAI/UTC time aligned with the second pulse at the same time of providing the second pulse, and the time is also transmitted to the software timestamp interface for being read by the software timestamp processing module.
In this embodiment, the TAI/UTC time module includes a TAI/UTC time extraction module and a TAI/UTC time maintenance module, where the TAI/UTC time extraction module obtains corresponding time information through the second port to the TAI/UTC time maintenance module, and the TAI/UTC time maintenance module obtains the TAI/UTC time through feedback output second pulse maintenance. And the software timestamp interface transmits the timestamp information of the input second pulse and the TAI/UTC time information to the software timestamp processing module through the Local Bus.
Ideally, i.e. the frequency offset of the local crystal oscillator and the second pulse is 0 and the second pulse is not dithered, the nanosecond timestamp value obtained by the software should be unchanged. In practical situations, the local crystal oscillator and the second pulse have short-term fixed frequency offset and long-term variable drift, and the GNSS chip module outputs the second pulse to have short-term jitter and missing. Nanosecond time stamps between adjacent second pulses have a variance of 0 to tens of nanoseconds (0 ppb to tens of ppb). Fig. 2 is a schematic diagram of ideal sampling time stamps. Fig. 3 is a schematic diagram of actual input sample time stamps.
Therefore, the software timestamp processing module needs to record the input second pulse timestamp value in the past time period S, fit an N-order polynomial curve according to the series of input second pulse timestamp values, and deduce the fitting value of the second pulse arrival time in the next time period according to the polynomial. In principle, the closer to the latest sampling value the more accurate the derived value is, and when there is no updated sampling value for a long time, the accumulated error of the derived value is increased, that is, the output second pulse accuracy in the hold state is deteriorated. The fitted curve is shown in fig. 4.
Fitting values processed by the software algorithm need to be filled into an FPGA nanosecond time stamp buffer, the scale of the FPGA nanosecond time stamp buffer is 1 second, and the depth is T seconds. That is, the software needs to fill the fitting values in the future T seconds into the FPGA cache. T should be greater than the time from the software crash to the hard dog reset restart to the last normal operation. Under the condition that the software and the input second pulse are normal, the software should refresh the FPGA timestamp cache every several seconds to ensure that the FPGA uses the latest fitting value. The read-write address of the FPGA nanosecond time stamp buffer is the second part after TAI/UTC time conversion. And the output second pulse processing judging circuit judges whether the current address time stamp buffer value is equal to the local nanosecond counter in real time, and outputs second pulses when the current address time stamp buffer value is equal to or complementary to the local nanosecond counter. Due to the continuous and uninterrupted output of the second pulse, the method can be used for driving TAI/UTC time maintenance.
The time stamp sampling with high accuracy requirement and the second pulse periodic output with high reliability requirement are processed by the hardware/FPGA through software and hardware function division, and the complex N-order polynomial fitting algorithm is processed by the software, so that the flexibility of algorithm upgrading is improved. The method can resist faults such as input second pulse interruption, software breakdown and the like, and greatly improves the reliability of output second pulse.
In addition to the above preferred embodiments, the present invention has other embodiments, and various changes and modifications may be made by those skilled in the art without departing from the spirit of the invention, which is defined in the appended claims.
Claims (10)
1. The device is characterized by comprising a first port for receiving GNSS input second pulses, a time stamping module for recording time stamps of the input second pulses, a second port for receiving unified standard interface protocol of navigation equipment, and a TAI/UTC time module, wherein the TAI/UTC time module obtains TAI/UTC time aligned with the input second pulses through the second port, the device also comprises a software time stamping processing module, the software time stamping processing module comprises a software complete time stamping buffer area and a software time stamping processing algorithm processing area, and the software time stamping processing module is used for obtaining time stamping information of the input second pulses and TAI/UTC time information and combining with the software complete time stamping buffer, fitting an output second pulse curve through a software time stamping processing algorithm and buffering the output second pulse curve in an FPGA time stamping buffer, and outputting second pulses according to the state of a current address value corresponding to the output second pulse curve and a local nanosecond counter.
2. The GNSS s pulse smooth output control apparatus of claim 1, further comprising a high precision local oscillation clock circuit providing a clock reference to the local nanosecond counter to maintain operation of the local nanosecond counter.
3. The GNSS second pulse smoothing output control apparatus according to claim 2, wherein the local oscillation clock is a high-precision crystal oscillator having an oscillation frequency of 25MHZ.
4. The device for controlling smooth output of GNSS seconds pulses according to claim 1, wherein the TAI/UTC time module includes a TAI/UTC time extraction module and a TAI/UTC time maintenance module, the TAI/UTC time extraction module obtains corresponding time information through the second port to the TAI/UTC time maintenance module, and the TAI/UTC time maintenance module obtains the TAI/UTC time through feedback output seconds pulse maintenance.
5. The device for controlling smooth output of GNSS seconds pulses according to claim 2, comprising a software time stamp interface for providing time stamp information of the input seconds pulses and TAI/UTC time information to a software time stamp processing module through a Local Bus.
6. The device for controlling smooth output of GNSS pulses according to claim 5, wherein when the rising edge of the input pulse-per-second arrives, the value ns_cnt_pps of the ns_CNT nanosecond counter is recorded and the input pulse-per-second timestamp value is passed to the software timestamp interface.
7. The device according to claim 6, wherein the software time stamp processing module records the input time stamp value of the second pulse in the elapsed time period S, fits an N-order polynomial curve according to the series of input time stamp values, and derives the fitting value of the arrival time of the second pulse in the next period according to the polynomial.
8. The device for controlling smooth output of GNSS seconds pulses according to claim 7, wherein the fitting value processed by the software algorithm is required to be filled into an FPGA nanosecond time stamp buffer, and the scale of the FPGA nanosecond time stamp buffer is 1 second and the depth is T seconds.
9. The apparatus of claim 8, wherein the read-write address of the FPGA nanosecond time stamp buffer is a second fraction of the TAI/UTC time-shifted.
10. The apparatus according to claim 8, wherein the output pulse-per-second processing decision circuit determines in real time whether the current address time stamp buffer value is equal to or complementary to the local nanosecond counter, and outputs the pulse-per-second when the current address time stamp buffer value is equal to or complementary to the local nanosecond counter.
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