CN109581917B - A control device for GNSS second pulse smooth output - Google Patents

Abstract

The invention discloses a GNSS second pulse smooth output control device, which comprises a first port for receiving GNSS input second pulses, a time stamping module for recording the time stamps of the input second pulses, a second port for receiving unified standard interface protocol of navigation equipment, and a TAI/UTC time module, wherein the TAI/UTC time module obtains the TAI/UTC time aligned with the input second pulses through the second port, the control device also comprises a software time stamping processing module, the software time stamping processing module comprises a software complete time stamping buffer area and a software time stamping processing algorithm processing area, and the software time stamping processing module obtains the time stamping information of the input second pulses and the TAI/UTC time information and combines the software complete time stamping buffer, fits an output second pulse curve through a software time stamping processing algorithm and buffers the output second pulse curve in an FPGA time stamping buffer, and the output second pulse processing judgment module outputs second pulses according to the state of a current address value corresponding to the real-time judgment output second pulse curve and a local nanosecond counter.

Description

A control device for GNSS second pulse smooth output

technical field

The invention relates to a satellite navigation system, in particular to a control device for GNSS second pulse smooth output.

Background technique

The GNSS global satellite navigation system uses observations such as pseudo-range, ephemeris, and satellite launch time of a group of satellites to determine the accuracy, and the user's clock error must also be known. GNSS is a space-based radio navigation and positioning system that can provide users with all-weather 3-dimensional coordinates, speed and time information at any point on the earth's surface or near-Earth space.

In the existing technology, the pulse-per-second is characterized by large short-term jitter, and the long-term second deviation is close to 0, and when the GNSS chip module loses the satellite connection, the output second pulse is interrupted. These all lead to problems with the second pulse of navigation, thus affecting the normal operation of the system.

Contents of the invention

The purpose of the present invention is to provide a control device for GNSS second pulse smooth output, to ensure the reliable operation of the system, and to make full use of the software and hardware division of labor, so that the system is more convenient and reliable.

In order to achieve the above object, the present invention adopts the following technical solutions: a control device for GNSS second pulse smooth output, including a first port for receiving GNSS input second pulse, a time stamp module for recording the time stamp of the input second pulse, a second port for receiving the unified standard interface protocol of navigation equipment, and a TAI/UTC time module. The TAI/UTC time module obtains the TAI/UTC time aligned with the input second pulse through the second port, and also includes a software time stamp processing module. area, and the software time stamp processing algorithm processing area, the software time stamp processing module obtains the time stamp information of the input second pulse and the TAI/UTC time information and combines the complete time stamp cache of the software, and uses the software time stamp processing algorithm to fit the output second pulse curve and caches it in the FPGA nanosecond time stamp cache.

Further, it also includes a high-precision local oscillator clock circuit, which provides a clock reference for the local nanosecond counter and maintains the operation of the local nanosecond counter.

Further, the local oscillator clock is a high-precision crystal oscillator, and the oscillation frequency of the crystal oscillator is 25MHZ.

Further, the TAI/UTC time module includes a TAI/UTC time extraction module and a TAI/UTC time maintenance module, the TAI/UTC time extraction module obtains corresponding time information to the TAI/UTC time maintenance module through the second port, and the TAI/UTC time maintenance module obtains the TAI/UTC time through the feedback output second pulse maintenance.

Further, a software time stamp interface is included, and the software time stamp interface sends the time stamp information of the input second pulse and TAI/UTC time information to the software time stamp processing module through the Local Bus.

Further, when the rising edge of the input second pulse arrives, the value ns_cnt_pps of the NS_CNT nanosecond counter is recorded, and the input second pulse time stamp value is passed to the software time stamp interface.

Further, the software timestamp processing module needs to record the input second pulse timestamp values in the past time period S, and fit an N-order polynomial curve according to the series of input second pulse timestamp values, and derive the fitting value of the second pulse arrival time in the next period of time according to the polynomial.

Further, the fitting value processed by the software algorithm needs to be filled into the FPGA nanosecond time stamp cache, the scale of the FPGA nanosecond time stamp cache is 1 second, and the depth is T seconds.

Further, the read and write address of the FPGA nanosecond timestamp cache is the second part after TAI/UTC time conversion.

Further, the output second pulse processing judgment circuit judges in real time whether the current address timestamp buffer value is equal to the local nanosecond counter, and when the two are equal or complementary, the second pulse is output.

After adopting the above technical solution, the present invention has the following advantages: through the division of software and hardware functions, the time stamp sampling with high precision requirements and the periodic output of second pulses with high reliability requirements are processed by hardware/FPGA, and the complex N-order polynomial fitting algorithm is processed by software, which increases the flexibility of algorithm upgrades. It can resist failures such as input second pulse interruption, software crash, etc., and greatly improves the reliability of output second pulse.

Description of drawings

The present invention will be further described below in conjunction with accompanying drawing:

Fig. 1 is the system block diagram of the control device embodiment of GNSS second pulse smooth output of the present invention;

Fig. 2 is ideal time stamp schematic diagram in the control device embodiment of GNSS second pulse smooth output of the present invention;

Fig. 3 is the schematic diagram of the actual time stamp in the control device embodiment of the GNSS second pulse smooth output of the present invention;

Fig. 4 is a schematic diagram of software fitting in the embodiment of the control device for GNSS second pulse smooth output of the present invention.

Detailed ways

In the present invention, FPGA is the abbreviation of Field-Programmable Gate Array, i.e. Field Programmable Gate Array; GNSS is the abbreviation of Global Navigation Satellite System, i.e. global satellite navigation system; PPS is the abbreviation of Pulse Per Second, i.e. second pulse, TAI is the abbreviation of International Atomic Time, i.e. International Atomic Time; UTC is the abbreviation of Coordinated Universal Time, i.e. Coordinated Universal Time; NME A is the unified RTCM standard interface protocol for navigation equipment.

Example:

A control device for GNSS second pulse smooth output, comprising a first port for receiving GNSS input second pulse, a time stamping module for recording the time stamp of input second pulse, a second port for receiving the unified standard interface protocol of navigation equipment, and a TAI/UTC time module, the TAI/UTC time module obtains the TAI/UTC time aligned with the input second pulse through the second port, and also includes a software time stamp processing module, which includes a software complete time stamp buffer area and a software time stamp processing algorithm processing area, The software time stamp processing module obtains the time stamp information of the input second pulse and the TAI/UTC time information and combines the complete time stamp cache of the software, and uses the software time stamp processing algorithm to fit the output second pulse curve and caches it in the FPGA nanosecond time stamp cache. The output second pulse processing judgment module outputs the second pulse according to the current address value corresponding to the output second pulse curve and the state of the local nanosecond counter in real time.

As shown in Figure 1, it also includes a high-precision local oscillator clock circuit, the local oscillator clock is a high-precision crystal oscillator, the oscillation frequency of the crystal oscillator is 25MHZ, the high-precision crystal oscillator is electrically connected to the local nanosecond counter, and a clock reference is provided for the local nanosecond counter to maintain the operation of the local nanosecond counter. The local nanosecond counter is electrically connected to the time stamping module. When the rising edge of the input second pulse arrives, record the value ns_cnt_pps of the NS_CNT nanosecond counter, and pass the input second pulse time stamp value to the software time stamp interface for the software time stamp processing module to read. There is short-term fixed frequency deviation and long-term frequency drift between the crystal oscillator and the ideal second pulse. The crystal oscillator outputs a 250Mhz clock and maintains a nanosecond counter NS_CNT (from 0 nanoseconds, with a step of 4 nanoseconds, counting to 0.999_999_996 nanoseconds, and periodically repeating after returning to 0).

The GNSS chip module also provides a standard NMEA-0183 interface (UART/IIC, etc.) for users to extract TAI/UTC time and other information. While the GNSS chip module provides the second pulse, it also provides the TAI/UTC time aligned with the second pulse, which is also passed to the software time stamp interface for the software time stamp processing module to read.

In this embodiment, the TAI/UTC time module includes a TAI/UTC time extraction module and a TAI/UTC time maintenance module, the TAI/UTC time extraction module obtains corresponding time information to the TAI/UTC time maintenance module through the second port, and the TAI/UTC time maintenance module obtains the TAI/UTC time through the feedback output second pulse maintenance. The software time stamp interface sends the time stamp information of the input second pulse and the TAI/UTC time information to the software time stamp processing module through the Local Bus.

Ideally, that is, the frequency offset between the local crystal oscillator and the second pulse is 0 and the second pulse does not jitter, then the nanosecond time stamp value obtained by the software should remain unchanged. In reality, there is a short-term fixed frequency offset and long-term variable drift between the local crystal oscillator and the second pulse, and the short-term jitter and absence of the second pulse output by the GNSS chip module. The nanosecond time stamps between adjacent second pulses have a deviation of 0 to tens of nanoseconds (0 ppb to tens of ppb). Fig. 2 is a schematic diagram of sampling time stamps under ideal conditions. FIG. 3 is a schematic diagram of actual input sampling time stamps.

Therefore, the software timestamp processing module needs to record the input second pulse timestamp values in the past time period S, and fit an N-order polynomial curve according to the series of input second pulse timestamp values, and derive the fitting value of the second pulse arrival time in the next period of time according to the polynomial. In principle, the closer the derived value is to the latest sampled value, the more accurate it is. When there is no updated sampled value for a long time, the cumulative error of the derived value will continue to increase, that is, the output second pulse accuracy in the hold state will continue to deteriorate. The fitted curve is shown in Figure 4.

The fitting value processed by the software algorithm needs to be filled into the FPGA nanosecond timestamp cache. The scale of the FPGA nanosecond timestamp cache is 1 second, and the depth is T seconds. That is to say, the software needs to fill the fitting value in the future T seconds into the FPGA cache. T should be greater than the time from software crash to hard dog reset restart to last normal work. When the software and the input second pulse are normal, the software should refresh the FPGA timestamp cache every few seconds to ensure that the FPGA uses the latest fitting value. The read and write address of the FPGA nanosecond timestamp cache is the second after TAI/UTC time conversion. The output second pulse processing judgment circuit judges in real time whether the current address timestamp buffer value is equal to the local nanosecond counter, and when the two are equal or complementary, the second pulse is output. Due to the continuous and uninterrupted output second pulse, it can be used to drive TAI/UTC time maintenance.

Through the division of software and hardware functions, the time stamp sampling with high precision and the periodic output of second pulse with high reliability are processed by hardware/FPGA, and the complex N-order polynomial fitting algorithm is processed by software, which increases the flexibility of algorithm upgrade. It can resist failures such as input second pulse interruption, software crash, etc., and greatly improves the reliability of output second pulse.

Except above-mentioned preferred embodiment, the present invention also has other embodiments, those skilled in the art can make various changes and distortions according to the present invention, as long as not departing from the spirit of the present invention, all should belong to the scope defined in the appended claims of the present invention.

Claims (10)

1. A control device for GNSS second pulse smooth output, it is characterized in, comprising a first port receiving GNSS input second pulse, a time stamp module for recording the time stamp of input second pulse, a second port receiving navigation equipment unified standard interface protocol, and a TAI/UTC time module, the TAI/UTC time module obtains the TAI/UTC time aligned with the input second pulse through the second port, and also includes a software time stamp processing module, which includes software complete time stamp buffer area and software time stamp In the stamp processing algorithm processing area, the software time stamp processing module obtains the time stamp information of the input second pulse and TAI/UTC time information and combines the complete time stamp cache of the software, and uses the software time stamp processing algorithm to fit the output second pulse curve and caches it in the FPGA nanosecond time stamp cache. The output second pulse processing judgment module outputs the second pulse according to the current address value corresponding to the output second pulse curve and the state of the local nanosecond counter in real time. 2. the control device of GNSS second pulse smooth output according to claim 1, is characterized in that, also comprises high-precision local oscillator clock circuit, provides a clock reference to described local nanosecond counter, maintains the operation of described local nanosecond counter. 3. the control device of GNSS second pulse smooth output according to claim 2, is characterized in that, described local oscillation clock is a high-precision crystal oscillator, and the oscillation frequency of described crystal oscillator is 25MHZ. 4. the control device of GNSS second pulse smooth output according to claim 1, it is characterized in that, described TAI/UTC time module comprises TAI/UTC time extraction module and TAI/UTC time maintenance module, described TAI/UTC time extraction module obtains corresponding time information to TAI/UTC time maintenance module by second port, and described TAI/UTC time maintenance module obtains TAI/UTC time by the output second pulse maintenance of feedback again. 5. the control device of GNSS second pulse smooth output according to claim 2, is characterized in that, comprises a software time stamp interface, and described software time stamp interface gives the time stamp information of input second pulse and TAI/UTC time information to software time stamp processing module by LocalBus bus. 6. the control device of GNSS second pulse smooth output according to claim 5, is characterized in that, when input second pulse rising edge arrives, record the numerical value ns_cnt_pps of NS_CNT nanosecond counter, and this input second pulse time stamp value is delivered to software time stamp interface. 7. the control device of GNSS second pulse smooth output according to claim 6, it is characterized in that, the software time stamp processing module needs to record the input second pulse time stamp value in the past time period S, and according to this series input second pulse time stamp value fit out a polynomial curve of N order, and deduce the fitting value of the second pulse arrival moment in next period of time according to this polynomial. 8. the control device of GNSS second pulse smooth output according to claim 7, it is characterized in that, the fitting value after software algorithm processing needs to be filled in FPGA nanosecond time stamp cache, the scale of FPGA nanosecond timestamp cache is 1 second, and depth is T seconds. 9. The control device for GNSS second pulse smooth output according to claim 8, characterized in that the read-write address of the FPGA nanosecond timestamp buffer is the second part after the TAI/UTC time conversion. 10. the control device of GNSS second pulse smooth output according to claim 8, it is characterized in that, output second pulse processing judgment circuit judges whether current address timestamp cache value is equal to local nanosecond counter in real time, when both are equal or complementary, then output second pulse.