CN109545968B - Organic thin film transistor based on self-powered grid and preparation method thereof - Google Patents
Organic thin film transistor based on self-powered grid and preparation method thereof Download PDFInfo
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- 239000000969 carrier Substances 0.000 claims abstract description 5
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 10
- 229910052737 gold Inorganic materials 0.000 claims description 10
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- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 3
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- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/481—Insulated gate field-effect transistors [IGFETs] characterised by the gate conductors
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- H—ELECTRICITY
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Abstract
The invention provides an organic thin film transistor based on a self-powered gate and a preparation method thereof, which are characterized by comprising the following steps: the organic light-emitting diode comprises a piezoelectric grid, an insulating layer arranged on the piezoelectric grid, an organic semiconductor layer arranged on the insulating layer, and a source electrode and a drain electrode which are arranged on the organic semiconductor layer; the piezoelectric grid sequentially comprises from bottom to top: a lower surface electrode, a piezoelectric film or ferroelectric electret, and an upper surface electrode. Compared with the prior art, the invention has the following beneficial effects: the self-powered grid structure can convert mechanical energy into electric energy, a voltage difference is generated between a grid electrode and a drain electrode which are connected with the upper surface electrode and the lower surface electrode of the self-powered grid structure to replace the action of external grid voltage, current carriers are induced on the interface of the insulating layer and the organic semiconductor layer, and the regulation and control action of the grid voltage is realized. The grid voltage can be provided by the grid voltage controller to replace the external grid voltage, so that technical support can be provided for the development of human-computer interaction, Internet of things, touch screen photoelectric technology and the like, and the grid voltage controller has a wide application prospect.
Description
Technical Field
The invention relates to the field of organic photoelectric materials, in particular to an organic thin film transistor based on a self-powered gate and a preparation method thereof.
Background
With the development of small-scale microelectronic technologies, there is an increasing demand for portable and implantable microelectronic system applications, such as wearable sensors, skin electronics, nano-robots, etc., and therefore, it is important to develop a unit that can provide power to these devices. Harvesting energy from the natural environment has been a focus of attention over the past decades, where the conversion of mechanical energy into electrical energy to achieve self-powering of microelectronic devices has become an important direction of microelectronic development.
Disclosure of Invention
Piezoelectric polymers, piezoelectric ceramics, ferroelectric electrets, etc. are materials that can convert mechanical energy into electrical energy, and their combination with microelectronics technologies can realize self-powering of microelectronic devices. Organic thin film transistors, which are essential units of organic electronics, play an important role in organic electronics, and are essential for their development from the realization of gate voltage regulation. Therefore, in order to overcome the defects and the blank of the prior art, the invention combines the technologies and provides a self-powered gate organic thin film transistor scheme, which can effectively promote the development of the microelectronic technology and lay a good technical foundation for the development of the human-computer interaction, the Internet of things, the touch screen photoelectric technology and the like.
The self-powered gate organic thin film transistor provided by the invention comprises a piezoelectric gate, an insulating layer, an organic semiconductor layer, a source electrode and a drain electrode from bottom to top; the self-powered grid (piezoelectric grid) can be obtained by preparing a piezoelectric film on a substrate by a solution method by using a spin coating or blade coating process and then evaporating electrodes on the upper surface and the lower surface, or by evaporating electrodes on a polarized ferroelectric electret. The self-powered gate structure is used as a (substantial) substrate and a gate voltage provider in the invention scheme, an upper surface electrode of the self-powered gate structure is directly contacted and connected with an insulating layer to be used as a gate electrode, a lower surface electrode of the self-powered gate structure is connected with a source electrode through an external lead, when a device is pressed, voltage generated by two electrode plates of a piezoelectric gate is used as gate voltage to substitute for external gate voltage to induce carriers at the interface of the insulating layer and a semiconductor layer, and the normal operation of a transistor device is realized under the action of the external source and drain voltage.
The invention specifically adopts the following technical scheme:
an organic thin film transistor based on a self-powered gate, comprising: the organic light-emitting diode comprises a piezoelectric grid, an insulating layer arranged on the piezoelectric grid, an organic semiconductor layer arranged on the insulating layer, and a source electrode and a drain electrode which are arranged on the organic semiconductor layer;
the piezoelectric grid sequentially comprises from bottom to top: a lower surface electrode, a piezoelectric film or ferroelectric electret, and an upper surface electrode.
Preferably, the upper surface electrode and the lower surface electrode are made of gold or silver and have a thickness of 30 nm to 50 nm; the thickness of the piezoelectric film or the ferroelectric electret is 15 um to 100 um.
Preferably, the insulating layer is an organic polymer insulating layer material having a thickness of 500 nm to 2000 nm or an inorganic insulating layer material having a thickness of 60nm to 300 nm.
Preferably, the thickness of the organic semiconductor layer is 30 nm to 50 nm; the source electrode and the drain electrode are made of gold, silver or aluminum and have the thickness of 20 nm to 80 nm.
Preferably, the lower surface electrode is connected with the source electrode through a lead; the source and drain are connected to an external power source to create a voltage difference between the two poles.
A preparation method of an organic thin film transistor based on a self-powered gate is characterized by comprising the following steps:
step S11: cleaning a substrate, wherein the substrate is made of glass or a silicon wafer;
step S12: preparing a layer of piezoelectric film of 15 um to 100 um on the substrate by a solution method by using a blade coating process;
step S13: peeling the piezoelectric film from the substrate, and preparing electrodes on the upper surface and the lower surface of the piezoelectric film in a thermal evaporation or sputtering mode;
step S14: preparing an insulating layer on the upper surface electrode of the piezoelectric film by adopting a spin coating or blade coating process;
step S15: preparing an organic semiconductor layer on the surface of the insulating layer by adopting a spin coating or blade coating process;
step S16: and evaporating the source electrode and the drain electrode by using a mask plate in a thermal evaporation mode.
Preferably, in step S11, the substrate has a size of 1.5 cm × 2 cm, and the cleaning method is: respectively ultrasonically cleaning in acetone, isopropanol and deionized water for ten minutes, and then blowing by using nitrogen;
in step S12, a specific method of preparing the piezoelectric thin film is: adjusting the height of a scraper and the scraping speed to prepare the piezoelectric film on the substrate, wherein the adopted raw material ratio is as follows: PVDF: anhydrous ethanol: acetone =1 mg: 6 ul: 4 ul; magnetically stirring at 90 deg.C for 2 hr, and magnetically stirring at 60 deg.C for 12 hr;
in step S13, the method of peeling the piezoelectric thin film from the substrate is: annealing at 80 ℃ for 12h in a drying oven, and peeling off the piezoelectric film after the annealing is finished; the upper surface electrode and the lower surface electrode which are prepared on the upper surface and the lower surface of the piezoelectric film are made of silver, and the thickness of the upper surface electrode and the lower surface electrode is 30 nm to 50 nm;
in step S14, a specific method of preparing the insulating layer is: adjusting the height and the scraping speed of a scraper to scrape and coat the ion gel insulating layer on the upper surface electrode, wherein the height of the scraper is 200 um, the scraping speed is 20 mm/s, the thickness of the scraped ion gel insulating layer is 2000 nm, and the prepared ion gel insulating layer is subjected to vacuum annealing for 12 hours at 120 ℃ in a drying oven;
in step S15, the specific method of preparing the organic semiconductor layer is: spin-coating an organic polymer semiconductor layer PDVT-8 on the insulating layer at 1000 rpm for 60 s, and annealing at 150 ℃ for 10min at room temperature after the spin-coating is finished;
in step S16, a thermal evaporation method is used to evaporate a mask plate on the organic semiconductor layer to plate a source electrode and a drain electrode, the material is gold, the thickness is 50 nm, and the length and width of the electrode channel are 1 mm and 30 um respectively.
A preparation method of an organic thin film transistor based on a self-powered gate is characterized by comprising the following steps:
step S21: preparing electrodes on the upper surface and the lower surface of the ferroelectric electret in a thermal evaporation or sputtering mode;
step S22: preparing an insulating layer on the upper surface electrode of the ferroelectric electret by adopting a spin coating or blade coating process;
step S23: preparing an organic semiconductor layer on the surface of the insulating layer by adopting a spin coating or blade coating process;
step S24: and evaporating the source electrode and the drain electrode by using a mask plate in a thermal evaporation mode.
Preferably, in step S21, the ferroelectric electret is a polarized PP thin film, and the upper surface electrode and the lower surface electrode prepared on the upper and lower surfaces of the ferroelectric electret are made of silver and have a thickness of 30 nm to 50 nm;
in step S22, a specific method of preparing the insulating layer is: adjusting the height and the scraping speed of a scraper to scrape and coat the ion gel insulating layer on the upper surface electrode, wherein the height of the scraper is 200 um, the scraping speed is 20 mm/s, the thickness of the scraped ion gel insulating layer is 2000 nm, and the prepared ion gel insulating layer is subjected to vacuum annealing for 12 hours at 120 ℃ in a drying oven;
in step S23, the specific method of preparing the organic semiconductor layer is: spin-coating an organic polymer semiconductor layer PDVT-8 on the insulating layer at 1000 rpm for 60 s, and annealing at 150 ℃ for 10min at room temperature after the spin-coating is finished;
in step S24, a thermal evaporation method is used to evaporate a mask plate on the organic semiconductor layer to plate a source electrode and a drain electrode, the material is gold, the thickness is 50 nm, and the length and width of the electrode channel are 1 mm and 30 um respectively.
Compared with the prior art, the invention has the following beneficial effects: the self-powered grid structure can convert mechanical energy into electric energy, a voltage difference is generated between a grid electrode and a drain electrode which are connected with the upper surface electrode and the lower surface electrode of the self-powered grid structure to replace the action of external grid voltage, current carriers are induced on the interface of the insulating layer and the organic semiconductor layer, and the regulation and control action of the grid voltage is realized. The grid voltage can be provided by the grid voltage controller to replace the external grid voltage, so that technical support can be provided for the development of human-computer interaction, Internet of things, touch screen photoelectric technology and the like, and the grid voltage controller has a wide application prospect.
Drawings
The invention is described in further detail below with reference to the following figures and detailed description:
FIG. 1 is a schematic view of the structure of a piezoelectric grid in accordance with embodiment 1 of the present invention;
FIG. 2 is a schematic view of the overall structure of embodiment 1 of the present invention;
FIG. 3 is a schematic structural diagram of a piezoelectric grid according to embodiment 2 of the present invention;
FIG. 4 is a schematic view of the overall structure of embodiment 2 of the present invention;
in the figure: 100-lower surface electrode; 110-a piezoelectric film; 111-ferroelectric electret; 120-upper surface electrode; 130-insulating layer. 140-a semiconductor layer; 150-drain electrode; 160-source; 170-a wire; 180-source drain electrode.
Detailed Description
In order to make the features and advantages of the present invention comprehensible, 2 embodiments accompanied with figures are described in detail as follows:
in the 1 st embodiment of the present invention, as shown in fig. 2, there is provided a structure of a self-powered gate-based organic thin film transistor, comprising: a piezoelectric gate, an insulating layer 130 disposed on the piezoelectric gate, an organic semiconductor layer 140 disposed on the insulating layer 130, and a source electrode 160 and a drain electrode 150 disposed on the organic semiconductor layer 140;
wherein, piezoelectric grid includes from bottom to top in proper order: a lower surface electrode 100, a piezoelectric film 110, and an upper surface electrode 120.
As a preferable scheme of this embodiment, the material of the upper surface electrode 120 and the lower surface electrode 100 is gold or silver, and the thickness is 30 nm to 50 nm; the thickness of the piezoelectric thin film 110 or the ferroelectric electret 111 is 15 um to 100 um.
The insulating layer 130 is an organic polymer insulating layer 130 material having a thickness of 500 nm to 2000 nm or an inorganic insulating layer 130 material having a thickness of 60nm to 300 nm.
The thickness of the organic semiconductor layer 140 is 30 nm to 50 nm; the source electrode 160 and the drain electrode 150 are made of gold, silver or aluminum and have a thickness of 20 nm to 80 nm.
As shown in fig. 1, the piezoelectric grid provided in this embodiment utilizes the characteristic that the piezoelectric film 110 can convert mechanical energy into electrical energy, and a voltage difference can be generated between the upper surface electrode 120 and the lower surface electrode 100 by applying pressure.
As shown in fig. 2, the upper surface electrode 120 is directly connected to the insulating layer 130 through a contact as a gate. The lower surface electrode 100 is connected to the source 160 through the wire 170, so that a voltage difference is generated between the gate (the upper surface electrode 120) and the source 160, carriers can be induced at the interface between the insulating layer 130 and the semiconductor layer 140, and the regulation function from the gate voltage is realized instead of the regulation function of the applied gate voltage.
The source 160 and the drain 150 are connected to an external power source 180, and source-drain voltage is applied, so that the transistor device can normally operate, and the design purpose of the embodiment is achieved.
In this example, the following preparation method is provided:
step S11: cleaning a substrate, wherein the substrate is made of glass or silicon chip;
step S12: preparing a layer of piezoelectric film 110 of 15 um to 100 um on a substrate by a solution method by using a blade coating process;
step S13: peeling the piezoelectric film 110 from the substrate, and preparing electrodes on the upper and lower surfaces of the piezoelectric film 110 by adopting a thermal evaporation or sputtering mode;
step S14: preparing an insulating layer 130 on the upper surface electrode 120 of the piezoelectric film 110 by using a spin coating or blade coating process;
step S15: preparing an organic semiconductor layer 140 on the surface of the insulating layer 130 by adopting a spin coating or blade coating process;
step S16: the source electrode 160 and the drain electrode 150 are evaporated by thermal evaporation and using a mask.
More preferably, in step S11, the substrate has a size of about 1.5 cm × 2 cm, and the cleaning method is as follows: respectively ultrasonically cleaning in acetone, isopropanol and deionized water for ten minutes, and then blowing by using nitrogen;
in step S12, a specific method of preparing the piezoelectric film 110 is: the height and the blade coating speed of the scraper are adjusted to prepare the piezoelectric film 110 PVDF on the substrate, and the adopted raw material ratio is as follows: PVDF: anhydrous ethanol: acetone =1 mg: 6 ul: 4 ul; magnetically stirring at 90 deg.C for 2 hr, and magnetically stirring at 60 deg.C for 12 hr;
in the step, the thickness of the piezoelectric film 110 can be regulated and controlled by changing a spin coating process (rotating speed and time) or a blade coating process (blade coating speed and time), and different piezoelectric constants can be obtained by changing the thickness of the piezoelectric film 110, for example, when the film thickness is 50 um-80 um, the piezoelectric constant can reach 20 pc/N;
in step S13, the method of peeling the piezoelectric film 110 from the substrate is: annealing at 80 ℃ for 12h in a drying oven, and peeling off the piezoelectric film 110 after the annealing is finished; the upper surface electrode 120 and the lower surface electrode 100 prepared on the upper and lower surfaces of the piezoelectric film 110 are made of silver and have a thickness of 30 nm to 50 nm;
in step S14, the specific method of preparing the insulating layer 130 is: adjusting the height and the scraping speed of a scraper to scrape and coat the ion gel insulating layer 130 on the upper surface electrode 120, wherein the height of the scraper is 200 um, the scraping speed is 20 mm/s, the thickness of the scraped ion gel insulating layer 130 is 2000 nm, and the ion gel insulating layer 130 prepared by scraping and coating is subjected to vacuum annealing for 12 hours at 120 ℃ in a drying oven;
in step S15, the specific method of preparing the organic semiconductor layer 140 is: spin-coating an organic polymer semiconductor layer 140 PDVT-8 on the insulating layer 130 at 1000 rpm for 60 s, and annealing at 150 ℃ for 10min at room temperature after the spin-coating is finished;
in step S16, a thermal evaporation method is used to evaporate the source electrode 160 and the drain electrode 150 on the organic semiconductor layer 140 by using a mask, the material is gold, the thickness is 50 nm, and the length and width of the electrode channel are 1 mm and 30 um respectively.
As shown in fig. 3 and 4, the 2 nd embodiment of the present invention is different from the 1 st embodiment only in that in the piezoelectric grid, the piezoelectric thin film 110 is replaced with the ferroelectric electret 111 in terms of the device structure. Since the ferroelectric electret 111 also has the characteristic of converting mechanical energy into electrical energy, the principle of this embodiment is basically the same as that of embodiment 1, and therefore, the detailed description thereof is omitted here.
In this example, the following preparation method is provided:
step S21: preparing electrodes on the upper surface and the lower surface of the ferroelectric electret 111 by adopting a thermal evaporation or sputtering mode;
step S22: preparing an insulating layer 130 on the upper surface electrode 120 of the ferroelectric electret 111 by a spin coating or blade coating process;
step S23: preparing an organic semiconductor layer 140 on the surface of the insulating layer 130 by adopting a spin coating or blade coating process;
step S24: the source electrode 160 and the drain electrode 150 are evaporated by thermal evaporation and using a mask.
In step S21, the ferroelectric electret 111 is a polarized PP film with a large number of dipoles arranged therein, and different voltages can be obtained by adjusting the number of folds of the film, and after the film is folded three times to become 8 layers, a voltage of 10V can be obtained after pressing. The upper surface electrode 120 and the lower surface electrode 100 prepared on the upper and lower surfaces of the ferroelectric electret 111 are made of silver and have a thickness of 30 nm to 50 nm;
in step S22, the specific method of preparing the insulating layer 130 is: adjusting the height and the scraping speed of a scraper to scrape and coat the ion gel insulating layer 130 on the upper surface electrode 120, wherein the height of the scraper is 200 um, the scraping speed is 20 mm/s, the thickness of the scraped ion gel insulating layer 130 is 2000 nm, and the ion gel insulating layer 130 prepared by scraping and coating is subjected to vacuum annealing for 12 hours at 120 ℃ in a drying oven;
in step S23, the specific method of preparing the organic semiconductor layer 140 is: spin-coating an organic polymer semiconductor layer 140 PDVT-8 on the insulating layer 130 at 1000 rpm for 60 s, and annealing at 150 ℃ for 10min at room temperature after the spin-coating is finished;
in step S24, a thermal evaporation method is used to evaporate the source electrode 160 and the drain electrode 150 on the organic semiconductor layer 140 by using a mask, the material is gold, the thickness is 50 nm, and the length and width of the electrode channel are 1 mm and 30 um respectively.
The present invention is not limited to the above preferred embodiments, and other various forms of organic thin film transistors based on self-powered gate and methods for fabricating the same can be obtained by anyone who has the benefit of the present invention.
Claims (5)
1. An organic thin film transistor based on a self-powered gate, comprising: the organic light-emitting diode comprises a piezoelectric grid, an insulating layer arranged on the piezoelectric grid, an organic semiconductor layer arranged on the insulating layer, and a source electrode and a drain electrode which are arranged on the organic semiconductor layer;
the piezoelectric grid sequentially comprises from bottom to top: a lower surface electrode, a piezoelectric film or ferroelectric electret, and an upper surface electrode;
the upper surface electrode is directly connected with the insulating layer through contact as a grid electrode, the lower surface electrode is connected with the source electrode through a lead, voltage difference is generated between the grid electrode and the source electrode, current carriers are induced at the interface of the insulating layer and the semiconductor layer, and the regulation and control effect from grid voltage is realized; connecting the source electrode and the drain electrode with an external power supply, and applying source-drain voltage to enable the transistor device to work normally;
during use, a voltage difference is generated between the upper surface electrode and the lower surface electrode by applying pressure.
2. The self-powered gate-based organic thin film transistor of claim 1, wherein: the upper surface electrode and the lower surface electrode are made of gold or silver and have the thickness of 30 nm to 50 nm; the thickness of the piezoelectric film or the ferroelectric electret is 15 um to 100 um.
3. The self-powered gate-based organic thin film transistor of claim 1, wherein: the insulating layer is an organic polymer insulating layer material with the thickness of 500 nm to 2000 nm or an inorganic insulating layer material with the thickness of 60nm to 300 nm.
4. The self-powered gate-based organic thin film transistor of claim 1, wherein: the thickness of the organic semiconductor layer is 30 nm to 50 nm; the source electrode and the drain electrode are made of gold, silver or aluminum and have the thickness of 20 nm to 80 nm.
5. The self-powered gate-based organic thin film transistor of claim 1, wherein: the lower surface electrode is connected with the source electrode through a lead; the source and the drain are connected to an external power supply.
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