CN109545930A - A kind of manufacturing process improving flip LED chips luminous efficiency - Google Patents
A kind of manufacturing process improving flip LED chips luminous efficiency Download PDFInfo
- Publication number
- CN109545930A CN109545930A CN201811413035.2A CN201811413035A CN109545930A CN 109545930 A CN109545930 A CN 109545930A CN 201811413035 A CN201811413035 A CN 201811413035A CN 109545930 A CN109545930 A CN 109545930A
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- China
- Prior art keywords
- led chips
- nano particle
- flip led
- luminous efficiency
- mask layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 239000002105 nanoparticle Substances 0.000 claims abstract description 32
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 229910052594 sapphire Inorganic materials 0.000 claims abstract description 25
- 239000010980 sapphire Substances 0.000 claims abstract description 25
- 238000005530 etching Methods 0.000 claims abstract description 11
- 230000000903 blocking effect Effects 0.000 claims abstract description 5
- 238000000137 annealing Methods 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 8
- 238000001816 cooling Methods 0.000 claims description 3
- 238000005566 electron beam evaporation Methods 0.000 claims description 3
- 244000144992 flock Species 0.000 claims description 3
- 238000009616 inductively coupled plasma Methods 0.000 claims description 3
- 238000007711 solidification Methods 0.000 claims description 3
- 230000008023 solidification Effects 0.000 claims description 3
- 238000001338 self-assembly Methods 0.000 abstract description 3
- 238000000605 extraction Methods 0.000 description 4
- 238000007788 roughening Methods 0.000 description 2
- 241001062009 Indigofera Species 0.000 description 1
- 241001025261 Neoraja caerulea Species 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000010437 gem Substances 0.000 description 1
- 229910001751 gemstone Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
Abstract
The invention belongs to LED chip technical fields, a kind of manufacturing process improving flip LED chips luminous efficiency is provided, the graphical Ni nano particle mask layer-etching Sapphire Substrate-of one flip LED chips-deposit Ni film-formation is chosen and obtains the Sapphire Substrate of roughing in surface；The present invention performs etching substrate surface to reach shaggy purpose, under the blocking of Ni nanometer mask plate so as to improve flip LED chips luminous efficiency by making self assembly Ni nanometer mask plate.
Description
Technical field
The present invention relates to a kind of manufacturing process for improving flip LED chips luminous efficiency, belong to LED core chip technology neck
Domain.
Background technique
The internal quantum efficiency of high quality LED chip has reached very high at present, but the luminous efficiency of LED chip is still very
Low, light extraction efficiency, which becomes, limits an important factor for its luminous efficiency improves.The light extraction efficiency for how improving blue-ray LED becomes
Fall over each other the hot spot of research both at home and abroad.
In many blue-light LED chip light extraction efficiencies develop skill, roughing in surface is method the most popular, because of table
Face is roughened on the basis of not increasing process complexity and chip manufacturing cost, and it is maximum that LED chip light extraction efficiency may be implemented
The raising of degree, principle are to be easy to happen scattering phenomenon in rough surface glazing, and light is partially fled from after scattering from rough surface and partly led
Body is without by incident angle effect, so as to improve exit probability of the light in LED chip.
Summary of the invention
The purpose of the present invention is to provide a kind of method of completely new increase substrate surface for roughness, Lai Tigao flip LEDs
The luminous efficiency of chip under its exposure mask, performs etching substrate surface to come particular by production self assembly Ni nano-form
Reach shaggy purpose.
To realize the above technical purpose, the technical solution adopted by the present invention is that: a kind of raising flip LED chips luminous efficiency
Manufacturing process, characterized in that include the following steps:
Step 1 chooses a flip LED chips, and the flip LED chips include Sapphire Substrate, are located under Sapphire Substrate
GaN epitaxial layer, the P electrode for drawing P-GaN and the N electrode for drawing N-GaN of side；
Step 2 deposits Ni film by electron beam evaporation in the Sapphire Substrate；
Step 3 carries out RTA short annealing processing to Ni film (005), forms graphical Ni nano particle mask layer (006)；
Step 4 utilizes inductively coupled plasma etching work under the blocking of graphical Ni nano particle mask layer (006)
Skill performs etching Sapphire Substrate (001)；
Step 5 uses diluted HCL solution, and graphical Ni nano particle mask layer (006) is washed off, roughing in surface is obtained
Sapphire Substrate (001).
Further, the flip LED chips include upside-down mounting high voltage LED chip, upside-down mounting micro display LED component.
Further, in the step 2, the Ni film with a thickness of 4nm ~ 10nm.
Further, in the step 3, the detailed process for forming graphical Ni nano particle mask layer (006) is, by
Relatively thin in Ni film 005, Ni nano particle very little, under RTA high annealing, Ni nano particle is activated, and that ball can occur is poly- anti-
It answers, the Ni nano particle cluster cluster in Ni film 005 is made to flock together, form graphical Ni nano particle after cooling solidification
Mask layer 006.
Further, in the step 5, the concentration of the HCL solution that etch pattern Ni nano particle mask layer uses for
10%-30%。
From the above, it can be seen that the beneficial effects of the present invention are:
1) present invention is by production self assembly Ni nanometer mask plate, under the blocking of Ni nanometer mask plate, to Sapphire Substrate table
Face performs etching to reach shaggy purpose, so as to improve flip LED chips luminous efficiency；
2) present invention is suitable for all LED flip chips, including upside-down mounting high voltage LED chip, upside-down mounting micro display LED component etc..
Detailed description of the invention
Fig. 1 is that the present invention deposits the schematic cross-sectional view after Ni film on a sapphire substrate.
Fig. 2 is the schematic cross-sectional view that the present invention forms graphical Ni nano particle mask layer.
Fig. 3 is the schematic cross-sectional view of present invention etching Sapphire Substrate.
Fig. 4 is that the present invention obtains the LED flip chip schematic cross-sectional view of roughing in surface.
Description of symbols: 001- Sapphire Substrate, 002-GaN epitaxial layer, 003-P electrode, 004-N electrode, 005-Ni
The graphical Ni nano particle mask layer of film, 006-.
Specific embodiment
Below with reference to specific drawings and examples, the invention will be further described.
Embodiment 1: a kind of manufacturing process improving flip LED chips luminous efficiency includes the following steps:
Step 1 makes according to the preceding road that conventional flip chip LED core blade technolgy completes chip, throws until Sapphire Substrate 001 is thinned
Light technology is completed；The flip LED chips include Sapphire Substrate 001, the GaN epitaxial layer positioned at 001 lower section of Sapphire Substrate
002, the N electrode 004 for drawing the P electrode 003 of P-GaN and for drawing N-GaN；
Flip LED chips in the present embodiment include upside-down mounting high voltage LED chip, upside-down mounting micro display LED component；
Step 2 deposits Ni film 005 by electron beam evaporation in the Sapphire Substrate 001；
The thickness of Ni film 005 is about 6nm in the present embodiment；
Step 3 carries out RTA short annealing processing to Ni film 005, forms graphical Ni nano particle mask layer 006；
The detailed process for forming graphical Ni nano particle mask layer 006 is that, since Ni film 005 is relatively thin, Ni nano particle is very
Small, under RTA high annealing, Ni nano particle, which is activated, can occur the poly- reaction of ball, make the Ni nano particle one in Ni film 005
Cluster cluster flocks together, and forms graphical Ni nano particle mask layer 006 after cooling solidification；
The thickness of Ni film 005 is about 6nm in the present embodiment, and about 800 DEG C of RTA annealing temperature, annealing time about 3min, Ni film
It is about 300nm that the 005 poly- reaction of generation ball, which can form Ni nano-particle diameter,
Step 4 is under the blocking of graphical Ni nano particle mask layer 006, using inductively coupled plasma etching technique,
Sapphire Substrate 001 is performed etching；
Step 5 uses diluted HCL solution, and graphical Ni nano particle mask layer 006 is washed off, roughing in surface is obtained
Sapphire Substrate 001.
The concentration for the HCL solution that the graphical Ni nano particle mask layer 006 of wet etching uses is 10%-30%.
The Ni film 005 of different-thickness in the present invention, different RTA alloy annealing conditions, the Ni nano particle shape of formation
Looks size will be different；And then it will affect the pattern of 001 roughing in surface structure of Sapphire Substrate.
The structure of flip LED chips luminous efficiency, including flip LED chips can be improved, the flip LED chips include indigo plant
It jewel substrate 001, the GaN epitaxial layer 002 positioned at the lower section of Sapphire Substrate 001, the P electrode 003 for drawing P-GaN and is used for
Draw the N electrode 004 of N-GaN；001 upper surface of Sapphire Substrate have roughening structure, roughening structure can light in LED chip
In exit probability, to improve flip LED chips luminous efficiency.
The present invention and its embodiments have been described above, description is not limiting, it is shown in the drawings also only
It is one of embodiments of the present invention, actual structure is not limited to this.If those skilled in the art are opened by it
Show, without departing from the spirit of the invention, not inventively designs structure side similar with the technical solution
Formula and embodiment, are within the scope of protection of the invention.
Claims (5)
1. a kind of manufacturing process for improving flip LED chips luminous efficiency, characterized in that include the following steps:
Step 1 chooses a flip LED chips, and the flip LED chips include Sapphire Substrate (001), are located at sapphire lining
GaN epitaxial layer (002) below bottom (001), the P electrode (003) for drawing P-GaN and the N electrode for drawing N-GaN
(004)；
Step 2 deposits Ni film (005) on the Sapphire Substrate (001) by electron beam evaporation；
Step 3 carries out RTA short annealing processing to Ni film (005), forms graphical Ni nano particle mask layer (006)；
Step 4 utilizes inductively coupled plasma etching work under the blocking of graphical Ni nano particle mask layer (006)
Skill performs etching Sapphire Substrate (001)；
Step 5 uses diluted HCL solution, and graphical Ni nano particle mask layer (006) is washed off, roughing in surface is obtained
Sapphire Substrate (001).
2. a kind of manufacturing process for improving flip LED chips luminous efficiency according to claim 1, feature exist
In the flip LED chips include upside-down mounting high voltage LED chip, upside-down mounting micro display LED component.
3. a kind of manufacturing process for improving flip LED chips luminous efficiency according to claim 1, feature exist
In, in the step 2, the Ni film with a thickness of 4nm ~ 10nm.
4. a kind of manufacturing process for improving flip LED chips luminous efficiency according to claim 1, feature exist
In, in the step 3, the detailed process for forming graphical Ni nano particle mask layer (006) is, due to Ni film 005 compared with
Thin, Ni nano particle very little, under RTA high annealing, Ni nano particle, which is activated, can occur the poly- reaction of ball, make Ni film 005
In Ni nano particle cluster cluster flock together, cooling solidification after form graphical Ni nano particle mask layer 006.
5. a kind of manufacturing process for improving flip LED chips luminous efficiency according to claim 1, feature exist
In in the step 5, the concentration for the HCL solution that etch pattern Ni nano particle mask layer (006) uses is 10%-30%.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811413035.2A CN109545930A (en) | 2018-11-23 | 2018-11-23 | A kind of manufacturing process improving flip LED chips luminous efficiency |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811413035.2A CN109545930A (en) | 2018-11-23 | 2018-11-23 | A kind of manufacturing process improving flip LED chips luminous efficiency |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109545930A true CN109545930A (en) | 2019-03-29 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811413035.2A Pending CN109545930A (en) | 2018-11-23 | 2018-11-23 | A kind of manufacturing process improving flip LED chips luminous efficiency |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112216771A (en) * | 2020-10-08 | 2021-01-12 | 扬州中科半导体照明有限公司 | Manufacturing method of substrate for Mini-LED chip with large light-emitting angle |
| CN112216770A (en) * | 2020-09-30 | 2021-01-12 | 扬州中科半导体照明有限公司 | Processing method of substrate with large light-emitting angle |
| CN115020562A (en) * | 2022-06-01 | 2022-09-06 | 淮安澳洋顺昌光电技术有限公司 | Preparation method of substrate with cluster-shaped island microstructure and epitaxial structure |
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| CN101295636A (en) * | 2007-04-25 | 2008-10-29 | 中国科学院半导体研究所 | Production method of pattern underlay for epitaxial growth of high-crystal quality nitride |
| CN103137814A (en) * | 2011-12-01 | 2013-06-05 | 台湾积体电路制造股份有限公司 | Light emitting diode with improved light extraction efficiency and methods of manufacturing same |
| CN103208570A (en) * | 2013-03-14 | 2013-07-17 | 映瑞光电科技(上海)有限公司 | Flip light-emitting diode (LED) chip and manufacturing method thereof |
| CN106206896A (en) * | 2016-08-22 | 2016-12-07 | 厦门市三安光电科技有限公司 | Compound pattern Sapphire Substrate and the manufacture method of epitaxial wafer thereof |
-
2018
- 2018-11-23 CN CN201811413035.2A patent/CN109545930A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101295636A (en) * | 2007-04-25 | 2008-10-29 | 中国科学院半导体研究所 | Production method of pattern underlay for epitaxial growth of high-crystal quality nitride |
| CN103137814A (en) * | 2011-12-01 | 2013-06-05 | 台湾积体电路制造股份有限公司 | Light emitting diode with improved light extraction efficiency and methods of manufacturing same |
| CN103208570A (en) * | 2013-03-14 | 2013-07-17 | 映瑞光电科技(上海)有限公司 | Flip light-emitting diode (LED) chip and manufacturing method thereof |
| CN106206896A (en) * | 2016-08-22 | 2016-12-07 | 厦门市三安光电科技有限公司 | Compound pattern Sapphire Substrate and the manufacture method of epitaxial wafer thereof |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112216770A (en) * | 2020-09-30 | 2021-01-12 | 扬州中科半导体照明有限公司 | Processing method of substrate with large light-emitting angle |
| CN112216771A (en) * | 2020-10-08 | 2021-01-12 | 扬州中科半导体照明有限公司 | Manufacturing method of substrate for Mini-LED chip with large light-emitting angle |
| CN115020562A (en) * | 2022-06-01 | 2022-09-06 | 淮安澳洋顺昌光电技术有限公司 | Preparation method of substrate with cluster-shaped island microstructure and epitaxial structure |
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Application publication date: 20190329 |
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