CN109543476A - Data processing method, device and storage medium - Google Patents
Data processing method, device and storage medium Download PDFInfo
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- CN109543476A CN109543476A CN201811354654.9A CN201811354654A CN109543476A CN 109543476 A CN109543476 A CN 109543476A CN 201811354654 A CN201811354654 A CN 201811354654A CN 109543476 A CN109543476 A CN 109543476A
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- written
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- objective function
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K1/00—Methods or arrangements for marking the record carrier in digital fashion
- G06K1/12—Methods or arrangements for marking the record carrier in digital fashion otherwise than by punching
- G06K1/128—Methods or arrangements for marking the record carrier in digital fashion otherwise than by punching by electric registration, e.g. electrolytic, spark erosion
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Abstract
The embodiment of the invention discloses a kind of data processing method, device and storage mediums.This method comprises: obtaining data to be written corresponding with erasable instruction when going to erasable instruction；Invocation target function is written into data and is written to buffer area, so that data to be written are written in memory by buffer area；Block objective function and records the closed position of objective function；Sequence executes other instructions, the condition until meeting invocation target function again；Invocation target function again continues to execute objective function from closed position, until memory completes data write-in to be written.Data processing method, device and the storage medium of the embodiment of the present invention, CPU are completed without waiting for the erasable operation of memory, but within the period of the erasable operation of memory, other instructions are handled, it is lower to improve cpu busy percentage, and improve instruction processing speed.
Description
Technical field
The present invention relates to technical field of intelligent card more particularly to a kind of data processing methods, device and storage medium.
Background technique
Smart card (Smart Card) is the internal card for being embedded with microchip.Integrated circuit in intelligent card includes: center
Processor (Central Processing Unit, CPU), electrically erasable read-write memory (Electrically
Erasable Programmable read only memory, EEPROM), random access memory (Random Access
Memory, RAM) and the card internal operating system (Chip that is solidificated in read-only memory (Read-Only Memory, ROM)
Operating System, COS).Smart card can voluntarily handle work of the data without interfering with host CPU, be widely applied
In fields such as finance, traffic, social security and Internet of Things.
Many industrial applications propose requirement to the instruction processing speed of smart card COS, therefore the design of COS is guaranteeing
The processing speed of instruction is promoted while safe as soon as possible.COS is in process instruction, it is sometimes desirable to store the data in
On EEPROM.The primary erasable operation duration of the EEPROM of chip manufacturer design is primary complete substantially at 3 milliseconds to 5 milliseconds or so
Transaction usually require repeatedly carry out EEPROM erasable operation.
The process that COS starts an erasable operation of EEPROM in instruction processing is as follows: CPU is by data (source to be saved
Data) buffer area is copied to, the data in buffer area are written to EEPROM；Data in buffer area are being written to EEPROM
During, the erasable flag bit of interpretation EEPROM is recycled, the erasable operation of EEPROM is waited to complete, this time is chip manufacturer
The primary erasable operation duration (3 milliseconds to 5 milliseconds or so) of the EEPROM of design.
Within the period that CPU waits the erasable operation of EEPROM to complete, CPU cannot handle other COS instruction, and CPU is utilized
Rate is lower, influences COS instruction processing speed.
Summary of the invention
The embodiment of the present invention provides a kind of data processing method, device and storage medium, can be improved cpu busy percentage, mentions
High COS instructs processing speed.
On the one hand, the embodiment of the invention provides a kind of data processing method, method includes:
When going to erasable instruction, data to be written corresponding with erasable instruction are obtained；
Invocation target function is written into data and is written to buffer area, so that data to be written are written to by buffer area and are deposited
In reservoir；Block objective function and records the closed position of objective function；
Sequence executes other instructions, the condition until meeting invocation target function again；
Invocation target function again continues to execute objective function from closed position, until memory completes data to be written
Write-in.
In one embodiment of the invention, data processing method provided in an embodiment of the present invention further include:
Verification is written to the accuracy of data in memory.
In one embodiment of the invention, meet the condition of invocation target function again, comprising:
Other instruction executions are completed.
In one embodiment of the invention, meet the condition of invocation target function again, comprising:
Go to the corresponding erasable instruction of other data.
In one embodiment of the invention, meet the condition of invocation target function again, comprising:
Timer timing time for invocation target function again arrives.
On the other hand, the embodiment of the invention provides a kind of data processing equipment, device includes:
Module is obtained, for obtaining data to be written corresponding with erasable instruction when going to erasable instruction；
First calling module is used for invocation target function, is written into data and is written to buffer area, so that data to be written
It is written in memory by buffer area；Block objective function and records the closed position of objective function；
Execution module, the condition for sequentially executing other instructions, until meeting invocation target function again；
Second calling module continues to execute objective function from closed position for invocation target function again, until storage
Device completes data write-in to be written.
In one embodiment of the invention, data processing equipment provided in an embodiment of the present invention further include:
Correction verification module, for verifying the accuracy for being written to data in memory.
In one embodiment of the invention, meet the condition of invocation target function again, comprising:
Other instruction executions are completed.
In one embodiment of the invention, meet the condition of invocation target function again, comprising:
Go to the corresponding erasable instruction of other data.
In one embodiment of the invention, meet the condition of invocation target function again, comprising:
Timer timing time for invocation target function again arrives.
In another aspect, the embodiment of the present invention provides a kind of computer readable storage medium, on computer readable storage medium
It is stored with computer program, data processing method provided in an embodiment of the present invention is realized when computer program is executed by processor.
Data processing method, device and the storage medium of the embodiment of the present invention, CPU have been operated without waiting for memory is erasable
At, but within the period of the erasable operation of memory, other instructions are handled, it is lower to improve cpu busy percentage, and improve
Instruct processing speed.
Detailed description of the invention
In order to illustrate the technical solution of the embodiments of the present invention more clearly, will make below to required in the embodiment of the present invention
Attached drawing is briefly described, for those of ordinary skill in the art, without creative efforts, also
Other drawings may be obtained according to these drawings without any creative labor.
Fig. 1 shows the flow diagram of data processing method provided in an embodiment of the present invention；
Fig. 2 shows the structural schematic diagrams of data processing equipment provided in an embodiment of the present invention.
Specific embodiment
The feature and exemplary embodiment of various aspects of the invention is described more fully below, in order to make mesh of the invention
, technical solution and advantage be more clearly understood, with reference to the accompanying drawings and embodiments, the present invention is further retouched in detail
It states.It should be understood that specific embodiment described herein is only configured to explain the present invention, it is not configured as limiting the present invention.
To those skilled in the art, the present invention can be real in the case where not needing some details in these details
It applies.Below the description of embodiment is used for the purpose of better understanding the present invention to provide by showing example of the invention.
It should be noted that, in this document, relational terms such as first and second and the like are used merely to a reality
Body or operation are distinguished with another entity or operation, are deposited without necessarily requiring or implying between these entities or operation
In any actual relationship or order or sequence.Moreover, the terms "include", "comprise" or its any other variant are intended to
Non-exclusive inclusion, so that the process, method, article or equipment including a series of elements is not only wanted including those
Element, but also including other elements that are not explicitly listed, or further include for this process, method, article or equipment
Intrinsic element.In the absence of more restrictions, the element limited by sentence " including ... ", it is not excluded that including
There is also other identical elements in the process, method, article or equipment of the element.
Fig. 1 shows the flow diagram of data processing method provided in an embodiment of the present invention.Data processing method can be with
Include:
S101: when going to erasable instruction, data to be written corresponding with erasable instruction are obtained.
S102: invocation target function is written into data and is written to buffer area, so that data to be written are written by buffer area
Into memory；Block objective function and records the closed position of objective function.
S103: sequentially executing other instructions, the condition until meeting invocation target function again.
S104: invocation target function again continues to execute objective function from closed position, until memory completion is to be written
Data write-in.
The data processing method of the embodiment of the present invention, CPU do not recycle the erasable flag bit of interpretation memory, i.e., not etc.
Other instructions of reprocessing are completed to the erasable operation of memory, but within the period of the erasable operation of memory, it handles other and refers to
It enables, it is lower to improve cpu busy percentage, and improve instruction processing speed.
In one embodiment of the invention, the memory being previously mentioned in the embodiment of the present invention is preferably in smart card
EEPROM, correspondingly, above-metioned instruction is COS instruction.
In one embodiment of the invention, data processing method provided in an embodiment of the present invention can also include: verification
It is written to the accuracy of data in memory.
By carrying out accuracy verification to the data being written in memory, can guarantee to be written to data in memory
Accuracy.
In one embodiment of the invention, the condition for meeting invocation target function again, may include: that other instructions are held
Row is completed.
In one embodiment of the invention, the condition for meeting invocation target function again may include:
Go to the corresponding erasable instruction of other data.
In one embodiment of the invention, the condition for meeting invocation target function again may include:
Timer timing time for invocation target function again arrives.
In one embodiment of the invention, it is contemplated that chip manufacturer design EEPROM once erasable operation when a length of 3
Millisecond is based on this to 5 milliseconds or so, and the embodiment of the present invention can set 6 milliseconds for the timing time of timer, to guarantee
The primary erasable operation of EEPROM is completed.
That is, when the corresponding erasable instruction of other data is completed or gone to other instructions or for calling mesh again
Then, invocation target function, continues to execute objective function from closed position to the timer timing time of scalar functions again, until depositing
Reservoir completes data write-in to be written.
Data processing method provided in an embodiment of the present invention is described in detail below by specific embodiment.
A byte global variable gcRunLine is stated and distributed in COS first, which is used to protect
After depositing each invocation target function, the position (i.e. the closed position of objective function) gone in objective function, initial value is
0。
Objective function code is as follows:
Wherein, in above-mentioned code, EepromThread is objective function title；Src is the source address of data to be written；
Dest is the destination address of data to be written；Length is the length of data to be written, and yieldflag is the obstruction of objective function
Flag bit, initial value 0；Writedata (src, dest, length) is for being written into data write-in buffer area；__
LINE__ is the position that objective function is currently gone to；WaitUtilEepromComplete () is for recycling interpretation EEPROM
Erasable flag bit, determined with EEPROM and complete data to be written write-in；Memcmp (src, des, length) is to compare from src
Whether the byte that beginning length is length and the byte that length is length since des are identical, i.e., are written to for verifying
The accuracy of data in EEPROM.Switch is multiple-limb selection, and case is branch.
COS instruction sequences execute, and when going to the erasable instruction of COS, initialize gcRunLine and yieldflag, i.e., will
GcRunLine and yieldflag are disposed as 0.
Invocation target function EepromThread, at this point, gcRunLine=0, execution Case 0:Writedata (src,
Dest, length), it is written into data write-in buffer area；Yiledflag=1 is executed again, by the obstruction flag bit of objective function
It is set to 1；Do-while circulation gcRunLine=__LINE__, the position (mesh that record objective function is currently gone to are executed again
The closed position of scalar functions)；Whether be 1, current yieldflag is 1 if judging yieldflag currently, then return to 0, at this time While
Condition is that 0, do-while circulation terminates, at this point, function return value is 0, jumps out objective function EepromThread.
CPU continuation sequence executes other COS instruction, completes or go to the corresponding COS of other data when other COS are instructed
Erasable instruction or the timer timing time for invocation target function again then, set 0 for yieldflag, adjust again
With objective function EepromThread, gcRunLine=__LINE__ at this time executes Case__LINE__:；That is objective function
EepromThread leaps to last time closed position by switch and continues to execute, and whether judge yieldflag currently is 1,
Current yieldflag is 0, continues to execute the subsequent operation in objective function EepromThread；It executes
WaitUtilEepromComplete () recycles the erasable flag bit of interpretation EEPROM, is determined with EEPROM and completes number to be written
According to write-in；When EEPROM completes data to be written write-in, gcRunLine=0 is executed, to byte global variable gcRunLine
Again it is assigned a value of 0, so as to subsequent erasable operation.Then execute if (Memcmp (src, des, length)==false) with
The accuracy that verifying is written to data in EEPROM returns to 1 if the data being written in EEPROM are accurate, otherwise, then returns
0。
The data processing method of the embodiment of the present invention, CPU do not recycle the erasable flag bit of interpretation memory, i.e., not etc.
Other instructions of reprocessing are completed to the erasable operation of memory, but within the period of the erasable operation of memory, it handles other and refers to
It enables, it is lower to improve cpu busy percentage, and improve instruction processing speed.
Corresponding with above-mentioned embodiment of the method, the embodiment of the present invention also provides a kind of data processing equipment.Such as Fig. 2 institute
Show, Fig. 2 shows the structural schematic diagrams of data processing equipment provided in an embodiment of the present invention.Data processing equipment may include:
Module 201 is obtained, for obtaining data to be written corresponding with erasable instruction when going to erasable instruction.
First calling module 202 is used for invocation target function, is written into data and is written to buffer area, so as to be written
Data are written in memory by buffer area；Block objective function and records the closed position of objective function.
Execution module 203, the condition for sequentially executing other instructions, until meeting invocation target function again.
Second calling module 204 continues to execute objective function from closed position for invocation target function again, until
Memory completes data write-in to be written.
In one embodiment of the invention, data processing equipment provided in an embodiment of the present invention can also include: verification
Module, for verifying the accuracy for being written to data in memory.
In one embodiment of the invention, the condition for meeting invocation target function again may include:
Other instruction executions are completed.
In one embodiment of the invention, the condition for meeting invocation target function again may include:
Go to the corresponding erasable instruction of other data.
In one embodiment of the invention, the condition for meeting invocation target function again may include:
Timer timing time for invocation target function again arrives.
The data processing equipment of the embodiment of the present invention, CPU do not recycle the erasable flag bit of interpretation memory, i.e., not etc.
Other instructions of reprocessing are completed to the erasable operation of memory, but within the period of the erasable operation of memory, it handles other and refers to
It enables, it is lower to improve cpu busy percentage, and improve instruction processing speed.
The embodiment of the present invention also provides a kind of computer readable storage medium, is stored on the computer readable storage medium
Computer program instructions；The computer program instructions realize data processing side provided in an embodiment of the present invention when being executed by processor
Method.
It should be clear that the invention is not limited to specific configuration described above and shown in figure and processing.
For brevity, it is omitted here the detailed description to known method.In the above-described embodiments, several tools have been described and illustrated
The step of body, is as example.But method process of the invention is not limited to described and illustrated specific steps, this field
Technical staff can be variously modified, modification and addition after understanding spirit of the invention, or suitable between changing the step
Sequence.
Functional block shown in structures described above block diagram can be implemented as hardware, software, firmware or their group
It closes.When realizing in hardware, it may, for example, be electronic circuit, specific integrated circuit (ASIC), firmware appropriate, insert
Part, function card etc..When being realized with software mode, element of the invention is used to execute program or the generation of required task
Code section.Perhaps code segment can store in machine readable media program or the data-signal by carrying in carrier wave is passing
Defeated medium or communication links are sent." machine readable media " may include any medium for capableing of storage or transmission information.
The example of machine readable media includes electronic circuit, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), soft
Disk, CD-ROM, CD, hard disk, fiber medium, radio frequency (RF) link, etc..Code segment can be via such as internet, inline
The computer network of net etc. is downloaded.
It should also be noted that, the exemplary embodiment referred in the present invention, is retouched based on a series of step or device
State certain methods or system.But the present invention is not limited to the sequence of above-mentioned steps, that is to say, that can be according in embodiment
The sequence referred to executes step, may also be distinct from that the sequence in embodiment or several steps are performed simultaneously.
The above description is merely a specific embodiment, it is apparent to those skilled in the art that,
For convenience of description and succinctly, the system, module of foregoing description and the specific work process of unit can refer to preceding method
Corresponding process in embodiment, details are not described herein.It should be understood that scope of protection of the present invention is not limited thereto, it is any to be familiar with
Those skilled in the art in the technical scope disclosed by the present invention, can readily occur in various equivalent modifications or substitutions,
These modifications or substitutions should be covered by the protection scope of the present invention.
Claims (11)
1. a kind of data processing method, which is characterized in that the described method includes:
When going to erasable instruction, data to be written corresponding with the erasable instruction are obtained；
The data to be written are written to buffer area by invocation target function, so that the data to be written are by the buffer area
It is written in memory；Block the objective function and records the closed position of the objective function；
Sequence executes other instructions, calls the condition of the objective function again until meeting；
The objective function is called again, continues to execute the objective function from the closed position, until the memory is complete
It is written at the data to be written.
2. data processing method according to claim 1, which is characterized in that the method also includes:
Verification is written to the accuracy of data in the memory.
3. the method according to claim 1, wherein described meet the condition of the objective function called again,
Include:
Other described instruction executions are completed.
4. the method according to claim 1, wherein described meet the condition of the objective function called again,
Include:
Go to the corresponding erasable instruction of other data.
5. the method according to claim 1, wherein described meet the condition of the objective function called again,
Include:
For calling the timer timing time of the objective function to arrive again.
6. a kind of data processing equipment, which is characterized in that described device includes:
Module is obtained, for when going to erasable instruction, obtains data to be written corresponding with the erasable instruction；
First calling module is used for invocation target function, the data to be written is written to buffer area, so that described to be written
Data are written in memory by the buffer area；Block the objective function and records the obstruction of the objective function
It sets；
Execution module calls the condition of the objective function until meeting for sequentially executing other instructions again；
Second calling module continues to execute the objective function from the closed position for calling the objective function again,
Until the memory completes the data write-in to be written.
7. device according to claim 6, which is characterized in that described device further include:
Correction verification module, for verifying the accuracy for being written to data in the memory.
8. device according to claim 6, which is characterized in that it is described to meet the condition for calling the objective function again,
Include:
Other described instruction executions are completed.
9. device according to claim 6, which is characterized in that it is described to meet the condition for calling the objective function again,
Include:
Go to the corresponding erasable instruction of other data.
10. device according to claim 6, which is characterized in that it is described to meet the condition for calling the objective function again,
Include:
For calling the timer timing time of the objective function to arrive again.
11. a kind of computer readable storage medium, which is characterized in that be stored with computer on the computer readable storage medium
Program realizes such as data processing method described in any one of claim 1 to 5 when the computer program is executed by processor.
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| CN201811354654.9A CN109543476B (en) | 2018-11-14 | 2018-11-14 | Data processing method, device and storage medium |
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| CN201811354654.9A CN109543476B (en) | 2018-11-14 | 2018-11-14 | Data processing method, device and storage medium |
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| CN110908601A (en) * | 2019-10-31 | 2020-03-24 | 联想(北京)有限公司 | Processing method and device and electronic equipment |
| CN111158607A (en) * | 2019-12-31 | 2020-05-15 | 潍柴动力股份有限公司 | Data erasing and writing operation processing method and system, electronic equipment and storage medium |
| CN112540729A (en) * | 2020-12-11 | 2021-03-23 | 捷德(中国)科技有限公司 | Data downloading method and device, smart card and storage medium |
| CN113095471A (en) * | 2020-01-09 | 2021-07-09 | 北京君正集成电路股份有限公司 | Method for improving efficiency of detection model |
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| Publication number | Publication date |
|---|---|
| CN109543476B (en) | 2022-02-22 |
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