CN109541302B - Frequency response measuring method for leakage current and contact current - Google Patents
Frequency response measuring method for leakage current and contact current Download PDFInfo
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- CN109541302B CN109541302B CN201811379874.7A CN201811379874A CN109541302B CN 109541302 B CN109541302 B CN 109541302B CN 201811379874 A CN201811379874 A CN 201811379874A CN 109541302 B CN109541302 B CN 109541302B
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Abstract
The invention relates to a frequency response test method of leakage current and contact current, firstly, carrying out hardware compensation on high-frequency analog signal attenuation through a frequency response measuring circuit; then capturing the high-frequency signal through a high-frequency signal capturing circuit; and finally, carrying out software correction on the response signal through the CPU. The invention designs a frequency response test method of leakage current and contact current from the aspects of hardware compensation and software correction, when the frequency of a measured current signal is more than 100kHz, the hardware compensation is carried out on the signal attenuation, and the software correction is carried out, so that the standard measurement requirement is met. The invention further enhances the capability and reliability of the leakage current and contact current test, and the instrument and meter using the technology can be suitable for the safety test of electric products in more industries, solves the problem of measuring accuracy of higher frequency signals for electric product production enterprises, and provides better safety guarantee for users purchasing the electric products.
Description
Technical Field
The invention relates to a frequency response test method, in particular to a frequency response test method for leakage current and contact current.
Background
The test bandwidth requirements of the leakage current and the contact current meet the frequency range of DC-1 MHz, and the frequency response meets the requirement of appendix L in GB/T12113-2003 contact current and protection conductor current measuring method. The existing leakage current tester and contact current tester in the industry can not meet the requirement.
Wherein leakage current refers to current flowing in a path that is not intended to conduct electricity, except for short circuit current. Contact current refers to the current passing through the body of an electrical device or electrical apparatus when a person or animal touches one or more accessible parts of the device. The frequency response is the frequency function relationship of the signals corresponding to the output end and the input end of the measuring network. The measurement network is a human body impedance model formed by a resistor-capacitor network circuit.
At present, when a measuring circuit of a contact current tester or a leakage current tester is designed, the frequency response requirement is considered, an operational amplifier with the bandwidth of more than 1MHz, low bias and high power consumption is required to realize the lowest signal attenuation ratio, but when the frequency of a measured current signal is more than 100kHz, the signal attenuation is serious, and the standard measuring requirement cannot be met.
In order to minimize the attenuation in the signal conditioning process, the prior art only selects a high-grade operational amplifier chip as much as possible, and has high cost and poor effect. Due to the influence of the parasitic capacitance (Miller effect) in the operational amplifier, the operational amplifier cannot ensure that all signals in the bandwidth of DC-1 MHz can be amplified according to the theoretical design requirement, particularly, the current signals of more than 100kHz actually attenuate by more than 20 percent, and the standard requirement is less than or equal to 5 percent.
The operational amplifier IC device can well amplify low-frequency signals according to a theoretical design proportion generally, and when the high-frequency band is reached, the base input impedance of an internal transistor of the operational amplifier and an input capacitor form a low-pass filter to limit the high-frequency characteristic of the operational amplifier. Aiming at the characteristic, the invention provides the idea of 'hardware compensation high-frequency analog signal attenuation + software correction algorithm', redesigns a measuring circuit, solves the problem of high-frequency signal test attenuation, and passes verification.
Disclosure of Invention
Aiming at the problems, the invention designs a frequency response test method of leakage current and contact current from the aspects of hardware compensation and software correction.
In order to solve the problems, the invention adopts the technical scheme that: a method of measuring frequency response of leakage current and contact current, comprising the steps of:
step one, performing hardware compensation on the attenuation of the high-frequency analog signal through a frequency response measuring circuit:
the frequency response measuring circuit is as follows: the Vin + of the signal to be measured is connected to the non-inverting input end of a fourth ADI operational amplifier chip (ADI4) through a seventh resistor (R7), the Vin-of the signal to be measured is connected to the non-inverting input end of a fifth ADI operational amplifier chip (ADI5) through an eighth resistor (R8), the inverting input end and the output end of the fourth ADI operational amplifier chip are connected to the inverting input end of a sixth ADI operational amplifier chip through a ninth resistor, the inverting input end of the sixth ADI operational amplifier chip is connected to the output end of the sixth ADI operational amplifier chip through a twelfth resistor, and the output end of the sixth ADI operational amplifier chip is connected to a hardware amplification and high-frequency compensation circuit; the inverting input end and the output end of the fifth ADI operational amplifier chip are connected to the non-inverting input end of the sixth ADI operational amplifier chip through a tenth resistor, and the non-inverting input end of the sixth ADI operational amplifier chip is grounded through an eleventh resistor; the output end of the hardware amplification and high-frequency compensation circuit outputs a response signal;
capturing the high-frequency signal through a high-frequency signal capturing circuit:
the high-frequency signal capturing circuit comprises: the response signal is connected to the non-inverting input end of the seventh ADI operational amplifier chip through the fourth capacitor, the non-inverting input end of the seventh ADI operational amplifier chip is grounded through the thirteenth resistor, the inverting input end and the output end of the seventh ADI operational amplifier chip are connected to the inverting input end of the high-speed comparator, the non-inverting input end of the high-speed comparator is connected to the output end and the inverting input end of the eighth ADI operational amplifier chip, and the output end of the eighth ADI operational amplifier chip outputs a capture signal;
the reverse phase output end of the high-speed comparator is connected to the base electrode of the triode, the collector electrode of the triode is connected to the power supply through the fourteenth resistor, and the emitter electrode of the triode is connected to the non-inverting input end of the eighth ADI operational amplifier chip through the diode; the non-inverting input end of the eighth ADI operational amplifier chip is grounded through a fifth capacitor, the non-inverting input end of the eighth ADI operational amplifier chip is connected to the drain electrode of the field effect tube through a fifteenth resistor, the grid electrode of the field effect tube is grounded after being connected to the source electrode through a sixteenth resistor, and the grid electrode of the field effect tube is connected to an enabling signal; the enabling signal is sent by the CPU, the AD module inputs the signal output by the RMS conversion module and the capture signal into the CPU, and the CPU compares the two and then controls the output enabling signal.
And the high-speed comparator receives the output signal of the seventh ADI operational amplifier chip and controls the high and low of the output level of the inverting output end by comparing the levels of the inverting input end and the non-inverting input end. The non-inverting input terminal is connected with the output signal of the high-frequency capturing circuit, and the inverting input terminal is connected with the captured high-frequency signal level. When the level of the in-phase input end is higher than that of the reverse-phase input end, the level of the reverse-phase output end becomes low, the triode is turned off, the grid electrode of the field effect tube is enabled, the fifth capacitor connected in the back circuit is discharged, and when the level of the in-phase input end is consistent with that of the reverse-phase input end, the field effect tube is turned off, and the fifth capacitor stops discharging; when the level of the in-phase input end is lower than that of the reverse phase input end, the level of the reverse phase output end is high, the triode is conducted, the field effect transistor is turned off at the moment, the fifth capacitor connected in the rear circuit is charged, and when the level of the in-phase input end is consistent with that of the reverse phase input end, the triode is turned off again, and the five capacitors stop charging. By this dynamic adjustment, the capture signal finally output from the high-frequency capture circuit is kept at the maximum value of the response signal.
The effect that the grid of the field effect transistor is connected with the enabling signal is to control the MOS transistor to be switched on or off in the measurement of the high-frequency capture signal, so that the charging and discharging of the fifth capacitor are realized, and the capture of the maximum value of the high-frequency signal is completed.
Step three, performing software correction on the response signal through a CPU:
the response signal is connected to the AD data conversion module through the RMS conversion module, the capture signal is connected to the AD data conversion module, and the AD data conversion module is connected to the CPU; when the captured signal is confirmed to be in accordance with a certain frequency range, the CPU performs software correction on the signal output by the RMS conversion module.
The hardware amplification and high-frequency compensation circuit comprises three stages of ADI operational amplifier conditioning circuits which are sequentially connected in series and have the same circuit structure, and the first stage of ADI operational amplifier conditioning circuit comprises: the non-inverting input end of the first ADI operational amplifier chip is connected to the output end of the sixth ADI operational amplifier chip; the inverting input end of the first ADI operational amplifier chip is grounded through a first resistor, the first resistor is connected with a first capacitor in parallel, the inverting input end of the first ADI operational amplifier chip is connected to the output end of the first ADI operational amplifier chip through a second resistor, and the output end of the first ADI operational amplifier chip is connected with the non-inverting input end of a second ADI operational amplifier chip in the second-stage ADI operational amplifier conditioning circuit; and the output end of a third ADI operational amplifier chip in the third-stage ADI operational amplifier conditioning circuit outputs a response signal.
And in the third step, when the frequency of the capture signal is confirmed to be more than 100KHZ, the CPU performs software modification on the signal output by the RMS conversion module. When the frequency of the captured signal is less than 100KHZ, the CPU directly takes the signal output by the RMS conversion module as a real effective value without correction.
The CPU performs software modification on the signal output by the RMS conversion module: the correction function curve conforms to a change rule of a binary linear equation of y, kx and b by tracing point collection data, wherein y and x are a real response value of a given measured signal and an actual response value output by an RMS conversion module respectively; and calculating the k and b values through software, so that software correction can be realized. The true response value y of a given measured signal is found in appendix L of GB/T12113-2003 methods for measuring contact current and guard conductor current.
The invention designs a frequency response test method of leakage current and contact current from the aspects of hardware compensation and software correction, when the frequency of a measured current signal is more than 100kHz, the hardware compensation is carried out on the signal attenuation, and the software correction is carried out, so that the standard measurement requirement is met. The invention further enhances the capability and reliability of the leakage current and contact current test, and the instrument and meter using the technology can be suitable for the safety test of electric products in more industries, solves the problem of measuring accuracy of higher frequency signals for electric product production enterprises, and provides better safety guarantee for users purchasing the electric products.
Drawings
FIG. 1 is a schematic diagram of a frequency response measurement circuit;
FIG. 2 is a diagram of a first stage operational amplifier conditioning circuit in a frequency response measurement circuit;
FIG. 3 is an equivalent circuit diagram of the effect of the capacitance component of the internal transistor of the operational amplifier on the high frequency characteristic;
fig. 4 is a schematic diagram of a high frequency signal capture circuit.
Detailed Description
A method of measuring frequency response of leakage current and contact current, comprising the steps of:
step one, performing hardware compensation on the attenuation of the high-frequency analog signal through a frequency response measuring circuit:
the frequency response measuring circuit is shown in figure 1: the Vin + of the measured signal is connected to the non-inverting input end of a fourth ADI operational amplifier chip (ADI4) through a seventh resistor (R7), the Vin-of the measured signal is connected to the non-inverting input end of a fifth ADI operational amplifier chip (ADI5) through an eighth resistor (R8), the inverting input end and the output end of the fourth ADI operational amplifier chip (ADI4) are connected to the inverting input end of a sixth ADI operational amplifier chip (ADI6) through a ninth resistor R9, the inverting input end of the sixth ADI operational amplifier chip (ADI6) is connected to the output end of the sixth ADI operational amplifier chip (ADI6) through a twelfth resistor R12, and the output end of the sixth ADI operational amplifier chip (ADI6) is connected to a hardware amplification and high-; an inverting input end and an output end of the fifth ADI operational amplifier chip ADI5 are connected to a non-inverting input end of the sixth ADI operational amplifier chip ADI6 through a tenth resistor R10, and a non-inverting input end of the sixth ADI operational amplifier chip ADI6 is grounded through an eleventh resistor R11;
the hardware amplification and high-frequency compensation circuit comprises three stages of ADI operational amplifier conditioning circuits which are sequentially connected in series and have the same circuit structure, and the first stage of ADI operational amplifier conditioning circuit is shown in figure 2: the non-inverting input end of the first ADI operational amplifier chip ADI1 is connected to the output end of a sixth ADI operational amplifier chip ADI 6; the inverting input end of the first ADI operational amplifier chip ADI1 is grounded through a first resistor R1, a first capacitor C1 is connected in parallel to the first resistor R1, the inverting input end of the first ADI operational amplifier chip ADI1 is connected to the output end of the first ADI operational amplifier chip ADI1 through a second resistor R2, and the output end of the first ADI operational amplifier chip ADI 3983 is connected with the non-inverting input end of a second ADI operational amplifier chip ADI2 in the second-stage ADI operational amplifier conditioning circuit; the output end of a third ADI operational amplifier chip ADI3 in the third-stage ADI operational amplifier conditioning circuit outputs a response signal Vout 1.
Capturing the high-frequency signal through a high-frequency signal capturing circuit:
the high-frequency signal capturing circuit is shown in fig. 4: the response signal Vout1 is connected to the non-inverting input terminal of the seventh ADI operational amplifier chip ADI7 through the fourth capacitor C4 and the non-inverting input terminal is grounded through the thirteenth resistor R13, the inverting input terminal and the output terminal of the seventh ADI operational amplifier chip ADI7 are connected to the inverting input terminal of the high-speed comparator, the non-inverting input terminal of the high-speed comparator is connected to the output terminal and the inverting input terminal of the eighth ADI operational amplifier chip ADI8, and the output terminal of the eighth ADI operational amplifier chip ADI8 outputs the capture signal Vout 2;
the inverting output end of the high-speed comparator is connected to the base electrode of a triode Q1, the collector electrode of a triode Q1 is connected to a power supply VCC through a fourteenth resistor R14, and the emitter electrode of a triode Q1 is connected to the non-inverting input end of an eighth ADI operational amplifier chip ADI8 through a diode D1; the non-inverting input end of the eighth ADI operational amplifier chip ADI8 is grounded through a fifth capacitor C5, the non-inverting input end of the eighth ADI operational amplifier chip ADI8 is connected to the drain of a field effect transistor MOS1 through a fifteenth resistor R15, the grid of the field effect transistor MOS1 is connected to the source through a sixteenth resistor R16 and then grounded, and the grid of the field effect transistor MOS1 is connected to an enable signal EN; the enable signal EN is sent by the CPU, the AD module inputs the signal output by the RMS conversion module and the capture signal into the CPU, and the CPU compares the magnitudes of the two signals and then controls the output enable signal.
Step three, performing software correction on the response signal through a CPU:
the response signal Vout1 is connected to the AD data conversion module through the RMS conversion module, the capture signal Vout2 is connected to the AD data conversion module, and the AD data conversion module is connected to the CPU; when the frequency of the capture signal Vout2 is confirmed to be larger than 100KHZ, the CPU performs software correction on the signal output by the RMS conversion module;
the CPU performs software modification on the signal output by the RMS conversion module: the correction function curve conforms to a change rule of a binary linear equation of y, kx and b by tracing point collection data, wherein y and x are a real response value of a given measured signal and an actual response value output by an RMS conversion module respectively; wherein the true response value y of a given measured signal is queried in appendix L of GB/T12113-2003 method for measuring contact current and protection conductor current; and calculating the k and b values through software, so that software correction can be realized.
The first stage op-amp conditioning circuit in the dashed box of fig. 1 is taken as an example to illustrate the key technology of the design, as shown in fig. 2. The first capacitor C1 is not soldered, and the amplification factor of the stage is ═ 1+ R2/R1. When the frequency of a measured signal is less than or equal to 100kHz, the amplification factor of the ADI operational amplifier chip is maintained near A, and the measurement error can meet the design requirement, but when the frequency of the measured signal is more than 100kHz, the input impedance and the input capacitance formed by the in-phase input end of the first ADI operational amplifier chip to the reference ground of the operational amplifier limit the high-frequency characteristic of the input signal, and the reference model can be equivalent to the mode shown in the figure 3.
It is clear from fig. 3 that the input impedance r of the transistor and the input capacitance Ci form a low-pass filter, so that the measured signals with different frequencies cannot be conditioned by the same amplification factor a, which is the miller effect. In order to overcome the limitation caused by this effect, we have designed a capacitance compensation mechanism, i.e. the function of the first capacitor C1 in the circuit shown in fig. 2, and the compensation principle is the change rule of capacitance and capacitance resistance influenced by the frequency of the signal to be measured.
The capacitance reactance is calculated according to the formula ZC ═ 2 × pi × f × C) -1, the measured signal frequency f increases, the capacitance reactance ZC decreases, the total impedance of C1// R1 decreases, the second resistor R2 is constant, the operational amplification factor becomes a '- (1+ R2/(C1// R1)), a' increases as f increases, and the high-frequency signal conditioning can be reduced. The non-attenuated frequency response measurement can be realized only by calculating that the capacitance value of the first capacitor C1 is matched with the high-frequency f.
Because the actual material capacitor can not work according to ideal calculation parameters, a set of software algorithm is designed to further correct the error of the frequency response test signal, so that the error completely meets the standard requirement. In order to assist the software correction, the present invention designs a high frequency signal capturing circuit as shown in fig. 4, and the software correction works simultaneously when the high frequency signal is detected.
For the test of low-frequency signals, the capacitive reactance of the first capacitor C1 is large enough, and the equivalent impedance of the C1// R1 is very close to that of the first resistor R1, so that the conditioning and amplification of the low-frequency signals still meet the requirement of amplifying by A times and are not influenced. When the frequency is more than 100kHz, the first capacitor C1 plays a compensation role, the high-frequency signal attenuation amplitude is completely compensated through three-stage compensation, and the requirement that the standard measurement error is less than or equal to 5% can be completely met by adding software correction.
Claims (4)
1. A method of measuring frequency response of leakage current and contact current, comprising the steps of:
step one, performing hardware compensation on the attenuation of the high-frequency analog signal through a frequency response measuring circuit:
the frequency response measuring circuit is as follows: the Vin + of the measured signal is connected to the non-inverting input end of a fourth ADI operational amplifier chip (ADI4) through a seventh resistor (R7), the Vin-of the measured signal is connected to the non-inverting input end of a fifth ADI operational amplifier chip (ADI5) through an eighth resistor (R8), the inverting input end and the output end of the fourth ADI operational amplifier chip (ADI4) are connected to the inverting input end of a sixth ADI operational amplifier chip (ADI6) through a ninth resistor (R9), the inverting input end of the sixth ADI operational amplifier chip (ADI6) is connected to the output end of the sixth ADI operational amplifier chip (ADI6) through a twelfth resistor (R12), and the output end of the sixth ADI operational amplifier chip (ADI6) is connected to a hardware amplification and high-frequency compensation circuit; the inverting input end and the output end of the fifth ADI operational amplifier chip (ADI5) are connected to the non-inverting input end of the sixth ADI operational amplifier chip (ADI6) through a tenth resistor (R10), and the non-inverting input end of the sixth ADI operational amplifier chip (ADI6) is grounded through an eleventh resistor (R11); the output end of the hardware amplifying and high-frequency compensating circuit outputs a response signal (Vout 1);
capturing the high-frequency signal through a high-frequency signal capturing circuit:
the high-frequency signal capturing circuit comprises: a response signal (Vout1) is connected to the non-inverting input terminal of the seventh ADI operational amplifier chip (ADI7) through a fourth capacitor (C4) and the non-inverting input terminal is grounded through a thirteenth resistor (R13), the inverting input terminal and the output terminal of the seventh ADI operational amplifier chip (ADI7) are connected to the inverting input terminal of the high-speed comparator, the non-inverting input terminal of the high-speed comparator is connected to the output terminal and the inverting input terminal of the eighth ADI operational amplifier chip (ADI8), and the output terminal of the eighth ADI operational amplifier chip (ADI8) outputs a capture signal (Vout 2);
the inverting output end of the high-speed comparator is connected to the base electrode of a triode (Q1), the collector electrode of the triode (Q1) is connected to a power supply (VCC) through a fourteenth resistor (R14), and the emitter electrode of the triode (Q1) is connected to the non-inverting input end of an eighth ADI operational amplifier chip (ADI8) through a diode (D1); the non-inverting input end of the eighth ADI operational amplifier chip (ADI8) is grounded through a fifth capacitor (C5), the non-inverting input end of the eighth ADI operational amplifier chip (ADI8) is connected to the drain of a field effect transistor (MOS1) through a fifteenth resistor (R15), the gate of the field effect transistor (MOS1) is connected to the source through a sixteenth resistor (R16) and then grounded, and the gate of the field effect transistor (MOS1) is connected with an enable signal (EN);
step three, performing software correction on the response signal through a CPU:
the response signal (Vout1) is connected to the AD data conversion module through the RMS conversion module, the capture signal (Vout2) is connected to the AD data conversion module, and the AD data conversion module is connected to the CPU; when the capture signal (Vout2) is confirmed to be within a certain frequency range, the CPU performs software modification on the signal output by the RMS conversion module.
2. The method of measuring frequency response of leakage current and contact current of claim 1, wherein: the hardware amplification and high-frequency compensation circuit comprises three stages of ADI operational amplifier conditioning circuits which are sequentially connected in series and have the same circuit structure, and the first stage of ADI operational amplifier conditioning circuit comprises: the non-inverting input end of the first ADI operational amplifier chip (ADI1) is connected to the output end of the sixth ADI operational amplifier chip (ADI 6); the inverting input end of the first ADI operational amplifier chip (ADI1) is grounded through a first resistor (R1), the first resistor (R1) is connected with a first capacitor (C1) in parallel, the inverting input end of the first ADI operational amplifier chip (ADI1) is connected to the output end of the first ADI operational amplifier chip (ADI1) through a second resistor (R2), and the output end of the first ADI operational amplifier chip is connected with the non-inverting input end of a second ADI operational amplifier chip (ADI2) in the second-stage ADI operational amplifier conditioning circuit; the output end of a third ADI operational amplifier chip (ADI3) in the third-stage ADI operational amplifier conditioning circuit outputs a response signal (Vout 1).
3. The method of measuring frequency response of leakage current and contact current of claim 1, wherein: in the third step, the CPU performs a software modification on the signal output by the RMS conversion module when it is determined that the frequency of the capture signal (Vout2) is greater than 100 KHZ.
4. The method of measuring frequency response of leakage current and contact current of claim 3, wherein: the CPU performs software modification on the signal output by the RMS conversion module: the correction function curve conforms to a change rule of a binary linear equation of y, kx and b by tracing point collection data, wherein y and x are a real response value of a given measured signal and an actual response value output by an RMS conversion module respectively; and calculating the k and b values through software, so that software correction can be realized.
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