JP6110757B2 - Signal generator, signal generation method, test apparatus, and test method - Google Patents

Description

  The present invention relates to a signal generator, a signal generation method, a test apparatus, and a test method.

Conventionally, it is known that an error occurs in output due to dielectric absorption characteristics in a capacitor (see, for example, Patent Document 1). In this technique, the output error is compensated by precharging the capacitor before actual operation.
Patent Document 1 Japanese Unexamined Patent Publication No. 2000-171688

  However, there is a limit to speeding up the operation because a period for precharging the capacitor before the actual operation is provided.

  In the first aspect of the present invention, an operation circuit including an operation capacitor and outputting an operation signal, and an RC series circuit having a time constant equal to a time constant of an equivalent circuit of dielectric absorption in the operation capacitor are provided. A signal generator comprising a compensation circuit for compensating for distortion caused by dielectric absorption of an operating capacitor, and a signal generation method using the signal generator are provided.

  According to a second aspect of the present invention, there is provided a test apparatus for testing a device under test, which generates a signal according to an input signal and inputs the signal to the device under test. Provided are a test apparatus including a determination unit that determines pass / fail of a device under test based on the operation of the device under test, and a test method using the test apparatus.

  It should be noted that the above summary of the invention does not enumerate all the necessary features of the present invention. In addition, a sub-combination of these feature groups can also be an invention.

It is a figure which shows the structural example of the signal generator 100 which concerns on embodiment of this invention. 2 is a diagram illustrating a configuration example of an operation circuit 10. 3 is a diagram illustrating a configuration example of a compensation circuit 40. FIG. 4 is a diagram illustrating an example of frequency characteristics of an operation circuit 10 and a compensation circuit 40. FIG. 6 is a diagram illustrating another configuration example of the compensation circuit 40. FIG. 6 is a diagram illustrating another configuration example of the compensation circuit 40. FIG. 6 is a diagram illustrating another configuration example of the compensation circuit 40. FIG. 3 is a diagram illustrating another configuration example of the operation circuit 10. FIG. It is a figure which shows the structural example of the test apparatus 200 which concerns on embodiment of this invention.

  Hereinafter, the present invention will be described through embodiments of the invention, but the following embodiments do not limit the invention according to the claims. In addition, not all the combinations of features described in the embodiments are essential for the solving means of the invention.

  FIG. 1 is a diagram illustrating a configuration example of a signal generator 100 according to an embodiment of the present invention. The signal generator 100 generates an output signal corresponding to the input signal. The signal generator 100 of this example includes an operation circuit 10 and a compensation circuit 40.

  The operation circuit 10 includes an operation capacitor and outputs an operation signal corresponding to the input signal. For example, the operation circuit 10 is an integration circuit that integrates an input signal using an operation capacitor. However, dielectric absorption may occur in the capacitor. Due to the dielectric absorption, the operation signal output from the operation circuit 10 is distorted. The compensation circuit 40 generates an output signal that compensates for distortion in the operation signal of the operation circuit 10. The signal generator 100 may further include a band limiting circuit that removes high-frequency noise from the signal output from the compensation circuit 40.

  FIG. 2 is a diagram illustrating a configuration example of the operation circuit 10. The operation circuit 10 of this example is a so-called integration circuit. The operation circuit 10 receives an input signal from the signal input unit 22. The signal input unit 22 of this example has a constant current source. The signal input unit 22 in this example generates a pulsed constant current signal Iin by controlling on and off of the constant current source. Note that the signal input unit 22 may be provided outside the signal generator 100.

  The operation circuit 10 has an operation capacitor 14 and a differential amplifier 12, and outputs an operation signal obtained by integrating an input signal. The operation circuit 10 of this example generates an operation signal having a ramp waveform. The ramp waveform is a waveform in which the intensity increases or decreases with a substantially constant slope. The operating capacitor 14 is provided between the negative input terminal and the output terminal of the differential amplifier 12. A reference potential such as a ground potential is applied to the positive input terminal of the differential amplifier 12.

  Note that the operating circuit 10 of this example further includes an equivalent circuit (a series circuit of an equivalent resistor 18 and an equivalent capacitor 19) showing dielectric absorption of the operating capacitor 14. In general, an equivalent circuit of dielectric absorption in a capacitor is represented by a circuit in which a series circuit of a resistor and a capacitor is connected in parallel with the original capacitor.

  When the dielectric absorption of the operating capacitor 14 cannot be ignored, the operating signal output from the operating circuit 10 is distorted by dielectric absorption. Specifically, due to the equivalent resistance 18 and the equivalent capacitor 19, the frequency characteristic of the operation circuit 10 is such that the gain of the low frequency component is reduced (or the high frequency component of the high frequency component) compared to the frequency characteristic when the dielectric absorption is not considered. Gain increases). The gain fluctuation is determined by the capacitance ratio of the operating capacitor 14 and the equivalent capacitor 19.

  The compensation circuit 40 generates an output signal in which distortion due to the dielectric absorption is compensated. The compensation circuit 40 of this example includes an RC series circuit whose time constant is equal to the time constant of the equivalent circuit of dielectric absorption in the operating capacitor 14. The compensation circuit 40 adds and subtracts a compensation signal obtained by limiting the band of the operation signal with the RC series circuit and the operation signal, and outputs the result.

  FIG. 3 is a diagram illustrating a configuration example of the compensation circuit 40. The compensation circuit 40 of this example includes a first voltage dividing resistor 44, an RC series circuit 42, and a voltage follower circuit 50. The RC series circuit 42 includes a second voltage dividing resistor 46 and a compensation capacitor 48. The first voltage dividing resistor 44 is provided between the output terminal of the operation circuit 10 and the reference potential. The second voltage dividing resistor 46 is provided in series with the first voltage dividing resistor 44 between the first voltage dividing resistor 44 and the reference potential. The resistance value of the second voltage dividing resistor 46 may be larger than the resistance value of the first voltage dividing resistor 44. The compensation capacitor 48 is provided in series with the second voltage dividing resistor 46 between the first voltage dividing resistor 44 and the reference potential. In the example of FIG. 3, the second voltage dividing resistor 46 is connected to the first voltage dividing resistor 44, and the compensation capacitor 48 is provided between the second voltage dividing resistor 46 and the reference potential. A second voltage dividing resistor 46 connected to the first voltage dividing resistor 44 may be provided between the compensation capacitor 48 and the reference potential. The voltage follower circuit 50 receives a signal at a contact point of the first voltage dividing resistor 44 and the RC series circuit 42 (in this example, a contact point of the first voltage dividing resistor 44 and the second voltage dividing resistor 46), and according to the signal Output a signal.

  Since the second voltage dividing resistor 46 and the compensation capacitor 48 are provided in series between the signal line and the reference potential, the RC series circuit of this example functions as a low-pass filter. A signal output from the RC series circuit 42 (in this example, a signal at the contact point of the first voltage dividing resistor 44 and the second voltage dividing resistor 46) includes a compensation signal in which the band of the operation signal is limited by the low-pass filter, and the operation signal. Becomes a signal added with a specific gravity corresponding to the resistance ratio of the first voltage dividing resistor 44 and the second voltage dividing resistor 46.

Here, the resistance ratio between the first voltage-dividing resistor 44 and the second voltage-dividing resistor 46 is equal to the ratio of the dielectric absorption equivalent capacitance (that is, the capacitance of the equivalent capacitor 19) and the capacitance of the operating capacitor 14. That is, when the resistance values of the first voltage dividing resistor 44 and the second voltage dividing resistor 46 are R1 and R2, and the capacitance of the operating capacitor 14 and the capacitance of the equivalent capacitor 19 are Cf and Cd, the following relationship is established.
R1: R2 = Cd: Cf Formula (1)
Further, since the time constant of the dielectric absorption equivalent circuit and the time constant of the RC series circuit 42 are matched, the following relationship is established. However, the resistance value of the equivalent resistance is Rd, and the capacitance of the compensation capacitor 48 is C1.
Rd × Cd = R2 × C1 Formula (2)

  As a result, the compensation circuit 40 adds and subtracts the operation signal and the compensation signal in accordance with the ratio of the capacitance of the operation capacitor 14 and the equivalent capacitor 19. Therefore, the dielectric absorption can compensate for the low frequency component whose gain is relatively small with respect to the gain of the high frequency component according to the capacitance ratio of the operating capacitor 14 and the equivalent capacitor 19.

  In addition, the case where the time constants are “matched” includes not only the case where the time constants are exactly matched, but also the case where they are substantially matched to such an extent that the distortion of the output signal can be compensated so as to be within the allowable range. In this example, if the ratio of the time constant of the equivalent circuit for dielectric absorption and the time constant of the RC series circuit 42 is within the range of 90% to 110%, it may be considered substantially coincident.

  Note that the ratio “equal” includes not only the case where the ratio is exactly the same but also the case where the ratio is substantially equal to the extent that the distortion due to the dielectric absorption can be compensated until it falls within the allowable range. In this example, if the ratio of the resistance values is within the range of 90% to 110% of the ratio of the capacitance values, it may be considered substantially equal.

The capacitance of the compensation capacitor 48 may be a capacitance obtained by multiplying the capacitance of the equivalent capacitor 19 by a predetermined coefficient A greater than 1. In this case, as is apparent from the equation (2), the second voltage dividing resistor 46 has a resistance value obtained by dividing the resistance value of the equivalent resistor 18 by the coefficient. Further, as apparent from the equation (1), the first voltage dividing resistor 44 is a resistance obtained by dividing the product of the resistance value of the equivalent resistor 18 and the capacitance of the equivalent capacitor 19 by the product of the capacitance of the operating capacitor 14 and the coefficient. Has a value. That is, it has the following relationship.
C1 = A × Cd
R2 = Rd / A
R1 = (Cd × Rd) / (Cf × A)
Thereby, the resistance value of each voltage dividing resistor can be reduced. The value of the coefficient A is about 10 times, for example.

  FIG. 4 is a diagram illustrating an example of frequency characteristics of the operation circuit 10 and the compensation circuit 40. Due to the dielectric absorption of the operating capacitor 14, the frequency characteristic of the operating circuit 10 of this example is not linear. As described above, the frequency characteristic of the operation circuit 10 is such that the gain of the low frequency component decreases (or the gain of the high frequency component increases) compared to the frequency characteristic when the dielectric absorption is not considered.

  Specifically, the frequency characteristic on the lower frequency side than the predetermined frequency f1 (where f1 = 1 / (2πCdRd)) and the frequency characteristic on the higher frequency side than the predetermined frequency f2 are not linear, and Frequency characteristics are relatively low. The frequency f2 is a frequency at which the impedance of the equivalent circuit of the dielectric absorption becomes very large with respect to the impedance of the operating capacitor 14 and can be ignored. Further, the gain of the operation circuit 10 is substantially constant in the interval from the frequency f1 to f2.

  On the other hand, in the frequency characteristic of the compensation circuit 40, the impedance of the compensation capacitor 48 is large on the lower frequency side than the frequency f1, and almost no current flows through the RC series circuit 42. Therefore, the gain is approximately 1. In the section from the frequency f1 to f2, the low-pass characteristic in which the gain gradually decreases is shown. On the higher frequency side than the frequency f2, the impedance of the compensation capacitor 48 is much smaller than the resistance value of the second voltage dividing resistor 46, and can be almost ignored. For this reason, the operation signal output from the operation circuit 10 is divided by the resistance ratio of the voltage dividing resistor.

  By using the compensation circuit 40 having such frequency characteristics, it is possible to compensate for the gap between the frequency characteristics on the low frequency side and the high frequency side in the operation circuit 10 caused by dielectric absorption. Further, since the operating capacitor 14 need not be charged in advance, the speeding up of the signal generator 100 is not limited.

  FIG. 5 is a diagram illustrating another configuration example of the compensation circuit 40. The compensation circuit 40 of this example has a configuration in which the amplifier circuit 60 is provided in place of the voltage follower circuit 50 in the compensation circuit 40 shown in FIG. The amplifier circuit 60 amplifies and outputs a signal at a contact point of the first voltage dividing resistor 44 and the RC series circuit 42 (in this example, a contact point of the first voltage dividing resistor 44 and the second voltage dividing resistor 46).

  The amplifier circuit 60 includes an amplification resistor 64, an amplification resistor 66, and a differential amplifier 62. The amplification resistor 64 is connected between the contact of the first voltage dividing resistor 44 and the RC series circuit 42 and the negative side input terminal of the differential amplifier 62. The amplification resistor 66 is connected between the negative input terminal of the differential amplifier 62 and the output terminal. The amplifier circuit 60 amplifies the signal at an amplification factor according to the resistance ratio of the amplification resistor. The resistance value of the amplification resistor 64 is preferably sufficiently larger than the resistance value of the second voltage dividing resistor 46 so as not to affect the addition ratio between the operation signal and the compensation signal. With such a configuration, it is possible to amplify and output the operation signal compensated for distortion.

  FIG. 6 is a diagram illustrating another configuration example of the compensation circuit 40. The compensation circuit 40 of this example includes an RC series circuit 42, a second voltage dividing resistor 46, resistors 70, 72, 74, and 76, a differential amplifier 68, and a buffer 78.

  The resistor 70 is connected between the output terminal of the operation circuit 10 and the negative input terminal of the differential amplifier 68. The resistor 72 is connected between the negative side input terminal and the output terminal of the differential amplifier 68. The resistance values of the resistor 70 and the resistor 72 are the same.

  The RC series circuit 42 of this example includes a compensation capacitor 48 and a first voltage dividing resistor 44. The compensation capacitor 48 is provided between the line connecting the output terminal of the operation circuit 10 and the resistor 70 and the reference potential. The first voltage dividing resistor 44 is provided in series with the compensation capacitor 48 between the output terminal of the operation circuit 10 and the reference potential. The second voltage dividing resistor 46 is provided between the first voltage dividing resistor 44 and the reference potential. In the example of FIG. 6, the compensation capacitor 48 is connected to the output terminal of the operation circuit 10, and the first voltage dividing resistor 44 is provided between the compensation capacitor 48 and the second voltage dividing resistor 46. The voltage resistor 44 may be connected to the output terminal of the operation circuit 10, and the compensation capacitor 48 may be provided between the first voltage dividing resistor 44 and the second voltage dividing resistor 46.

The RC series circuit 42 of this example functions as a high-pass filter that passes the high-frequency component of the operation signal output from the operation circuit 10. In this example, the signal that has passed through the RC series circuit 42 is a compensation signal. However, the RC series circuit 42 passes the high-frequency component with a gain corresponding to the resistance ratio of the first voltage dividing resistor 44 and the second voltage dividing resistor 46. The characteristic values of the compensation capacitor 48, the first voltage dividing resistor 44, and the second voltage dividing resistor 46 are as follows.
C1 = A × Cd
R1 = Rd / A
R2 = (Cd × Rd) / (Cf × A)
Also in this example, the time constant of the RC series circuit 42 matches the time constant of the equivalent circuit of dielectric absorption. That is, C1 × R1 = Cd × Rd.

  The resistor 74 includes a contact point between the RC series circuit 42 and the second voltage dividing resistor 46 (in this example, a contact point between the first voltage dividing resistor 44 and the second voltage dividing resistor 46), and a positive input terminal of the differential amplifier 68. Between. The differential amplifier 68 functions as an addition / subtraction circuit that adds a signal obtained by inverting the operation signal and the compensation signal output from the RC series circuit 42. As a result, as shown in FIG. 4, the compensation circuit 40 can reduce the high-frequency component whose gain is relatively increased in the operation signal.

  Such a configuration can also compensate for distortion due to dielectric absorption. That is, in the configuration shown in FIG. 3, the distortion is compensated by adding the output of the RC series circuit 42 that functions as a low-pass filter to the operation signal. However, in the configuration shown in FIG. 6, the output functions as a high-pass filter. The distortion was compensated by subtracting the output of the RC series circuit 42 from the operation signal. Either method can compensate for distortion due to dielectric absorption.

  The buffer 78 detects a reference potential (for example, ground potential GND) of a circuit connected to the subsequent stage of the compensation circuit 40. The buffer 78 controls the reference level of the positive input terminal of the differential amplifier 68 according to the detected reference potential. In this example, the output terminal of the buffer 78 is connected to the positive input terminal of the differential amplifier 68 via the resistor 76. The resistance values of the resistor 74 and the resistor 76 are equal. As a result, the reference level of the signal output from the compensation circuit 40 can correspond to the reference potential in the subsequent circuit.

  FIG. 7 is a diagram illustrating another configuration example of the compensation circuit 40. In FIG. 7, the operation circuit 10 and the signal input unit 22 are shown together. The operation circuit 10 of this example shows a dielectric absorption equivalent circuit in more detail. Specifically, the equivalent circuit has a plurality of sets of equivalent resistors 18 and equivalent capacitors 19 in parallel. FIG. 7 shows two such sets.

  The compensation circuit 40 of this example includes a plurality of RC series circuits 42, a differential amplifier 82, and a resistor 80. In FIG. 7, two RC series circuits 42 are shown. Each RC series circuit 42 corresponds to any set of the equivalent capacitor 19 and the equivalent resistance 18 in the equivalent circuit of dielectric absorption.

  If the equivalent circuit of dielectric absorption can be approximated by a set of equivalent capacitor 19 and equivalent resistor 18, the compensation circuit 40 of this example may also have only one RC series circuit 42. Similarly, each compensation circuit 40 shown in FIGS. 3 to 6 includes a plurality of RC series circuits 42 when the equivalent circuit of dielectric absorption is approximated by a plurality of sets of equivalent capacitors 19 and equivalent resistors 18. It's okay.

  The RC series circuit 42 of this example includes a compensation capacitor 48 and a compensation resistor 49. The compensation capacitor 48 is provided between the output terminal of the operation circuit 10 and the negative input terminal of the differential amplifier 82. The compensation resistor 49 is provided between the compensation capacitor 48 and the negative side input terminal of the differential amplifier 82. Each RC series circuit 42 is provided in parallel between the output terminal of the operation circuit 10 and the negative input terminal of the differential amplifier 82.

  The characteristic value of each element in the RC series circuit 42 is determined according to the characteristic value of the corresponding equivalent capacitor 19 and equivalent resistor 18 in the same manner as the characteristic value of each element in the RC series circuit 42 shown in FIG. The compensation resistor 49 corresponds to the first voltage dividing resistor 44. Each RC series circuit 42 passes high-frequency components of the operation signal.

The resistor 80 is provided between the negative side input terminal and the output terminal of the differential amplifier 82. The resistance value R of the resistor 80 is given by the following equation. However, the capacitance of the equivalent capacitor 19-1 is Cd1, the resistance value of the equivalent resistor 18-1 is Rd1, the capacitance of the equivalent capacitor 19-2 is Cd2, and the resistance value of the equivalent resistor 18-2 is Rd2.
R = ((Cd1 + Cd2) / Cf) × ((Rd1 × Rd2) / (Rd1 + Rd2)) / A

  A reference potential (for example, ground potential GND) of a circuit connected to the subsequent stage of the compensation circuit 40 is input to the positive input terminal of the differential amplifier 82. The differential amplifier 82 amplifies the compensation signal output from the RC series circuit 42 with an amplification factor corresponding to the resistance value of the resistor 80 and the ground potential GND as a reference level. The output terminal of the differential amplifier 82 is connected to the positive input terminal of the differential amplifier 12.

  The compensation circuit 40 of this example feeds back a signal corresponding to the high frequency component in the operation signal to the differential amplifier 12. Such a configuration can also compensate for distortion in the operation signal.

  FIG. 8 is a diagram illustrating another configuration example of the operation circuit 10. The operation circuit 10 of this example functions as a so-called sample hold circuit. The operation circuit 10 of this example includes an operation capacitor 14, a switch 84, and a voltage follower circuit 86. In addition, an equivalent circuit (an equivalent resistor 18 and an equivalent capacitor 19) for dielectric absorption of the operating capacitor 14 is also shown.

  The switch 84 switches whether to transmit an input signal into the operation circuit 10. The switch 84 is turned on at a timing at which the signal level of the input signal is to be sampled, and is turned off after a predetermined time has elapsed.

  The operating capacitor 14 is provided between the wiring connecting the switch 84 and the input terminal of the voltage follower circuit 86 and the reference potential. The operating capacitor 14 holds the signal level of the input signal at the timing when the switch 84 is turned on.

  The voltage follower circuit 86 outputs an operation signal having a signal level held in the operation capacitor 14 to a subsequent circuit. Thus, the signal level of the input signal can be sampled and held at a predetermined timing and output. However, the dielectric absorption of the operating capacitor 14 causes distortion in the operating signal output from the operating circuit 10.

  The compensation circuit 40 compensates for distortion in the operation signal and outputs it. The compensation circuit 40 is the same as any one of the compensation circuits 40 shown in FIGS. With such a configuration, signal distortion in the sample and hold circuit can be compensated. Therefore, even if the input signal is sampled at high speed in the sample and hold circuit, a signal with less distortion can be obtained. Note that the compensation circuit 40 may input a signal with compensated distortion to the AD converter. Thereby, the signal level of the input signal can be converted into a digital value.

  As described above, the compensation circuit 40 can compensate for distortion in signals of various operation circuits 10 having the operation capacitor 14. The configuration of the operation circuit 10 is not limited to the configurations shown in FIGS. The compensation circuit 40 can be applied to various circuits having a capacitor.

  FIG. 9 is a diagram illustrating a configuration example of the test apparatus 200 according to the embodiment of the present invention. The test apparatus 200 tests a device under test 300 such as an AD converter or a semiconductor circuit. The test apparatus 200 includes a signal generator 100 and a determination unit 110.

  The signal generator 100 is the same as any of the signal generators 100 described in connection with FIGS. The signal generator 100 generates a signal to be input to the device under test 300. For example, when the device under test 300 is an AD converter, the signal generator 100 generates a ramp wave.

  The determination unit 110 measures the operation of the device under test 300 to which the signal is input from the signal generator 100. The determination unit 110 may measure a signal output from the device under test 300, or may measure fluctuations in a power supply voltage, a power supply current, and the like applied to the device under test 300. When the device under test 300 is an AD converter, the determination unit 110 detects a digital value obtained by sequentially converting each level of the ramp wave by the AD converter.

  The determination unit 110 determines pass / fail of the device under test 300 based on the measurement result. The determination unit 110 may determine pass / fail of the device under test 300 based on whether the measurement result matches a predetermined expected value. Since the test apparatus 200 of this example can input a signal with less distortion with respect to a desired waveform to the device under test 300, the device under test 300 can be accurately tested.

  The signal generator 100 can be used for various purposes other than the test of the device under test 300. For example, since the signal generator 100 can generate a highly accurate ramp wave, it is suitable for various applications using the ramp wave. As an example, by detecting the level of the ramp wave at two input timings and measuring the level difference, it is possible to accurately detect the timing time difference.

  As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

  The order of execution of each process such as operations, procedures, steps, and stages in the apparatus, system, program, and method shown in the claims, the description, and the drawings is particularly “before” or “prior to”. It should be noted that the output can be realized in any order unless the output of the previous process is used in the subsequent process. Regarding the operation flow in the claims, the description, and the drawings, even if it is described using “first”, “next”, etc. for convenience, it means that it is essential to carry out in this order. It is not a thing.

DESCRIPTION OF SYMBOLS 10 ... Operation circuit, 12 ... Differential amplifier, 14 ... Operation capacitor, 18 ... Equivalent resistance, 19 ... Equivalent capacitor, 22 ... Signal input part, 40 ... Compensation circuit 42 ... RC series circuit, 44 ... first voltage dividing resistor, 46 ... second voltage dividing resistor, 48 ... compensation capacitor, 49 ... compensation resistor, 50 ... voltage follower circuit , 60... Amplifier circuit, 62... Differential amplifier, 64, 66... Amplifying resistor, 68... Differential amplifier, 70, 72, 74, 76. , 80... Resistor, 82... Differential amplifier, 84... Switch, 86... Voltage follower circuit, 100 ... signal generator, 110. 300 ... Device under test

Claims (13)

An operation circuit including an operation capacitor and outputting an operation signal;
A compensation circuit for compensating for distortion of the operation signal due to dielectric absorption of the operation capacitor,
The compensation circuit includes an RC series circuit having a time constant equal to a time constant of an equivalent circuit of dielectric absorption in the operating capacitor, and a compensation signal obtained by limiting a band of the operation signal by the RC series circuit; A signal generator for adding and subtracting the operation signal. The signal generator according to claim 1, wherein the compensation circuit adds and subtracts the operation signal and the compensation signal according to a ratio of a capacitance of the operation capacitor and an equivalent capacitance of the dielectric absorption. The compensation circuit further includes a first voltage dividing resistor provided between the output terminal of the operation circuit and a reference potential,
The RC series circuit is
A second voltage dividing resistor provided in series with the first voltage dividing resistor between the first voltage dividing resistor and the reference potential;
A compensation capacitor provided in series with the second voltage dividing resistor between the first voltage dividing resistor and the reference potential;
3. The signal generator according to claim 2, wherein a resistance ratio of the first voltage dividing resistor and the second voltage dividing resistor is equal to a ratio of an equivalent capacitance of the dielectric absorption and a capacitance of the operating capacitor. The compensation circuit further includes an amplifier circuit that amplifies and outputs a signal at a contact of the first voltage dividing resistor and the RC series circuit,
The signal generator according to claim 3, wherein the amplification circuit includes an amplification resistor connected to the contact and having a resistance value larger than that of the second voltage dividing resistor. The signal generator according to claim 3 or 4, wherein a resistance value of the second voltage dividing resistor is larger than a resistance value of the first voltage dividing resistor. The second voltage dividing resistor has a resistance value obtained by dividing the equivalent resistance value of the dielectric absorption by a predetermined coefficient larger than 1.
The first voltage dividing resistor has a resistance value obtained by dividing the product of the equivalent resistance value of the dielectric absorption and the equivalent capacitance value of the dielectric absorption by the product of the capacitance value of the operating capacitor and the coefficient,
The signal generator according to claim 5, wherein the compensation capacitor has a capacitance value obtained by multiplying the equivalent capacitance value of the dielectric absorption by the coefficient. The RC series circuit is
A compensation capacitor provided between the output terminal of the operating circuit and a reference potential;
A first voltage dividing resistor provided in series with the compensation capacitor between the output terminal of the operating circuit and the reference potential;
The compensation circuit includes:
A second voltage dividing resistor provided in series with the first voltage dividing resistor between the RC series circuit and the reference potential;
An addition / subtraction circuit for adding / subtracting the compensation signal at the contact of the RC series circuit and the second voltage dividing resistor and the operation signal;
The signal generator according to claim 2, wherein a resistance ratio of the first voltage dividing resistor and the second voltage dividing resistor is equal to a ratio of a capacitance of the operating capacitor and an equivalent capacitance of the dielectric absorption. The first voltage dividing resistor has a resistance value obtained by dividing the equivalent resistance value of the dielectric absorption by a predetermined coefficient larger than 1,
The second voltage dividing resistor has a resistance value obtained by dividing the product of the equivalent resistance value of the dielectric absorption and the equivalent capacitance value of the dielectric absorption by the product of the capacitance value of the operating capacitor and the coefficient,
The signal generator according to claim 7, wherein the compensation capacitor has a capacitance value obtained by multiplying the equivalent capacitance value of the dielectric absorption by the coefficient. The signal generator according to claim 1, wherein the operation circuit is an integration circuit. The signal generator according to claim 9, further comprising a current source that inputs a constant current signal to the integration circuit. A test apparatus for testing a device under test,
The signal generator according to any one of claims 1 to 10, which generates a signal according to an input signal and inputs the signal to the device under test.
A test apparatus comprising: a determination unit that determines pass / fail of the device under test based on an operation of the device under test. An operation signal is output by an operation circuit including an operation capacitor,
A compensation signal obtained by limiting a band of the operation signal by the RC series circuit by a compensation circuit including an RC series circuit having a time constant equal to a time constant of an equivalent circuit of dielectric absorption in the operation capacitor; A signal generation method that compensates for distortion caused by dielectric absorption of the operating capacitor, which occurs in the operating signal, by adding and subtracting the signal to output . A test method for testing a device under test,
An operation signal is output by an operation circuit including an operation capacitor,
A compensation signal obtained by limiting a band of the operation signal by the RC series circuit by a compensation circuit including an RC series circuit having a time constant equal to a time constant of an equivalent circuit of dielectric absorption in the operation capacitor; By adding and subtracting the signal and outputting it, the distortion caused by the dielectric absorption of the operating capacitor, which occurs in the operating signal, is compensated,
Input the distortion compensated signal to the device under test,
A test method for determining pass / fail of the device under test based on the operation of the device under test.

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