CN109522245B - Hardware management method and management device - Google Patents
Hardware management method and management device Download PDFInfo
- Publication number
- CN109522245B CN109522245B CN201811361263.XA CN201811361263A CN109522245B CN 109522245 B CN109522245 B CN 109522245B CN 201811361263 A CN201811361263 A CN 201811361263A CN 109522245 B CN109522245 B CN 109522245B
- Authority
- CN
- China
- Prior art keywords
- management module
- data corresponding
- processing request
- management
- root complex
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000007726 management method Methods 0.000 title abstract description 135
- 238000000034 method Methods 0.000 claims abstract description 65
- 230000008569 process Effects 0.000 claims abstract description 19
- 238000012545 processing Methods 0.000 claims description 49
- 238000010586 diagram Methods 0.000 description 12
- 230000006870 function Effects 0.000 description 12
- 238000013461 design Methods 0.000 description 4
- 238000004891 communication Methods 0.000 description 3
- 238000004590 computer program Methods 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 238000004088 simulation Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/102—Program control for peripheral devices where the programme performs an interfacing function, e.g. device driver
Abstract
The embodiment of the application discloses a hardware management method and a management device, which are used for dynamically managing an external PCIe switch card through the management device according to the data volume transmitted by upper-layer application, configuring a proper system NTB bandwidth in real time and improving the overall expandability of a system. The method in the embodiment of the application comprises the following steps: acquiring the data volume transmitted between the first root complex and the second root complex; if the data volume is lower than a preset threshold value, the processor processes data corresponding to the first management module and the second management module; and if the data volume is higher than the preset threshold value, interrupting the data corresponding to the first management module and the second management module by the processor.
Description
Technical Field
The present application relates to the field of system design, and in particular, to a method and a device for hardware management.
Background
With the development of high-speed serial point-to-point dual channel high-bandwidth transport (PCIe) technology, a Non-Transparent Bridge (NTB) is increasingly applied to a multi-control storage or server system as a high-speed bus interconnect.
Currently, the mainstream application is generally the interconnection between special NTB ports of a multi-control Root Complex (RC) or the interconnection between NTB ports of a multi-control board PCIe expansion chip (switch, SW).
In practical application, the two methods cannot dynamically adjust the bandwidth of the NTB, cannot perform cost control in single-control application, and cannot dynamically match upper-layer applications with different pressures, thereby affecting the overall scalability of the system.
Disclosure of Invention
The embodiment of the application provides a hardware management method and a management device, which are used for dynamically managing an external PCIe switch card through the management device according to the data volume transmitted by upper-layer application, configuring an appropriate system NTB bandwidth in real time and improving the overall expandability of a system.
In order to achieve the above purpose, the embodiments of the present application provide the following technical solutions:
a first aspect of the present application provides a method for hardware management, where the method may be applied to an NTB hardware management process, and a management device involved in an execution process of the method for hardware management corresponds to a corresponding functional entity in the NTB hardware management process. The method can comprise the following steps: acquiring the data volume transmitted between the first complex and the second complex; if the data volume is lower than a preset threshold value, the processor processes the data corresponding to the first management module and the second management module; if the data volume is higher than the preset threshold value, the processor interrupts the data corresponding to the first management module and the second management module.
Optionally, in some application embodiments of the present application, the processing data corresponding to the first management module and the second management module by the processor may include: the processor receives a first processing request sent by the first management module; the processor receives a second processing request sent by the second management module; and the processor processes the data corresponding to the first management module and the second management module according to the first processing request and the second processing request.
Optionally, in some application embodiments of the present application, the interrupting, by the processor, data corresponding to the first management module and the second management module includes: the processor receives a first processing request sent by the first management module; the processor receives a second processing request sent by the second management module; and the processor interrupts the data corresponding to the first management module and the second management module according to the first processing request and the second processing request.
Optionally, in some application embodiments of the present application, the data corresponding to the first management module includes first data sent by the first root complex to the second root complex; the data corresponding to the second management module includes second data sent by the second root complex to the first root complex.
Optionally, in some application embodiments of the present application, the receiving, by the processor, the first processing request sent by the first management module includes: the processor receives a first processing request sent by the first management module in a wireless mode or a wired mode.
A second aspect of the present application provides a management device having functionality to implement the method of the first aspect or any one of the possible implementations of the first aspect. The function can be realized by hardware, and can also be realized by executing corresponding software by hardware. The hardware or software includes one or more modules corresponding to the functions described above.
In a third aspect, an embodiment of the present application provides a management apparatus, where the management apparatus may include an entity such as a terminal device or a chip, and the management apparatus includes: an input/output (I/O) interface, a processor, and a memory; the memory is to store instructions; the processor is configured to execute the instructions in the memory to cause the management device to perform the method of any of the preceding first aspects.
In a fourth aspect, embodiments of the present application provide a computer-readable storage medium, which includes instructions that, when executed on a computer, cause the computer to perform the method as described in the first aspect and any one of the optional implementations.
The computer storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
In a fifth aspect, embodiments of the present application provide a computer program product, which when run on a computer, causes the computer to perform the method as described in the first aspect and any one of the alternative implementations.
In a sixth aspect, the present application provides a chip system comprising a processor for enabling a management apparatus to implement the functions referred to in the above aspects, e.g. to transmit or process data and/or information referred to in the above methods. In one possible design, the system-on-chip further includes a memory for storing program instructions and data necessary for the management device. The chip system may be a management device, or may be a system chip that is applied to the management device to execute a corresponding function.
According to the technical scheme, the embodiment of the application has the following advantages:
the method comprises the steps of acquiring the data volume transmitted between a first root complex and a second root complex; dynamically managing an external PCIe switch card, and configuring a proper system NTB bandwidth in real time; if the data volume is lower than a preset threshold value, the processor processes data corresponding to the first management module and the second management module; and if the data volume is higher than the preset threshold value, the processor interrupts the data corresponding to the first management module and the second management module, and the real-time configuration method improves the overall expandability of the system.
Drawings
FIG. 1 is a schematic diagram of NTB application architecture in the prior art;
FIG. 2 is a diagram illustrating a method for hardware management according to an embodiment of the present disclosure;
FIG. 3 is a diagram illustrating another method for hardware management according to an embodiment of the present disclosure;
fig. 4 is an application scenario diagram of a method for hardware management according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of a management device according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of another management device according to an embodiment of the present application.
Detailed Description
Embodiments of the present application will now be described with reference to the accompanying drawings, and it is to be understood that the described embodiments are merely illustrative of some, but not all, embodiments of the present application. As can be known to those skilled in the art, with the development of technology and the emergence of new scenarios, the technical solution provided in the embodiments of the present application is also applicable to similar technical problems.
The embodiment of the application provides a hardware management method and a management device, which are used for dynamically managing an external PCIe switch card through the management device according to the data volume transmitted by upper-layer application, configuring an appropriate system NTB bandwidth in real time and improving the overall expandability of a system.
With the development of PCIe technology, NTB is increasingly applied to a multi-control storage or server system as a high-speed bus interconnect. Currently, the mainstream application is generally interconnection between specific NTB ports of a multi-control RC or interconnection between NTB ports of a multi-control on-board PCIe switch, as shown in fig. 1, which is a schematic diagram of an NTB application architecture in the prior art.
By the method, the bandwidth of the NTB cannot be dynamically adjusted, cost control cannot be performed in single control application, upper-layer applications with different pressures cannot be dynamically matched, and the overall expandability of the system is influenced.
In order to solve the problem, for convenience of understanding, a specific flow in the present embodiment is described below, and as shown in fig. 2, the method is a schematic diagram of a hardware management method provided in the present embodiment, and the method includes, but is not limited to, the following steps:
201. acquiring the data volume transmitted between the first complex and the second complex;
in this embodiment, the data volume transmitted between the first complex and the second complex may be generated by an upload application, and may be referred to as an upper layer application pressure, and it is understood that the data volume may be a directly measured value or a converted relative value, and the specific situation is determined by an actual scenario, and is not limited herein.
202. If the data quantity is lower than a preset threshold value;
in this embodiment, the preset threshold may be input by a technician, or may be automatically generated according to a hardware operating state, where a specific situation is determined by an actual scenario and is not limited herein.
203. Processing data corresponding to the first management module and the second management module;
in this embodiment, processing the data corresponding to the first management module and the second management module may be understood as a simulated hot plug operation, that is, simulating to plug in a new PCIe switch of the expansion chip without turning off the system or cutting off the power supply, so as to achieve the purpose of expanding the bandwidth.
204. If the data volume is higher than the preset threshold value;
in this embodiment, the preset threshold may be input by a technician, or may be automatically generated according to a hardware operating state, where a specific situation is determined by an actual scenario and is not limited herein.
205. And interrupting the data corresponding to the first management module and the second management module.
In this embodiment, interrupting the data corresponding to the first management module and the second management module may be understood as simulating a hot-plug operation, that is, simulating to plug the PCIe switch of the expansion chip without turning off the system or cutting off the power supply, so as to achieve the purpose of reducing the bandwidth and saving the cost.
The method comprises the steps of acquiring the data volume transmitted between a first root complex and a second root complex; dynamically managing an external PCIe switch card, and configuring a proper system NTB bandwidth in real time; if the data volume is lower than a preset threshold value, the processor processes data corresponding to the first management module and the second management module; and if the data volume is higher than the preset threshold value, the processor interrupts the data corresponding to the first management module and the second management module, and the real-time configuration method improves the overall expandability of the system.
In some embodiments of the present application, the first management module and the second management module may perform signal transmission by way of wireless connection, and this scenario is described below.
The method proposed in this embodiment is used to illustrate this scenario, and for convenience of understanding, a specific flow in this embodiment is described below, as shown in fig. 3, which is a schematic diagram of another hardware management method provided in this embodiment of the present application, and the method includes, but is not limited to, the following steps:
301. acquiring the data volume transmitted between the first complex and the second complex;
302. if the data volume is lower than a preset threshold value;
in this embodiment, the steps 301-302 are similar to the steps 201-202 of the above embodiment, and are not described herein again.
303. The first management module sends a connection request to the second management module;
in this embodiment, the first management module may send the connection request to the second management module through a wireless fidelity (wifi) signal or a Near Field Communication (NFC), and the specific situation is determined by an actual scene and is not limited herein.
304. Processing data corresponding to the first management module and the second management module;
305. if the data volume is higher than the preset threshold value;
in this embodiment, the steps 304-305 are similar to the steps 203-204 of the above embodiment, and are not described herein again.
306. The first management module sends an interrupt request to the second management module;
in this embodiment, the first management module may send the connection request to the second management module through a wifi signal or an NFC signal, and the specific situation is determined by an actual scenario and is not limited herein.
307. And interrupting the data corresponding to the first management module and the second management module.
In this embodiment, step 307 is similar to step 205 of the above embodiment, and is not described herein again.
In a possible design, the foregoing embodiment may be applied to the architecture shown in fig. 4, and fig. 4 is an application scenario diagram of a method for hardware management provided in this embodiment of the present application.
The functions of the hardware management method can correspond to the first hardware management module, the second hardware management module, the indication module, the serial port module and the wireless module.
Specifically, the first hardware management module and the second hardware management module: the circuit board is mainly applied to programmable logic chips such as CPLD and FPGA. The module collects hot plug signals of a high-speed serial point-to-point double-channel high-bandwidth transmission (PCIe) root complex end and an expansion chip end (PCIe switch end) together for unified management. And performing simulated hot plug operation on the rear-end PCIe switch card according to different application pressures transmitted by the upper-layer system, and dynamically configuring the overall NTB bandwidth of the system. When the upper application pressure is increased, the simulation hot-plug operation is carried out on the rear-end PCIe switch card through the NTB hardware management module among the multiple wirelessly interconnected controls, so that the integral NTB bandwidth of the system is improved; when the upper application pressure is reduced, the simulation hot-plug operation is carried out on the rear-end PCIe switch card through the NTB hardware management module among the multiple wirelessly interconnected controls, and the integral NTB bandwidth of the system is reduced. All NTB bandwidth of the system comes from a pluggable PCIe switch card, so that cost control can be conveniently carried out in single control application. The external PCIe switch card is dynamically managed through the NTB hardware management module according to the upper application pressure, and the overall expandability of the system is improved.
An indication module: the module is positioned on the board card and is directly controlled by the NTB hardware management module. The module externally indicates the NTB link condition of the current system.
A wireless module: the serial port signal can be converted into wireless signals such as wifi, information interconnection of NTB hardware management modules among multiple controllers is carried out, and real-time interaction of information such as upper-layer application pressure among the controllers can be carried out.
A serial port module: the NTB hardware management module can communicate with the outside and other NTB hardware management modules of controllers in the system through the serial port module.
Through the functions of the modules, the hardware management method can be applied to achieve similar technical effects, and details are not repeated here.
The embodiment of the present application may also be applied to a management device according to the above method, and the management device is divided into functional modules, for example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one processing module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. It should be noted that, in the embodiment of the present application, the division of the module is schematic, and is only one logic function division, and there may be another division manner in actual implementation.
For example, when each functional unit is divided in an integrated manner, as shown in fig. 5, the functional unit is a schematic structural diagram of a management device provided in the embodiment of the present application.
As shown in fig. 5, a management apparatus 500 provided in an embodiment of the present application includes an obtaining unit 501 and an operating unit 502.
An obtaining unit 501, configured to obtain a data amount transmitted between the first root complex and the second root complex;
an operation unit 502, configured to process data corresponding to the first management module and the second management module when the data amount is lower than a preset threshold;
the operation unit 502 is further configured to interrupt processing of data corresponding to the first management module and the second management module by the processor when the data amount is higher than the preset threshold.
Optionally, the operation unit 502 is specifically configured to receive a first processing request sent by the first management module; the operation unit 502 is specifically configured to receive a second processing request sent by the second management module; the operation unit 502 is specifically configured to process data corresponding to the first management module and the second management module according to the first processing request and the second processing request.
Optionally, the operation unit 502 is specifically configured to receive a first processing request sent by the first management module; the operation unit 502 is specifically configured to receive a second processing request sent by the second management module; the operation unit 502 is specifically configured to interrupt data corresponding to the first management module and the second management module according to the first processing request and the second processing request.
Optionally, the data corresponding to the first management module includes first data sent by the first root complex to the second root complex; the data corresponding to the second management module includes second data sent by the second root complex to the first root complex.
Optionally, the operation unit 502 is specifically configured to receive, in a wireless manner or a wired manner, the first processing request sent by the first management module.
All relevant contents of each step related to the above method embodiment may be referred to the functional description of the corresponding functional unit, and are not described herein again.
In the present embodiment, the management apparatus 500 may be presented in a form of dividing each functional module in an integrated manner. A "module" herein may refer to an application-specific integrated circuit (ASIC), a processor and memory that execute one or more software or firmware programs, an integrated logic circuit, and/or other devices that may provide the described functionality. In a simple embodiment, one skilled in the art will appreciate that the management device 500 may take the form shown in FIG. 6.
As shown in fig. 6, which is a schematic structural diagram of another management apparatus provided in the embodiment of the present application, the management apparatus 600 includes: an input/output (I/O) interface 601, a processor 602, a memory 603. Specifically, the processor 602 in fig. 6 may cause the management apparatus 600 to execute the method for implementing hardware management in the above method embodiment by calling a computer stored in the memory 603 to execute instructions.
Specifically, the functions/implementation procedures of the obtaining unit 501 and the operating unit 502 in fig. 5 can be implemented by the processor 602 in fig. 6 calling a computer executing instruction stored in the memory 603. Alternatively, the functions/implementation processes of the acquisition unit 501 and the operation unit 502 in fig. 5 may be implemented by an input/output (I/O) interface 601 in fig. 6.
Since the management device 600 provided in the embodiment of the present application can be used for executing a method for hardware management, the technical effects obtained by the embodiment of the present application can refer to the above method embodiment, and are not described herein again.
Optionally, an embodiment of the present application provides a chip system, where the chip system includes a processor, and is used to support a management apparatus to implement the method for managing hardware. In one possible design, the system-on-chip further includes a memory. The memory is used for storing program instructions and data necessary for the management device. The chip system may be formed by a chip, and may also include a chip and other discrete devices, which is not specifically limited in this embodiment of the present application.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product.
The computer program product includes one or more computer instructions. When loaded and executed on a computer, cause the processes or functions described in accordance with the embodiments of the application to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, from one website site, computer, server, or data center to another website site, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that a computer can store or a data storage device, such as a server, a data center, etc., that is integrated with one or more available media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk (SSD)), among others.
The terms "first," "second," and the like in the description and in the claims of the present application and in the above-described drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that the embodiments described herein may be practiced otherwise than as specifically illustrated or described herein. Moreover, the terms "comprises," "comprising," and any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or modules is not necessarily limited to those steps or modules explicitly listed, but may include other steps or modules not expressly listed or inherent to such process, method, article, or apparatus. The naming or numbering of the steps appearing in the present application does not mean that the steps in the method flow have to be executed in the chronological/logical order indicated by the naming or numbering, and the named or numbered process steps may be executed in a modified order depending on the technical purpose to be achieved, as long as the same or similar technical effects are achieved. The division of the modules presented in this application is a logical division, and in practical applications, there may be another division, for example, multiple modules may be combined or integrated into another system, or some features may be omitted, or not executed, and in addition, the shown or discussed coupling or direct coupling or communication connection between each other may be through some interfaces, and the indirect coupling or communication connection between the modules may be in an electrical or other similar form, which is not limited in this application. The modules or sub-modules described as separate components may or may not be physically separated, may or may not be physical modules, or may be distributed in a plurality of circuit modules, and some or all of the modules may be selected according to actual needs to achieve the purpose of the present disclosure.
Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by associated hardware instructed by a program, which may be stored in a computer-readable storage medium, and the storage medium may include: ROM, RAM, magnetic or optical disks, and the like.
The method, the management device and the system for hardware management provided by the embodiment of the present application are described in detail above, a specific example is applied in the present application to explain the principle and the implementation of the present application, and the description of the above embodiment is only used to help understand the method and the core idea of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. A method for hardware management is applied to a data processing device, and the data processing device comprises a processor, a first management module, a second management module, a first root complex and a second root complex, wherein the first management module and the second management module uniformly manage hot plug signals of a PCIe root complex end and a PCIe switch end, and dynamically configure the bandwidth of a non-transparent bridge of the whole system; the processor includes a first chip and a second chip, the method comprising:
acquiring the data volume transmitted between the first root complex and the second root complex;
if the data volume is lower than a preset threshold value, the processor processes data corresponding to the first management module and the second management module; processing the data corresponding to the first management module and the second management module to simulate hot plug operation; the hot plug operation is: inserting a new PCIe switch of the expansion chip under the condition of not shutting down the system and not cutting off the power supply;
if the data volume is higher than the preset threshold value, the processor interrupts the data corresponding to the first management module and the second management module; the interruption of the data corresponding to the first management module and the second management module is simulated hot plug operation; the hot-drawing operation is as follows: the PCIe switch of the expansion chip is pulled out under the conditions of not shutting down the system and not cutting off the power supply.
2. The method of claim 1, wherein the processor processes data corresponding to the first management module and the second management module, comprising:
the processor receives a first processing request sent by the first management module;
the processor receives a second processing request sent by the second management module;
and the processor processes the data corresponding to the first management module and the second management module according to the first processing request and the second processing request.
3. The method of claim 1, wherein the processor interrupting data corresponding to the first management module and the second management module comprises:
the processor receives a first processing request sent by the first management module;
the processor receives a second processing request sent by the second management module;
and the processor interrupts the data corresponding to the first management module and the second management module according to the first processing request and the second processing request.
4. The method according to any one of claims 2 or 3,
the data corresponding to the first management module comprises first data sent by the first root complex to the second root complex;
the data corresponding to the second management module includes second data sent by the second root complex to the first root complex.
5. The method according to any one of claims 2 or 3, wherein the receiving, by the processor, the first processing request sent by the first management module comprises:
and the processor receives a first processing request sent by the first management module in a wireless mode or a wired mode.
6. A management apparatus, characterized in that the management apparatus comprises:
an obtaining unit, configured to obtain a data amount transmitted between a first root complex and a second root complex;
the operation unit is used for processing the data corresponding to the first management module and the second management module when the data volume is lower than a preset threshold value; processing the data corresponding to the first management module and the second management module to simulate hot plug operation; the hot plug operation is: inserting a new PCIe switch of the expansion chip under the condition of not shutting down the system and not cutting off the power supply; the first management module and the second management module manage hot plug signals of a PCIe root complex end and a PCIe switch end in a unified mode and dynamically configure the bandwidth of a non-transparent bridge of the whole system;
the operation unit is further configured to interrupt data corresponding to the first management module and the second management module when the data volume is higher than the preset threshold; the interruption of the data corresponding to the first management module and the second management module is simulated hot plug operation; the hot-drawing operation is as follows: the PCIe switch of the expansion chip is pulled out under the conditions of not shutting down the system and not cutting off the power supply.
7. The management device according to claim 6,
the operation unit is specifically configured to receive a first processing request sent by the first management module;
the operation unit is specifically configured to receive a second processing request sent by the second management module;
the operation unit is specifically configured to process data corresponding to the first management module and the second management module according to the first processing request and the second processing request.
8. The management device according to claim 6,
the operation unit is specifically configured to receive a first processing request sent by the first management module;
the operation unit is specifically configured to receive a second processing request sent by the second management module;
the operation unit is specifically configured to interrupt data corresponding to the first management module and the second management module according to the first processing request and the second processing request.
9. The management apparatus according to any one of claims 7 or 8,
the data corresponding to the first management module comprises first data sent by the first root complex to the second root complex;
the data corresponding to the second management module includes second data sent by the second root complex to the first root complex.
10. The management apparatus according to any one of claims 7 or 8,
the operation unit is specifically configured to receive, in a wireless manner or a wired manner, the first processing request sent by the first management module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811361263.XA CN109522245B (en) | 2018-11-15 | 2018-11-15 | Hardware management method and management device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811361263.XA CN109522245B (en) | 2018-11-15 | 2018-11-15 | Hardware management method and management device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109522245A CN109522245A (en) | 2019-03-26 |
| CN109522245B true CN109522245B (en) | 2021-10-29 |
Family
ID=65777951
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811361263.XA Active CN109522245B (en) | 2018-11-15 | 2018-11-15 | Hardware management method and management device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109522245B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110209606B (en) * | 2019-04-30 | 2021-01-22 | 杭州电子科技大学 | Control method of PCIe-based multi-interface storage device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105721357A (en) * | 2016-01-13 | 2016-06-29 | 华为技术有限公司 | Exchange device, and peripheral component interconnection express (PCIe) system and initialization method thereof |
| CN108363670A (en) * | 2017-01-26 | 2018-08-03 | 华为技术有限公司 | A kind of method, apparatus of data transmission, equipment and system |
| CN108733614A (en) * | 2017-04-13 | 2018-11-02 | 北京京东尚科信息技术有限公司 | Data transmission system, method and apparatus |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140310549A1 (en) * | 2013-04-11 | 2014-10-16 | Apple Inc. | FIFO Clock and Power Management |
-
2018
- 2018-11-15 CN CN201811361263.XA patent/CN109522245B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105721357A (en) * | 2016-01-13 | 2016-06-29 | 华为技术有限公司 | Exchange device, and peripheral component interconnection express (PCIe) system and initialization method thereof |
| CN108363670A (en) * | 2017-01-26 | 2018-08-03 | 华为技术有限公司 | A kind of method, apparatus of data transmission, equipment and system |
| CN108733614A (en) * | 2017-04-13 | 2018-11-02 | 北京京东尚科信息技术有限公司 | Data transmission system, method and apparatus |
Non-Patent Citations (1)
| Title |
|---|
| 基于PCIe总线的双路1394B接口模块设计与实现;范祥辉等;《计算机测量与控制》;20160825(第08期);全文 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109522245A (en) | 2019-03-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109766302B (en) | Method and device for managing equipment | |
| CN103616937B (en) | A kind of mainboard, PCIE network interface card and server system | |
| US9026687B1 (en) | Host based enumeration and configuration for computer expansion bus controllers | |
| WO2018040016A1 (en) | Protocol converter and protocol conversion method | |
| CN105446657B (en) | A kind of method for monitoring RAID card | |
| CN110209399B (en) | FPGA service system, data processing method and storage medium | |
| KR20070003954A (en) | Simulation circuit of pci express endpoint and downstream port for a pci express switch | |
| US9904644B2 (en) | Systems and methods of using an SPI controller | |
| JP2021530813A (en) | Integrated address space for multiple hardware accelerators with dedicated low latency links | |
| CN104348673A (en) | Debugging and testing method, main control board and business boards | |
| CN110968352B (en) | Reset system and server system of PCIE equipment | |
| US9116881B2 (en) | Routing switch apparatus, network switch system, and routing switching method | |
| CN113986796A (en) | PCIe link width dynamic configuration method, device, equipment and readable medium | |
| CN109522245B (en) | Hardware management method and management device | |
| US10169281B2 (en) | Switch system and operation method thereof | |
| CN116032746A (en) | Information processing method and device of resource pool, storage medium and electronic device | |
| CN108228517A (en) | I3C circuit arrangements, system and communication means | |
| CN109460379A (en) | A kind of method and switching device of serial ports selection | |
| US11029882B2 (en) | Secure multiple server access to a non-volatile storage device | |
| CN112783071A (en) | SDIO controller, FPGA board card and SDIO test system | |
| US9336174B1 (en) | Dynamic interface model | |
| CN110955629B (en) | Computing device | |
| CN115983192B (en) | Verification system and method for configuring peripheral sub-card resources of verification system | |
| CN211087224U (en) | Mainboard and computer equipment | |
| JP2023058036A (en) | Measurement device and communication method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |