CN109509835A - The method for manufacturing phase-change memory - Google Patents

The method for manufacturing phase-change memory Download PDF

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Publication number
CN109509835A
CN109509835A CN201811516556.0A CN201811516556A CN109509835A CN 109509835 A CN109509835 A CN 109509835A CN 201811516556 A CN201811516556 A CN 201811516556A CN 109509835 A CN109509835 A CN 109509835A
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China
Prior art keywords
hole
layer
dielectric layer
change memory
protective layer
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CN201811516556.0A
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Chinese (zh)
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CN109509835B (en
Inventor
杨子澔
张明丰
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Beijing Times Full Core Storage Technology Co ltd
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Jiangsu Advanced Memory Technology Co Ltd
Jiangsu Advanced Memory Semiconductor Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20Multistable switching devices, e.g. memristors

Abstract

A method of manufacture phase-change memory includes: forming a structure, include: hearth electrode;Dielectric layer is located above hearth electrode;Separation layer is located at dielectric layer, and there is opening to run through separation layer;And polysilicon layer, it is located in opening;It forms the first hole and the second hole extends through polysilicon layer and dielectric layer, the second hole is located at the lower section of the first hole;Protective layer is formed in the first hole and the second hole and above polysilicon layer;CMP step is carried out, or carries out dry ecthing procedure and CMP step, to remove a part, separation layer and the polysilicon layer of protective layer, and exposed dielectric layer, and leaves the protective layer in the second hole;The protective layer in the second hole is removed, with the second hole of exposure;And in deposition hot material to the second hole.The method can avoid danger caused by using tetramethyl ammonium hydroxide solution, and can avoid the hole damage in dielectric layer, and hole is made to have good dimensional stability.

Description

The method for manufacturing phase-change memory
Technical field
This announcement relates to a kind of method for manufacturing phase-change memory.
Background technique
Electronic product (such as: mobile phone, tablet computer and digital camera) often with the memory cell for having storage data.It practises Know that memory cell can pass through the storage node storage information on memory cell.Wherein, phase-change memory utilizes memory body The resistance states (such as high value and low resistance) of element store information.Memory cell can have one can be in different phase The material converted between (such as: crystal phase and amorphous phase).Different phase makes resistance of the memory cell with different resistance values State, for indicating the different numerical value of storage data.
The processing procedure of currently manufactured phase-change memory cell includes typical lockhole transfer method (keyhole transfer method).Specifically, the method penetrates and is initially formed the polysilicon layer with engagement mechanism (or can claim gap) on dielectric layer Then engagement mechanism is transferred to downwards dielectric layer through etching by side, the small sized hole of shape, is moved again later in dielectric layer Except remaining polysilicon layer.
However in the step of removing remaining polysilicon layer, usually using to polysilicon layer and arround material have it is high The solution for selecting ratio carries out wet such as tetramethyl ammonium hydroxide (tetramethylammonium hydroxide (TMAH)) solution Etching to avoid damage hole, and then causes bore hole size to change, influences the performance of phase-change memory.But tetramethylphosphonihydroxide hydroxide Base ammonium salt solution has severe toxicity, and lethal is high, causes great danger to operator.
Summary of the invention
This announcement is designed to provide a kind of method for manufacturing phase-change memory, removes polycrystalline with other fabrication steps Silicon layer removes polysilicon layer without the use of tetramethyl ammonium hydroxide solution.The method is in addition to that can avoid using tetramethylphosphonihydroxide hydroxide It except danger caused by base ammonium salt solution, and can be damaged to avoid the hole in dielectric layer, make hole that there is good dimensionally stable Property.
This announcement provides a kind of method for manufacturing phase-change memory, includes: forming a structure, this structure includes: bottom electricity Pole;Dielectric layer is located above hearth electrode;Separation layer is located at dielectric layer, and there is opening to run through separation layer;And polycrystalline Silicon layer is located in opening;It forms the first hole and the second hole extends through polysilicon layer and dielectric layer, the second hole is located at the The lower section of one hole;Protective layer is formed in the first hole and the second hole and above polysilicon layer;Carry out chemical mechanical grinding Processing procedure, or dry ecthing procedure and CMP step are carried out, to remove a part, separation layer and the polysilicon of protective layer Layer, and exposed dielectric layer, and leave the protective layer in the second hole;The protective layer in the second hole is removed, with exposure second Hole;And in deposition hot material to the second hole.
According to several embodiments of this announcement, there is the polysilicon layer of structure a gap to be located in opening.
According to several embodiments of this announcement, the step of carrying out dry ecthing procedure and CMP step, includes: right Protective layer carries out dry ecthing procedure, to expose separation layer and polysilicon layer;And CMP step is carried out, it is sudden and violent to remove The separation layer of dew, the polysilicon layer of exposure and the protective layer in the first hole, and exposed dielectric layer, and leave second Protective layer in hole.
According to several embodiments of this announcement, the upper surface of the polysilicon layer of the upper surface and exposure of exposed separation layer is total Plane is generally coplanar.
According to several embodiments of this announcement, the upper surface of exposed polysilicon layer and the protective layer being located in the first hole Upper surface it is coplanar or generally coplanar.
According to several embodiments of this announcement, the step of carrying out CMP step is Jin Shiyong to chemical machinery Grind the lapping liquid of separation layer.
According to several embodiments of this announcement, the step of removing the protective layer in the second hole is using dry ecthing, wet corrosion Carve or combinations thereof.
According to several embodiments of this announcement, the step of deposition hot material also includes on deposition hot material to dielectric layer Side.
According to several embodiments of this announcement, method also includes: after in the deposition hot material the step of, carrying out anotherization Mechanical polishing process is learned, to remove the heating material for being located at dielectric layer, and exposed dielectric layer, to form heater Jie Yu In electric layer, wherein the top surface of heater is flushed with the top surface of dielectric layer.
According to several embodiments of this announcement, method also includes: forming top electrode and phase change element above heater.
Detailed description of the invention
For above and other purpose, feature, advantage and the embodiment of this announcement can be clearer and more comprehensible, appended attached drawing is said It is bright as follows:
Fig. 1 to Figure 10, which is painted, discloses a kind of method of manufacture phase-change memory of several embodiments in each manufacture according to this The diagrammatic cross-section in stage.
Specific embodiment
The a variety of different embodiments or example of presented below announcement, the different technologies to realize provided target are special Sign.It the element of following specific examples and is designed to simplify this announcement.Certainly, these are merely illustrative, rather than originally take off to limit Show.For example, it is disclosed in specification and forms fisrt feature structure in the top of second feature structure comprising fisrt feature knot The embodiment that structure is directly contacted with the formation of second feature structure, is encompassed by between fisrt feature structure and second feature structure Separately there is the embodiment of other feature structures, also that is, fisrt feature structure and second feature structure and non-direct contact.In addition, this Duplicate reference symbol may be used and/or use word by being disclosed in each example.These replicators are for simplification with word With clearly purpose, the relationship being not limited between each embodiment and/or the structure.
In addition, space relative terms, such as "lower", "upper", it is to facilitate one elements or features of description and other elements Or the relativeness of feature in the accompanying drawings.These space relative terms are intended to comprising filling other than orientation shown in the drawings Set different direction in use or operation.In addition device can be positioned (such as be rotated by 90 ° or other orientation), and this paper institute The opposite narration in the space used also can be explained correspondingly.
This announcement is designed to provide a kind of method for manufacturing phase-change memory, removes polycrystalline with other fabrication steps Silicon layer removes polysilicon layer without the use of tetramethyl ammonium hydroxide solution.The method is in addition to that can avoid using tetramethylphosphonihydroxide hydroxide It except danger caused by base ammonium salt solution, and can be damaged to avoid the hole in dielectric layer, make hole that there is good dimensionally stable Property.The embodiment of the method for manufacture phase-change memory described below.
Fig. 1 to Figure 10, which is painted, discloses a kind of method of manufacture phase-change memory of several embodiments in each manufacture according to this The diagrammatic cross-section in stage.As shown in Figure 1, obtaining a structure, this structure includes hearth electrode 110, dielectric layer 112, separation layer 114 And polysilicon layer 116.Dielectric layer 112 is located at 110 top of hearth electrode.Separation layer 114 is located at 112 top of dielectric layer, and is isolated There is layer 114 opening O1 to run through 114 separation layers.Polysilicon layer 116 is located in opening O1.
In some embodiments, as shown in Figure 1, structure also includes another dielectric layer 103 and lower connecting element 105.Dielectric Layer 103 can be single or multi-layer structure.In some embodiments, dielectric layer 103 by oxide, nitride, nitrogen oxides or its Combination is made, such as silica, silicon nitride, silicon oxynitride or combinations thereof.In some embodiments, dielectric layer 103 has opening Through dielectric layer 103, and lower connecting element 105 and hearth electrode 110 are located in opening.
In some embodiments, lower connecting element 105 include metal, metallic compound or combinations thereof, such as titanium, tantalum, tungsten, Aluminium, copper, molybdenum, platinum, titanium nitride, tantalum nitride, tantalum carbide, tantalum nitride silicon, tungsten nitride, molybdenum nitride, nitrogen oxidation molybdenum, ruthenium-oxide, titanium aluminium, TiAlN, carbon tantalum nitride, other suitable materials or combinations thereof.In some embodiments, hearth electrode 110 is through lower connection member Part 105 couples active member (not being painted).In several embodiments, hearth electrode 110 includes tungsten, titanium, titanium nitride, tantalum nitride, nitrogen Change aluminium titanium, aluminium nitride tantalum, or combinations thereof.
In some embodiments, as shown in Figure 1, being initially formed dielectric layer 103, lower connecting element 105 and hearth electrode 110, so Dielectric layer 112 is formed above hearth electrode 110 and dielectric layer 103 afterwards.In some embodiments, dielectric layer 112 include oxide, Nitride, nitrogen oxides or combinations thereof, such as silica, silicon nitride, silicon oxynitride or combinations thereof.In some embodiments, it is situated between Electric layer 112 is made of silicon nitride, but not limited to this, it can be also made of other dielectric materials, such as silica.In some embodiments In, dielectric layer 112 is formed using thin film deposition process.In some embodiments, the thickness of dielectric layer 112 between 500 nanometers extremely 1500 nanometers.
In some embodiments, after forming dielectric layer 112, in 112 disposed thereon isolated material of dielectric layer.Some In embodiment, isolated material includes oxide, nitride, nitrogen oxides or combinations thereof, such as silica, silicon nitride, nitrogen oxidation Silicon or combinations thereof.In some embodiments, isolated material includes silica, but not limited to this.Then, isolated material is carried out micro- Image etching procedure, to form the separation layer 114 with opening O1, as shown in Figure 1.In some embodiments, be open the width of O1 More than or equal to the width of hearth electrode 110.In some embodiments, the ratio of the thickness of the thickness of separation layer 114 and dielectric layer 112 Value is between 1.3 to 2.
In some embodiments, as shown in Figure 1, being then conformally formed polysilicon layer 116 in opening O1.In some realities It applies in example, forms polysilicon layer 116 through chemical vapor deposition.Also atomic layer deposition, physical deposition, low pressure chemical gas be can pass through Mutually deposition or high density plasma enhanced chemical vapor deposition form polysilicon layer 116.In some embodiments, polysilicon layer 116 has Gap V1 (also referred to as engagement mechanism) is located in opening O1.It is subsequent this engagement mechanism to be transferred to downwards dielectric layer 112.
Later, as shown in Figure 1 to Figure 2, it forms hole and runs through polysilicon layer 116 and dielectric layer 112, expose hearth electrode 110 Upper surface.Specifically, as shown in Fig. 2, formed the first hole H1 and the second hole H2 extend through polysilicon layer 116 and its The dielectric layer 112 of lower section.Second hole H2 is located at the lower section of the first hole H1.In some embodiments, through etch process shape Polysilicon layer 116 and dielectric layer 112 are extended through at the first hole H1 and the second hole H2, etch process loses comprising reactive ion Quarter, high-density electric slurry etching or combinations thereof.
In some embodiments, as shown in Fig. 2, the maximum width of the first hole H1 is wide greater than the maximum of the second hole H2 Degree.In some embodiments, the width of the first hole H1 is less than the width of polysilicon layer 116.In some embodiments, the first hole There is hole H1 width region H11 and narrow region H12, narrow region H12 to be located at the lower section of width region H11, and connect the second hole H2. In some embodiments, wide region H11 is funnel-shaped, and narrow region H12 and the second hole H2 are in the form of a column.In some embodiments, Wide region H11 has a rotational angle theta, and rotational angle theta is greater than 89 degree.In some embodiments, the width of the second hole H2 is between 10 nanometers To 30 nanometers.
As shown in Figure 2 to Figure 3, protective layer 118 is formed in the first hole H1 and the second hole H2 and on polysilicon layer 116 Side.In some embodiments, protective layer 118 includes inorganic material, organic material or combinations thereof.Such as it can pass through chemical vapor deposition Long-pending or other suitable deposition manufacture process form protective layer 118 containing inorganic materials.Inorganic material may include silicon carbide, silicic acid Kwong-Wan, siloxanes, spin on glass (Spin-On Glass) or combinations thereof.Such as it can pass through rotary coating or other are suitable Coating process forms protective layer 118 containing organic material.Organic material may include photoresist.
As shown in Figure 3 to Figure 4, dry ecthing procedure or CMP step are carried out to protective layer 118, with exposure isolation Layer 114 and polysilicon layer 116.In some embodiments, the processing gas that this dry ecthing procedure uses includes argon gas, oxygen, three Fluoromethane, gas of carbon tetrafluoride or combinations thereof.In some embodiments, this CMP step is using to chemistry The lapping liquid of mechanical lapping protective layer 118.In some embodiments, the polycrystalline of the upper surface of exposed separation layer 114 and exposure The upper surface of silicon layer 116 is coplanar or generally coplanar.In some embodiments, the upper surface of exposed polysilicon layer 116 It is coplanar or generally coplanar with the upper surface for the protective layer 118 being located in the first hole H1.
As shown in Fig. 4 to Fig. 5, CMP step is carried out, to remove the separation layer 114 of exposure, the polycrystalline of exposure Silicon layer 116 and the protective layer 118 in the first hole H1, and exposed dielectric layer 112, and leave in the second hole H2 Protective layer 118.The protective layer 118 stayed in the second hole H2 can protect the second hole H2, and the size of the second hole H2 is avoided to change Become.In some embodiments, carrying out CMP step is using the grinding to chemical mechanical grinding separation layer 114 Liquid.In some embodiments, it carries out CMP step and this grinding to chemical mechanical grinding separation layer 114 is used only Liquid.This is because polysilicon layer 116 and protective layer 118 lose sustainable side wall in chemical mechanical grinding separation layer 114, Therefore polysilicon layer 116 and protective layer 118 outstanding can automatically strip in processing procedure.In this way, without additional use to The lapping liquid of chemical mechanical grinding polysilicon layer 116 and/or protective layer 118.
As shown in Figure 5 to Figure 6, the protective layer 118 in the second hole H2 is removed, with the second hole H2 of exposure and hearth electrode 110 upper surface.In some embodiments, the protective layer in the second hole H2 is removed using dry ecthing, wet etching or combinations thereof 118.In some embodiments, the protective layer 118 in the second hole H2 is removed using dry ecthing.In some embodiments, it removes The processing gas that the dry ecthing procedure of protective layer 118 in second hole H2 uses includes argon gas, oxygen, fluoroform, tetrafluoro Change carbon or combinations thereof.
As shown in Figure 6 to 7, in 120 ' to second hole H2 of deposition hot material.In some embodiments, heating material 120 ' also deposit to dielectric layer 112, as shown in Figure 7.In some embodiments, heavy through atomic layer deposition, physical vapor Product or combinations thereof forms heating material 120 '.In some embodiments, heating material 120 ' include titanium nitride, tantalum nitride, titanium or A combination thereof.The heating material layer of one layer or more can be formed.In some embodiments, three layers of heating material layer are formed, from bottom to top It is sequentially tantalum nitride, titanium nitride and tantalum nitride.
It is worth noting that, separation layer 114 has been removed as shown in Fig. 4 to Fig. 5, in this way, such as Fig. 6 to Fig. 7 institute Show, be fairly easy in 120 ' to second hole H2 of deposition hot material, because filling out depth (the i.e. dielectric layer 112 of hole processing procedure Thickness) it is small with the ratio of width (i.e. the width of the second hole H2).In some embodiments, the aspect ratio of the second hole H2 Between 2.5 to 3.5.If separation layer 114 as shown in Figure 4 is not removed, then 120 ' to second hole of subsequent deposition heating material Process difficulty in the H2 of hole is higher, because filling out depth (the i.e. thickness of separation layer 114 and the thickness of dielectric layer 112 of hole processing procedure Summation) it is too big with the ratio of width (i.e. the width of the second hole H2).
As shown in Fig. 7 to Fig. 8, another CMP step is carried out, to remove the heating for being located at 112 top of dielectric layer Material 120 ', and exposed dielectric layer 112, to form heater 120 in dielectric layer 112.The top surface and dielectric of heater 120 The top surface of layer 112 flushes.In some embodiments, CMP step described herein can Jin Shiyong removing plus The lapping liquid of hot material 120 ' (containing metal).
As shown in Fig. 8 to Fig. 9, phase-transition material 130 ' and top electrode material 130 ' are formed in the top of heater 120, with It is electrically connected with heater 120.In some embodiments, it is initially formed phase-transition material 130 ' and covers dielectric layer 112 blanket-like And form top electrode material 140 ' and cover phase-transition material 130 ' blanket-like, micro image etching procedure is carried out, then to be formed Phase change element 130 and top electrode 140, as shown in Fig. 9 to Figure 10.In some embodiments, top electrode 140 includes titanium, nitridation Titanium, tantalum nitride, TiAlN, aluminium nitride tantalum, or combinations thereof.
It can be seen from the above, the method for the manufacture phase-change memory of this announcement is with other fabrication steps (referring to Fig. 3 to Fig. 5) Polysilicon layer is removed, directly removes polysilicon layer without the use of tetramethyl ammonium hydroxide solution.In this way, in addition to that can avoid It uses except danger caused by tetramethyl ammonium hydroxide solution and its bring environmental pollution, and can be through positioned at the second hole Interior protective layer avoids the second hole from damaging, and the second hole is made to have good dimensional stability.
On the other hand, referring to Fig. 4 to Fig. 7, due to first removing separation layer, in sedimentary facies change material to the second hole Processing procedure be it is fairly easy, be conducive to following manufacture smaller size of second hole (can also claim contact hole).
Refer to the feature of various embodiments in a capsule above, therefore people skilled in the art can preferably understand this announcement Various aspects.People skilled in the art will be appreciated that implement identical purpose and/or reach the embodiment herein proposed Same advantage can use this announcement with as the basis for designing or modifying other processing procedures and structure easily.It is familiar with this skill Personage it should also be appreciated that, these impartial constructions can carry out respectively herein without departing substantially from the spirit and scope of this announcement and its people The spirit and scope that kind changes, replaces and substitutes without departing from this announcement.

Claims (10)

1. it is a kind of manufacture phase-change memory method, characterized by comprising:
A structure is formed, which includes:
One hearth electrode;
One dielectric layer is located above the hearth electrode;
One separation layer is located at the dielectric layer, and there is an opening to run through the separation layer;And
One polysilicon layer is located in the opening;
Form one first hole and one second hole extend through the polysilicon layer and the dielectric layer, second hole be located at this The lower section of one hole;
A protective layer is formed in first hole and second hole and above the polysilicon layer;
CMP step is carried out, or carries out dry ecthing procedure and CMP step, to remove the protective layer A part, the separation layer and the polysilicon layer, and the exposure dielectric layer and leaves the protective layer in second hole;
The protective layer in second hole is removed, with exposure second hole;And
It deposits in a heating material to second hole.
2. the method for manufacture phase-change memory according to claim 1, which is characterized in that the polysilicon layer of the structure It is located in the opening with a gap.
3. it is according to claim 1 manufacture phase-change memory method, which is characterized in that carry out the dry ecthing procedure and The step of CMP step, includes:
The dry ecthing procedure is carried out to the protective layer, with the exposure separation layer and the polysilicon layer;And
Carry out the CMP step, with remove the polysilicon layer of the separation layer of exposure, exposure and be located at this The protective layer in one hole, and the dielectric layer is exposed, and leave the protective layer in second hole.
4. it is according to claim 3 manufacture phase-change memory method, which is characterized in that exposure the separation layer it is upper Surface and the upper surface of the polysilicon layer of exposure are coplanar or generally coplanar.
5. the method for manufacture phase-change memory according to claim 3, which is characterized in that the polysilicon layer of exposure Upper surface and the upper surface for the protective layer being located in first hole are coplanar or generally coplanar.
6. the method for manufacture phase-change memory according to claim 3, which is characterized in that carry out the chemical mechanical grinding The step of processing procedure is using only the lapping liquid to the chemical mechanical grinding separation layer.
7. the method for manufacture phase-change memory according to claim 1, which is characterized in that remove in second hole The step of protective layer is using dry ecthing, wet etching or combinations thereof.
8. the method for manufacture phase-change memory according to claim 1, which is characterized in that deposit the step of the heating material Suddenly also comprising depositing the heating material to the dielectric layer.
9. the method for manufacture phase-change memory according to claim 8, which is characterized in that also include:
After the step of depositing the heating material, another CMP step is carried out, is located on the dielectric layer with removing The heating material of side, and the exposure dielectric layer, to form a heater in the dielectric layer, the wherein top surface of the heater It is flushed with the top surface of the dielectric layer.
10. the method for manufacture phase-change memory according to claim 9, which is characterized in that also include:
A top electrode and a phase change element are formed above the heater.
CN201811516556.0A 2018-12-12 2018-12-12 Method for manufacturing phase change memory Active CN109509835B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6329244B1 (en) * 2000-12-04 2001-12-11 United Microelectronics Corp. Method of manufacturing dynamic random access memory cell
CN105609631A (en) * 2015-11-09 2016-05-25 宁波时代全芯科技有限公司 Phase change storage device and manufacture method thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6329244B1 (en) * 2000-12-04 2001-12-11 United Microelectronics Corp. Method of manufacturing dynamic random access memory cell
CN105609631A (en) * 2015-11-09 2016-05-25 宁波时代全芯科技有限公司 Phase change storage device and manufacture method thereof

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