CN109509418A - Shift registor and display device - Google Patents

Shift registor and display device Download PDF

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Publication number
CN109509418A
CN109509418A CN201811561443.2A CN201811561443A CN109509418A CN 109509418 A CN109509418 A CN 109509418A CN 201811561443 A CN201811561443 A CN 201811561443A CN 109509418 A CN109509418 A CN 109509418A
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CN
China
Prior art keywords
shift
same level
circuit
switching device
signal
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CN201811561443.2A
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Chinese (zh)
Inventor
黄北洲
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HKC Co Ltd
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HKC Co Ltd
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Priority to CN201811561443.2A priority Critical patent/CN109509418A/en
Publication of CN109509418A publication Critical patent/CN109509418A/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3696Generation of voltages supplied to electrode drivers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/0286Details of a shift registers arranged for use in a driving circuit

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The application discloses a kind of shift registor and display device, wherein, shift registor includes the stages shift buffering circuit of cascade setting, the shift scratch circuit includes voltage regulator circuit, the voltage regulator circuit includes first switch device, the source electrode of the first switch device is connected with the pull-up of the same level shift scratch circuit point, and the source electrode of the first switch device is connected with the same level preliminary filling signal source, is charged with controlling the same level preliminary filling signal to the pull-up point of the same level shift scratch circuit.Technical scheme can reduce the number of switching device in shift registor, realize the lightening and narrow frame of display device.

Description

Shift registor and display device
Technical field
This application involves field of display technology, in particular to a kind of shift registor and display device.
Background technique
In traditional display device, line scan signals are realized by external integrated circuit, with display device Development generallys use grid in array substrate at present and integrated (Gate Drive on Array, GOA) is driven to realize line scan signals Output, realized especially by shift registor to be integrated in the array substrate of display device.When opening in shift registor Close the numbers such as device it is more when, in array substrate needed for will increase for the space that shift registor is reserved, cause display device compared with For heaviness, it is difficult to the frame for the display device that narrows.
Summary of the invention
The main purpose of the application is to propose a kind of shift registor, it is intended to solve switching device in above-mentioned shift registor Etc. the more technical problem of numbers, realize the lightening and narrow frame of display device.
To achieve the above object, shift registor provided by the present application, the stages shift buffering circuit including cascade setting, The shift scratch circuit includes voltage regulator circuit, and the voltage regulator circuit includes first switch device, the first switch device Source electrode is connected with the pull-up of the same level shift scratch circuit point, and the source electrode of the first switch device and the same level preliminary filling signal source phase Even, it is charged with controlling the same level preliminary filling signal to the pull-up point of the same level shift scratch circuit.
Optionally, the voltage regulator circuit includes low frequency voltage regulation signal source and the first switch device, and described first opens The grid for closing device is connected with low frequency voltage regulation signal source, and the drain electrode of the first switch device is connected with the same level pull-up point.
Optionally, the voltage regulator circuit includes second switch device, the grid and the low frequency of the second switch device Voltage regulation signal source is connected, and the source electrode of the second switch device is connected with low level signal source, the leakage of the second switch device Pole is connected with the scanning signal output end of the same level shift scratch circuit.
Optionally, low frequency voltage regulation signal source includes third switching device, the 4th switching device, the 5th switching device with And the 6th switching device, the grid of the third switching device and drain electrode are connected with low-frequency clock signal source;4th switch The grid of device is connected with the source electrode of the third switching device, and the drain electrode of the 4th switching device and the low-frequency clock are believed Number source is connected, and the source electrode of the 4th switching device is connected with the grid of the first switch device with output low frequency voltage regulation signal To the first switch device;The grid of 5th switching device is connected with the pull-up of rear class shift scratch circuit point, described The source electrode of 5th switching device is connected with the low level signal source, the drain electrode of the 5th switching device and the 4th switch The grid of device is connected;The grid of 6th switching device is connected with the pull-up of rear class shift scratch circuit point, and the described 6th The source electrode of switching device is connected with the low level signal source, the drain electrode of the 6th switching device and the first switch device Grid be connected.
Optionally, the shift scratch circuit includes output circuit, the output circuit include the 7th switching device and The grid of 8th switching device, the 7th switching device is connected with the pull-up of the same level shift scratch circuit point, and the described 7th opens The source electrode for closing device is connected to export the same level scanning signal with the scanning signal output end of the same level shift scratch circuit, and the described 7th The drain electrode of switching device is connected with the same level signal source of clock;The grid of 8th switching device and the same level shift scratch circuit Pull-up point is connected, and the source electrode of the 8th switching device is connected to export with the feedback signal output of the same level shift scratch circuit The drain electrode of the same level feedback signal, the 8th switching device is connected with the same level signal source of clock.
Optionally, the shift scratch circuit includes reset circuit, the reset circuit include the 9th switching device and The grid of tenth switching device, the 9th switching device is connected with the drop-down point of the same level shift scratch circuit, and the described 9th opens The source electrode for closing device is connected with low level signal source, the drain electrode of the 9th switching device and the scanning of the same level shift scratch circuit Signal output end is connected;The grid of tenth switching device is connected with the drop-down point of the same level shift scratch circuit, and the described tenth The source electrode of switching device is connected with the low level signal source, the drain electrode of the tenth switching device and the same level shift scratch circuit Pull-up point be connected.
Optionally, when the shift registor is in operating status, when the failing edge of the same level clock signal is with rear two-stage The rising edge of clock signal is synchronised, and the source electrode of the first switch device and the feedback signal of preceding two-stage shift scratch circuit are defeated Outlet is connected, preliminary filling signal of the former two-stage feedback signal as the same level shift scratch circuit.
Optionally, the voltage regulator circuit is connected with the pull-up point of rear two-stage shift scratch circuit, later two-stage pull up signal Driving signal as the same level voltage regulator circuit.
To achieve the above object, the application also proposes that a kind of shift registor, the shift registor include cascade setting Stages shift buffering circuit, the shift scratch circuit includes voltage regulator circuit, and the voltage regulator circuit includes first switch device, Second switch device and low frequency voltage regulation signal source, the source electrode and drain electrode and the same level shift scratch circuit of the first switch device Pull-up point be connected, and the feedback signal output phase of the source electrode of the first switch device and preceding two-stage shift scratch circuit Even, point charging is pulled up to control preceding two-stage feedback signal to the same level;The source electrode of the second switch device and low level signal source It is connected, the drain electrode of the second switch device is connected with the scanning signal output end of the same level shift scratch circuit;The low frequency is steady Pressure signal source is connected with the grid of the grid of the first switch device and the second switch device;Wherein, when the displacement When buffer is in operating status, the failing edge of the same level clock signal and the rising edge of rear two-stage clock signal are synchronised.
To achieve the above object, the application also proposes a kind of display device, the display device include display panel and Driving assembly, the driving component include shift registor, and the shift registor includes that the stages shift of cascade setting is temporary Circuit, the shift scratch circuit include voltage regulator circuit, and the voltage regulator circuit includes first switch device, the first switch device The source electrode of part is connected with the pull-up of the same level shift scratch circuit point, and the source electrode of the first switch device and the same level preliminary filling signal Source is connected, and is charged with controlling the same level preliminary filling signal to the pull-up point of the same level shift scratch circuit, and the shift registor is integrated In in the array substrate of the display panel.
In technical scheme, shift registor includes the stages shift buffering circuit of cascade setting, shift register Circuit includes voltage regulator circuit, and voltage regulator circuit can eliminate the timing noise generated in shift registor operational process, so as to improve defeated The waveform of scanning signal out;Voltage regulator circuit includes first switch device, the source electrode and the same level shift register of first switch device The pull-up point of circuit is connected, and the source electrode of first switch device is connected with the same level preliminary filling signal source, to control the same level preliminary filling signal Pull-up point charging to the same level shift scratch circuit.In the operational process of shift registor, preliminary filling signal passes through voltage regulator circuit In first switch device export to the pull-up point of the same level shift scratch circuit, the pull-up point of the same level shift scratch circuit is carried out Precharge can make full use of in voltage regulator circuit without special charging circuit is separately arranged again to pull-up point charging Some switching devices, switching device needed for saving charging circuit reduce the number of the switching device in shift scratch circuit, Help to be the reserved space of shift registor needed for reducing in the array substrate of display device, to realize display device Lightening and narrow frame.
Detailed description of the invention
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this Some embodiments of application for those of ordinary skill in the art without creative efforts, can be with The structure shown according to these attached drawings obtains other attached drawings.
Fig. 1 is the structural schematic diagram of n-th grade of shift scratch circuit of shift registor in an example;
Fig. 2 is the time diagram of 8CK shift registor in an example;
Fig. 3 is the structural schematic diagram of one embodiment of the application display device;
Fig. 4 is the structural schematic diagram of n-th grade of shift scratch circuit in one embodiment of the application shift registor;
Fig. 5 is the time diagram of 8CK shift registor in one specific example of the application shift registor;
Fig. 6 is the electrical block diagram of n-th grade of shift scratch circuit in another specific example of the application shift registor.
The embodiments will be further described with reference to the accompanying drawings for realization, functional characteristics and the advantage of the application purpose.
Specific embodiment
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete Site preparation description, it is clear that described embodiment is only a part of the embodiment of the application, instead of all the embodiments.Base Embodiment in the application, it is obtained by those of ordinary skill in the art without making creative efforts it is all its His embodiment, shall fall in the protection scope of this application.
It is to be appreciated that if relating to directionality instruction (such as up, down, left, right, before and after ...) in the embodiment of the present application, Then directionality instruction be only used for explain under a certain particular pose (as shown in the picture) between each component relative positional relationship, Motion conditions etc., if the particular pose changes, directionality instruction is also correspondingly changed correspondingly.
In addition, being somebody's turn to do " first ", " second " etc. if relating to the description of " first ", " second " etc. in the embodiment of the present application Description be used for description purposes only, be not understood to indicate or imply its relative importance or implicitly indicate indicated skill The quantity of art feature." first " is defined as a result, the feature of " second " can explicitly or implicitly include at least one spy Sign.It in addition, the technical solution between each embodiment can be combined with each other, but must be with those of ordinary skill in the art's energy It is enough realize based on, will be understood that the knot of this technical solution when conflicting or cannot achieve when occurs in the combination of technical solution Conjunction is not present, also not this application claims protection scope within.
Fig. 1 show the electrical block diagram of n-th grade of shift scratch circuit of shift registor in an example, including fills Circuit 111 ', output circuit 112 ', reset circuit 113 ' and voltage regulator circuit 114 '.Wherein, charging circuit 111 ' includes first Switching element T 1 ', the grid of first switch device T1 ' and drain electrode are connected to the preliminary filling signal source of the same level shift scratch circuit, with Receive preliminary filling signal ST (n) ', wherein preliminary filling signal ST (n) ' can be prime feedback signal F (n-i) '.Shown in Fig. 2 eight Under the timing of clock (8CK) shift registor, the failing edge of the same level clock signal is identical as the rising edge of rear two-stage clock signal Step, in the charging circuit 111 ' of n-th grade of shift scratch circuit, the grid of first switch device T1 ' and drain electrode receive preceding two-stage Feedback signal.By taking the 4th grade of shift scratch circuit as an example, charging circuit receives the 2nd grade of feedback signal F (2) ', when the 2nd grade of feedback letter When number F (2) ' is in high level state, charge to the pull-up point of the 4th grade of shift scratch circuit, so that the 4th grade of shift scratch circuit Pull-up level point PU (4) ' rise to time high level.When the 2nd grade of feedback signal F (2) ' low level is converted to by high level state When state, the 4th grade of clock signal CK (4) ' start to be converted to high level state by low level state, at this point, due to output circuit The coupling of parasitic capacitance present in 200 ', the 4th grade of clock signal CK (4) ' can also it make pull-up point electricity to pull-up point charging The 4th grade is generated under the action of flat PU (4) ' further up to high level, output circuit 112 ' is in the 4th grade of clock signal CK (4) ' The high level of scanning signal G (4) '.Hereafter, under the action of reset circuit 113 ' and voltage regulator circuit 114 ', the 4th grade of scanning signal G (4) ' is pulled down to low level state, realizes the 4th grade of scanning signal G (4) ' reset, wherein P1 shown in Fig. 2 (4) ' is the The low frequency voltage regulation signal of voltage regulator circuit 114 ' in 4 grades of shift scratch circuits.
The application proposes a kind of shift registor, is charged using voltage regulator circuit to pull-up point, without separately setting Set charging circuit.In the embodiment of the application, as shown in Figure 3 and Figure 4, shift registor 110 includes the more of cascade setting Grade shift scratch circuit, shift scratch circuit includes voltage regulator circuit 114, wherein voltage regulator circuit 114 includes first switch device The source electrode of T1, first switch device T1 are connected with the pull-up of the same level shift scratch circuit point, and the source electrode of first switch device T1 It is connected with the same level preliminary filling signal source, is charged with controlling the same level preliminary filling signal ST (n) to the pull-up point of the same level shift scratch circuit.
The concrete scheme of the application will be hereinafter described in detail by taking liquid crystal display device as an example.As shown in figure 3, Display device includes display panel, display panel include array substrate 100, color filter substrate 200 and be filled in array substrate 100 with Liquid crystal (not shown) between color filter substrate 200.Multiple pixels of rectangular array shape arrangement are provided on display panel, Each pixel generally includes several sub-pixels, and switching device corresponding with each sub-pixel, colour filter are provided in array substrate 100 Colour filter block corresponding with each sub-pixel is provided on substrate 200.Under the control of 100 upper switch device of array substrate, respectively Liquid crystal in the corresponding region of a sub-pixel is according to certain angular deflection, to realize the display of specific image.In GOA framework In display device, shift registor 110 is additionally provided in array substrate 100, to drive each row sub-pixel.Pass through micro Process work Shift registor 110 is directly integrated in array substrate 100 by skill, so that external shift registor is saved, to reduce display The material cost and process costs of device.
Shift registor 110 is developed on the basis of thompson circuit, and the stages shift including cascade setting is temporary Circuit, wherein the feedback signal F (n-i) of preceding shift buffering circuit output can be used as the preliminary filling of the same level shift scratch circuit The feedback signal F (n+j) of signal ST (n), the output of rear class shift scratch circuit can be used as the drop-down of the same level shift scratch circuit Signal PD (n), i and j are respectively positive integer, and specific value is related to signal sequence specific in shift registor, hereinafter Also it will be apparent from.Scanning signal G (n) and feedback signal F (n) with the output of level-one shift scratch circuit are usually consistent, It, can be using the initial signal being provided separately as its preliminary filling signal, for most for the first order or what preceding shift scratch circuit Rear stage or what shift scratch circuit, the shift scratch circuit that redundancy can be set provide pulldown signal for it.
In shift registor, same clock signal is often to control stages shift buffering circuit, for example, for TCK For shift registor, t grades of clock signals will control t+Tm grades of shift scratch circuits, wherein m is more than or equal to zero Integer, T are the sum of signal source of clock.In shift registor, n-th grade of scanning signal of output may be by clock signal The influence of multiple high level generates timing noise, therefore, it is necessary to which voltage regulator circuit 114 is arranged to eliminate above-mentioned timing noise.Such as Shown in Fig. 5, in a specific example, which is 8CK shift registor, the failing edge and n-th of n-th grade of clock signal The rising edge of+2 grades of clock signals is synchronised, therefore, can be by feedback signal F (n-2) conduct of the n-th -2 grades shift scratch circuits The preliminary filling signal ST (n) of n-th grade of shift scratch circuit.By taking the generation of the 4th grade of scanning signal as an example, the 4th grade of shift scratch circuit Voltage regulator circuit 114 in the source electrode of first switch device T1 be connected to the pull-up point of the same level shift scratch circuit, and receive the 2nd Grade feedback signal F (2) is the same level pull-up point charging.Before the 4th grade of clock signal CK (4) is high level by low transition, The same level pull-up point is precharged to time high level by the 2nd grade of feedback signal F (2).When the 4th grade of clock signal CK (4) is in high level When, under the parasitic capacitance effect in output circuit 112, the 4th grade of clock signal CK (4) also pulls up point charging to the same level, thus Export the high level of the 4th grade of scanning signal.Hereafter, under the collective effect of reset circuit 113 and voltage regulator circuit 114, the 4th grade is swept It retouches signal and is pulled down to low level state.By the first switch device T1 in voltage regulator circuit 114 to pull-up point charging, without another Row is arranged special charging circuit and can subtract in every level-one shift scratch circuit to take full advantage of existing switching device A few setting at least switching device, then can at least reduce the about N number of switching device of setting in entire shift registor, N is displacement Total series of buffer, to reduce the number of switching device needed for shift registor, in the array base of display device The lightening and narrow side of display device also is helped to realize just without reserving excessive space shift registor is arranged in plate Frame.
In the present embodiment, shift registor includes the stages shift buffering circuit of cascade setting, shift scratch circuit packet Voltage regulator circuit 114 is included, voltage regulator circuit 114 can eliminate the timing noise generated in shift registor operational process, so as to improve defeated The waveform of scanning signal out;Voltage regulator circuit 114 includes first switch device T1, and the source electrode and the same level of first switch device T1 moves The pull-up point of position buffering circuit is connected, and the source electrode of first switch device T1 is connected with the same level preliminary filling signal source, to control the same level Preliminary filling signal ST (n) charges to the pull-up point of the same level shift scratch circuit.In the operational process of shift registor, preliminary filling signal It is exported by the first switch device in voltage regulator circuit to the pull-up point of the same level shift scratch circuit, to the same level shift scratch circuit Pull-up click through line precharge, without be separately arranged again special charging circuit to pull-up point charging, can make full use of Existing switching device in voltage regulator circuit, switching device needed for saving charging circuit reduce opening in shift scratch circuit The number for closing device helps to be the reserved space of shift registor needed for reducing in the array substrate of display device, thus Realize the lightening and narrow frame of display device.
In another specific example, as shown in fig. 6, voltage regulator circuit includes low frequency voltage regulation signal source, first switch device T1 Grid be connected with low frequency voltage regulation signal source, the drain electrode of first switch device T1 is connected with the same level pull-up point.
Time diagram shown in fig. 5 is readily applicable to shift scratch circuit shown in fig. 6, with the 4th grade of shift register For circuit, when the feedback signal F (2) of the 2nd grade of shift scratch circuit is in high level, the 4th grade of low frequency voltage regulation signal P1 (4) It is also at high level, first switch device T1 is in the conductive state at this time, and it is short-circuit between source electrode and drain electrode, and the 4th grade is moved The pull-up point charging of position buffering circuit;When the 4th grade of clock signal CK (4) be again at high level state with generate 4+8n (n > 0) when grade scanning signal, the 2nd grade of feedback signal F (2) is in low level state, and the 4th grade of low frequency voltage regulation signal P1 (4) is in high electricity Level state, first switch device T1 is in the conductive state at this time, under the drop-down effect of the 2nd grade of feedback signal F (2), the 4th grade of shifting The pull-up point of position buffering circuit is in low level state, correspondingly, output circuit 112 is also at off state, to avoid the 4th grade Clock signal CK (4) generates timing noise by being coupled in the 4th grade of scanning signal G (4) for output circuit 112.
As shown in fig. 6, voltage regulator circuit includes second switch device T2, the grid of second switch device T2 and low frequency pressure stabilizing are believed Number source is connected, and the source electrode of second switch device T2 is connected with low level signal source, the drain electrode of second switch device T2 and the same level shifting The scanning signal output end of position buffering circuit is connected.
As shown in figure 5, by taking the 4th grade of shift scratch circuit as an example, at the feedback signal F (2) of the 2nd grade of shift scratch circuit When high level, the 4th grade of low frequency voltage regulation signal P1 (4) is also at high level, and second switch device T2 is in the conductive state at this time, Under the drop-down effect for the low level signal VSS that low level signal source generates, the 4th grade of scanning signal is in low level state;When When 4th grade of clock signal CK (4) is again at high level state to generate 4+8n (n > 0) grade scanning signal, the 2nd grade of feedback letter Number F (2) is in low level state, and the 4th grade of low frequency voltage regulation signal P1 (4) is in high level state, at this time second switch device T2 In the conductive state, under the drop-down effect of low level signal VSS, the 4th grade of scanning signal is in low level state.Namely It says, the low level state before and after the high level state in the 4th grade of scanning signal has all obtained drop-down well and protected It holds, avoids the influence of interference signal.
Further, as shown in fig. 6, low frequency voltage regulation signal source includes third switching element T 3, the 4th switching element T 4, Five switching element Ts 5 and the 6th switching element T 6, the grid of third switching element T 3 and drain electrode are connected with low-frequency clock signal source; The grid of 4th switching element T 4 is connected with the source electrode of third switching element T 3, and the drain electrode of the 4th switching device and low-frequency clock are believed Number source is connected, and the source electrode of the 4th switching element T 4 is connected with output low frequency voltage regulation signal to the with the grid of first switch device T1 One switching device;The grid of 5th switching element T 5 is connected with the pull-up of rear class shift scratch circuit point, the 5th switching element T 5 Source electrode be connected with low level signal source, the drain electrode of the 5th switching element T 5 is connected with the grid of the 4th switching element T 4;6th The grid of switching element T 6 is connected with the pull-up of rear class shift scratch circuit point, and the source electrode and low level of the 6th switching element T 6 are believed Number source is connected, and the drain electrode of the 6th switching element T 6 is connected with the grid of first switch device T1.
Specifically, low-frequency clock signal LCK is converted to low frequency voltage regulation signal P1 (n) by low-frequency clock signal source, to meet Eliminate the demand of timing noise, at the same avoid pull up a little with scanning signal output end always clamper in low level state and to sweeping The generation for retouching the high level of signal G (n) interferes.By taking the timing in the 4th grade of shift scratch circuit shown in fig. 5 as an example, when When the pull up signal PU (6) of two-stage shift scratch circuit is in high level state and secondary high level state afterwards, the 5th switching device T5 and the 6th switching element T 6 are in the conductive state, to make the grid of the grid of the 4th switching element T 4, first switch device T1 The grid of pole and second switch device T2 are in low level state under the action of low level signal VSS, at this point, the 4th derailing switch Part T4, first switch device T1 and second switch device T2 are in off state, the pull-up point of the 4th grade of shift scratch circuit with Low level signal source it is separated.Similarly, before the pull up signal PU (4) of the same level shift scratch circuit is in high level state Secondary high level state when, low frequency voltage regulation signal P1 (4) is in high level state, at this time first switch device T1 and second switch Device T2 conducting, pull-up o'clock are in high level state under the action of the 2nd grade of (2) feedback signal F, carry out to output module 112 Preliminary filling, the 4th grade of scanning signal output end is in low level state under the clamping action of low level signal VSS, so that the 4th grade is swept It retouches signal G (4) and is maintained at low level state;When the same level pull up signal PU (4) be in high level state and after secondary high level When state, low frequency voltage regulation signal P1 (4) is in low level state, and first switch device T1 and second switch device T2 is disconnected at this time It opens, the 4th grade of scanning signal output end generates the 4th grade of scanning signal G (4) under the action of the 4th grade of (4) clock signal CK.
As shown in fig. 6, shift scratch circuit includes output circuit 112, output circuit 112 includes 7 He of the 7th switching element T The grid of 8th switching element T 8, the 7th switching element T 7 is connected with the pull-up of the same level shift scratch circuit point, the 7th derailing switch The source electrode of part T7 is connected to export the same level scanning signal, the 7th derailing switch with the scanning signal output end of the same level shift scratch circuit The drain electrode of part T7 is connected with the same level signal source of clock;The grid of 8th switching element T 8 and the pull-up point of the same level shift scratch circuit It is connected, the source electrode of the 8th switching element T 8 is connected to export the same level feedback with the feedback signal output of the same level shift scratch circuit The drain electrode of signal, the 8th switching element T 8 is connected with the same level signal source of clock.
As shown in figure 5, by taking the generation of the 4th grade of scanning signal as an example, when the 7th switching element T 7 is pull up signal PU's (4) Under effect when conducting, the 4th grade of clock signal CK (4) is in high level, to generate the high level of the 4th grade of scanning signal G (4). In addition, coupled capacitor C can also be arranged between the pull-up point and scanning signal output end of the same level shift scratch circuit, make clock Signal is preferably coupled with pull-up point, to generate the high level of scanning signal.The working principle of 8th switching element T 8 is the same as the 7th Switching element T 7, the feedback signal and scanning signal of output are almost the same, and the 8th switching element T 8 is shifted with prime or rear class Cascade is formed between buffering circuit, to drive the operation of shift registor.
As shown in fig. 6, shift scratch circuit includes reset circuit 113, reset circuit includes the 9th switching element T 9 and the Ten switching element Ts 10, the grid of the 9th switching element T 9 are connected with the drop-down point of the same level shift scratch circuit, the 9th switching device The source electrode of T9 is connected with low level signal source, and the drain electrode of the 9th switching element T 9 and the scanning signal of the same level shift scratch circuit are defeated Outlet is connected;The grid of tenth switching element T 10 is connected with the drop-down point of the same level shift scratch circuit, the tenth switching element T 10 Source electrode be connected with low level signal source, the drain electrode of the tenth switching element T 10 is connected with the pull-up of the same level shift scratch circuit point.
Reset circuit 113 is to be pulled down to low level state for the scanning signal of generation.Specifically, as shown in figure 5, with For the generation of 4 grades of scanning signals, when pulldown signal PD (4) is in high level state, the 9th switching element T 9 and the tenth is opened Device T10 conducting is closed, pull-up point and scanning signal are pulled low to low level state under the action of low level signal VSS, realized Progressive scan.In fig. 5 and fig., the scanning signal G (n+4) of later level Four shift scratch circuit output is temporary as the same level displacement Deposit the pulldown signal PD (n) of circuit.
The application also proposes a kind of display device, as shown in figure 3, display device includes display panel and driving assembly, Display of the driving assembly to drive display panel, driving assembly includes shift registor 110, and shift registor 110 is integrated In in the array substrate 100 of display panel, to reduce material cost and process costs, lightening and narrow frame display is realized Device.The specific structure of the shift registor 110 is referring to above-described embodiment, since this display device uses above-mentioned all implementations Whole technical solutions of example, therefore at least all beneficial effects brought by the technical solution with above-described embodiment, herein not It repeats one by one again.
The foregoing is merely the alternative embodiments of the application, are not intended to limit the scope of the patents of the application, all at this Under the inventive concept of application, using equivalent structure transformation made by present specification and accompanying drawing content, or directly/use indirectly In the scope of patent protection that other related technical areas are included in the application.

Claims (10)

1. a kind of shift registor, which is characterized in that the shift registor includes the stages shift buffering circuit of cascade setting, The shift scratch circuit includes voltage regulator circuit, and the voltage regulator circuit includes:
The source electrode of first switch device, the first switch device is connected with the pull-up of the same level shift scratch circuit point, and described The source electrode of first switch device is connected with the same level preliminary filling signal source, to control the same level preliminary filling signal to the same level shift scratch circuit Pull-up point charging.
2. shift registor as described in claim 1, which is characterized in that the voltage regulator circuit includes:
Low frequency voltage regulation signal source;And
The grid of the first switch device, the first switch device is connected with low frequency voltage regulation signal source, and described first The drain electrode of switching device is connected with the same level pull-up point.
3. shift registor as claimed in claim 2, which is characterized in that the voltage regulator circuit includes:
The grid of second switch device, the second switch device is connected with low frequency voltage regulation signal source, the second switch The source electrode of device is connected with low level signal source, and the drain electrode of the second switch device and the scanning of the same level shift scratch circuit are believed Number output end is connected.
4. shift registor as claimed in claim 2, which is characterized in that low frequency voltage regulation signal source includes:
Third switching device, the grid of the third switching device and drain electrode are connected with low-frequency clock signal source;And
The grid of 4th switching device, the 4th switching device is connected with the source electrode of the third switching device, and the described 4th The drain electrode of switching device is connected with the low-frequency clock signal source, the source electrode and the first switch device of the 4th switching device The grid of part is connected with output low frequency voltage regulation signal to the first switch device;
The grid of 5th switching device, the 5th switching device is connected with the pull-up of rear class shift scratch circuit point, and described The source electrode of five switching devices is connected with the low level signal source, the drain electrode of the 5th switching device and the 4th derailing switch The grid of part is connected;And
The grid of 6th switching device, the 6th switching device is connected with the pull-up of rear class shift scratch circuit point, and described The source electrode of six switching devices is connected with the low level signal source, the drain electrode of the 6th switching device and the first switch device The grid of part is connected.
5. shift registor according to any one of claims 1 to 4, which is characterized in that the shift scratch circuit includes Output circuit, the output circuit include:
The grid of 7th switching device, the 7th switching device is connected with the pull-up of the same level shift scratch circuit point, and described The source electrode of seven switching devices is connected to export the same level scanning signal with the scanning signal output end of the same level shift scratch circuit, described The drain electrode of 7th switching device is connected with the same level signal source of clock;And
The grid of 8th switching device, the 8th switching device is connected with the pull-up of the same level shift scratch circuit point, and described The source electrode of eight switching devices is connected to export the same level feedback signal with the feedback signal output of the same level shift scratch circuit, described The drain electrode of 8th switching device is connected with the same level signal source of clock.
6. shift registor according to any one of claims 1 to 4, which is characterized in that the shift scratch circuit includes Reset circuit, the reset circuit include:
The grid of 9th switching device, the 9th switching device is connected with the drop-down point of the same level shift scratch circuit, and described The source electrode of nine switching devices is connected with low level signal source, drain electrode and the same level shift scratch circuit of the 9th switching device Scanning signal output end is connected;And
The grid of tenth switching device, the tenth switching device is connected with the drop-down point of the same level shift scratch circuit, and described The source electrode of ten switching devices is connected with the low level signal source, the drain electrode of the tenth switching device and the same level shift register electricity The pull-up point on road is connected.
7. shift registor according to any one of claims 1 to 4, which is characterized in that when the shift registor is in When operating status, the failing edge of the same level clock signal and the rising edge of rear two-stage clock signal are synchronised, and the first switch The source electrode of device is connected with the feedback signal output of preceding two-stage shift scratch circuit, and former two-stage feedback signal is moved as the same level The preliminary filling signal of position buffering circuit.
8. shift registor as claimed in claim 7, which is characterized in that the voltage regulator circuit and rear two-stage shift scratch circuit Pull-up point be connected, driving signal of the later two-stage pull up signal as the same level voltage regulator circuit.
9. a kind of shift registor, which is characterized in that the shift registor includes the stages shift buffering circuit of cascade setting, The shift scratch circuit includes voltage regulator circuit, and the voltage regulator circuit includes:
The source electrode and drain electrode of first switch device, the first switch device is connected with the pull-up of the same level shift scratch circuit point, And the source electrode of the first switch device is connected with the feedback signal output of preceding two-stage shift scratch circuit, to control preceding two-stage Feedback signal pulls up point charging to the same level;
The source electrode of second switch device, the second switch device is connected with low level signal source, the second switch device Drain electrode is connected with the scanning signal output end of the same level shift scratch circuit;And
Low frequency voltage regulation signal source, the grid and the second switch device in low frequency voltage regulation signal source and the first switch device The grid of part is connected;
Wherein, when the shift registor is in operating status, the failing edge of the same level clock signal and rear two-stage clock signal Rising edge be synchronised.
10. a kind of display device, which is characterized in that the display device includes:
Display panel;And
Driving assembly, the driving component include shift registor as claimed in any one of claims 1-9 wherein, and the shifting Position buffer is integrated in the array substrate of the display panel.
CN201811561443.2A 2018-12-19 2018-12-19 Shift registor and display device Pending CN109509418A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811561443.2A CN109509418A (en) 2018-12-19 2018-12-19 Shift registor and display device

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Application Number Priority Date Filing Date Title
CN201811561443.2A CN109509418A (en) 2018-12-19 2018-12-19 Shift registor and display device

Publications (1)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105513530A (en) * 2015-12-23 2016-04-20 友达光电股份有限公司 Shift register and control method thereof
CN106531120A (en) * 2017-01-19 2017-03-22 京东方科技集团股份有限公司 Shifting register unit and driving method thereof, grid driving circuit and display apparatus
CN108986732A (en) * 2018-08-13 2018-12-11 惠科股份有限公司 Shift scratch circuit and display device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105513530A (en) * 2015-12-23 2016-04-20 友达光电股份有限公司 Shift register and control method thereof
CN106531120A (en) * 2017-01-19 2017-03-22 京东方科技集团股份有限公司 Shifting register unit and driving method thereof, grid driving circuit and display apparatus
CN108986732A (en) * 2018-08-13 2018-12-11 惠科股份有限公司 Shift scratch circuit and display device

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