CN109388177A - Based on internuclear sequential synchronous method and data transmission method in more kernel DSP - Google Patents
Based on internuclear sequential synchronous method and data transmission method in more kernel DSP Download PDFInfo
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- CN109388177A CN109388177A CN201811194441.4A CN201811194441A CN109388177A CN 109388177 A CN109388177 A CN 109388177A CN 201811194441 A CN201811194441 A CN 201811194441A CN 109388177 A CN109388177 A CN 109388177A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17306—Intercommunication techniques
- G06F15/17325—Synchronisation; Hardware support therefor
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Abstract
The invention discloses a kind of based on internuclear sequential synchronous method and data transmission method in more kernel DSP, and the interior internuclear sequential synchronous method includes: the system clock that DSP is arranged, and the DSP is interrupted according to predefined timing cycle transmission timing；First calculating cycle of the first kernel in the DSP, the second calculating cycle of the second kernel are set, and first calculating cycle is more than or equal to the timing cycle, and first calculating cycle is less than second calculating cycle；Interruption determines the second starting point of the first starting point of the first calculating cycle and the second calculating cycle in first kernel to first kernel based on the received, and sends the starting point interrupted to second kernel as the first calculating cycle and the second calculating cycle in second kernel respectively.Embodiment provided by the invention is able to solve the timing synchronization problem of interior internuclear different calculating cycles in more kernel DSP, and effectively improves interior internuclear data transmission efficiency.
Description
Technical field
The present invention relates to embedded system development fields, more particularly to a kind of based on internuclear timing in more kernel DSP
Synchronous method and data transmission method.
Background technique
It is very widely used based on more kernels in embedded system market at present compared with traditional embedded system
DSP (Digital Signal Processing, Digital Signal Processing) system, more kernel dsp systems have multiple reliable
Multiple independent data processing equipments, can be integrated by the higher kernel of property by depth integration, and within internuclear interface generation
Pervious conventional low communication interface has been replaced, has not only reduced equipment volume, but also improve reliability, and has shortened prolonging for internal communication
When.
However it applies in missile-borne information processing system, multiple respective calculating cycles of kernel in more kernel DSP
Time is different, and the timing for how synchronizing internuclear different calculating cycles in more becomes more kernel DSP and bites critical issue to be solved.
Summary of the invention
At least one to solve the above-mentioned problems, first aspect present invention provides a kind of based on internuclear in more kernel DSP
Sequential synchronous method, comprising:
The system clock of DSP is set, and the DSP is interrupted according to predefined timing cycle transmission timing；
First calculating cycle of the first kernel in the DSP is set, the second calculating cycle of the second kernel, described first
Calculating cycle is more than or equal to the timing cycle, and first calculating cycle is less than second calculating cycle；
Interruption determines the first of the first calculating cycle in first kernel to first kernel based on the received
Point and the second calculating cycle the second starting point, and respectively first starting point send first interrupt to second kernel,
Second starting point sends second and interrupts to second kernel；
Second kernel receives described first and interrupts with the second interruption and respectively as the first meter in second kernel
Calculate first starting point in period and the second starting point of the second calculating cycle.
Further, the timing cycle is the approximate number of first calculating cycle and the pact of second calculating cycle
Number.
Further, first calculating cycle is the approximate number of second calculating cycle.
Further, the interior internuclear sequential synchronous method further includes the first counter for adding up Interruption number
With the second counter,
First counter described in when first kernel receives the Interruption for the first time starts counting, according to described
Timing cycle and the multiple proportion of the first calculating cycle determine the first starting point of the first calculating cycle described in first kernel,
First counter O reset；
Second counter described in when first kernel receives the Interruption for the first time starts counting, according to described
Timing cycle and the multiple proportion of the second calculating cycle determine the second starting point of the second calculating cycle described in first kernel,
Second counter O reset.
Further, the second core clock that the first core clock and the second kernel that first kernel uses use is
Homologous clock.
Further, first interruption and the second interruption are internuclear interruption.
Second aspect of the present invention, which provides, a kind of carries out data biography using sequential synchronous method internuclear in described in first aspect
Defeated transmission method, comprising:
Synchronize first kernel and the second kernel；
First kernel acquires data in the first starting point of each first calculating cycle, in second calculating cycle
The acquisition data are transmitted to second kernel and send described second and interrupted by the second starting point；
Second kernel receives second interruption and the acquisition data, carries out at data to the acquisition data
Reason.
Further, first kernel and the second kernel are carried out data transmission using internuclear bus.
Third aspect present invention provides a kind of computer readable storage medium, is stored thereon with computer program, the program
Method described in first aspect is realized when being executed by processor.
Fourth aspect present invention provides a kind of computer readable storage medium, is stored thereon with computer program, the program
Method described in second aspect is realized when being executed by processor.
Beneficial effects of the present invention are as follows:
It is provided by the invention a kind of based on internuclear sequential synchronous method and data transmission method in more kernel DSP, pass through
System clock and Interruption that DSP is arranged determine of the first calculating cycle and the second calculating cycle in the first kernel respectively
Point, and by the first kernel is sent first interrupt and second terminal determine in second kernel respectively the first calculating cycle and
The starting point of second calculating cycle to realize interior internuclear timing synchronization problem in more kernel DSP, and effectively improves interior internuclear number
According to efficiency of transmission.
Detailed description of the invention
Specific embodiments of the present invention will be described in further detail with reference to the accompanying drawing.
Fig. 1 shows the flow chart of interior internuclear sequential synchronous method described in one embodiment of the present of invention；
Fig. 2 shows the schematic diagrames of interior internuclear sequential synchronous method described in one embodiment of the present of invention；
Fig. 3 shows the timing diagram of interior internuclear sequential synchronous method described in one embodiment of the present of invention；
Fig. 4 shows the flow chart of data transmission method described in one embodiment of the present of invention.
Specific embodiment
In order to illustrate more clearly of the present invention, the present invention is done further below with reference to preferred embodiments and drawings
It is bright.Similar component is indicated in attached drawing with identical appended drawing reference.It will be appreciated by those skilled in the art that institute is specific below
The content of description is illustrative and be not restrictive, and should not be limited the scope of the invention with this.
As shown in Figure 1, An embodiment provides a kind of based on internuclear timing synchronization side in more kernel DSP
Method, comprising: the system clock of DSP is set, and the DSP is interrupted according to predefined timing cycle transmission timing；The DSP is set
In the first kernel the first calculating cycle, the second calculating cycle of the second kernel, first calculating cycle be more than or equal to institute
Timing cycle is stated, first calculating cycle is less than second calculating cycle；First kernel is based on the received in timing
It is disconnected to determine the first starting point of the first calculating cycle and the second starting point of the second calculating cycle in first kernel, and respectively in institute
The first starting point transmission first is stated to interrupt to second kernel, in the second interruption of second starting point transmission to described second
Core；Second kernel receives described first and interrupts with the second interruption and respectively as the first calculating cycle in second kernel
The first starting point and the second calculating cycle the second starting point.
In a specific example, as shown in Fig. 2, the system clock that the DSP is arranged is 50MHz, predefined timing
Period is 0.05ms, and according to the timing cycle, DSP is interrupted with the frequency transmission timing of 20KHz.The first kernel of the DSP
For acquiring data, with the first calculating cycle circle collection of the first kernel；The second kernel of the DSP is for handling described adopt
Collect data, with the second calculating cycle cycle calculations of the second kernel, processing.To improve DSP to the reliable of data acquisition and processing (DAP)
Property and stability, set the timing cycle to the approximate number of first calculating cycle and the pact of second calculating cycle
Number, further, first calculating cycle are the approximate number of second calculating cycle, and in the present embodiment, first is calculated
Period is set as 0.25ms, sets 5ms for the second calculating cycle.First kernel is received the Interruption and is made with this
First of the first calculating cycle described in first kernel is determined according to the duration of first calculating cycle for time zero
Starting point, and send first and interrupt to second kernel, second kernel first is interrupted as the second kernel based on the received
In the first calculating cycle the first starting point；Similar, first kernel receives the Interruption and in this, as timing
Starting point determines the second starting point of the second calculating cycle described in first kernel according to the duration of second calculating cycle, and
It sends second to interrupt to second kernel, second kernel second is interrupted as the second meter in the second kernel based on the received
Calculate second starting point in period.So far, first kernel and the second kernel, which are realized, synchronizes.
Further, the reliability synchronized for raising first kernel and the second kernel, the interior internuclear timing synchronization
Method further includes the first counter and the second counter for adding up Interruption number, wherein first counter is used
In determining first calculating cycle, when first kernel receives the Interruption for the first time described in the first counter open
Begin to count, i.e., described first kernel often receives the first counter described in an Interruption and carries out one-accumulate, according to described
Timing cycle and the multiple proportion of the first calculating cycle determine the first starting point of the first calculating cycle described in first kernel；
As shown in figure 3, in the present embodiment, timing cycle t0=0.05ms, the first calculating cycle is set as t1=0.25ms, described
For first kernel to receive Interruption for the first time as time zero t, then it is described that first counter, which adds up 5 Interruptions,
First calculating cycle, first kernel can determine the first starting point of first calculating cycle according to first counter
T1, and send first to the second kernel and interrupt with the first starting point t1 of the first calculating cycle in determination second kernel, simultaneously
The first counter O reset in first kernel starts the cycle over counting from next Interruption.Similar, described second
Counter is for determining second calculating cycle, when first kernel receives the Interruption for the first time, described the
Two counters also start counting, and are determined in first kernel according to the multiple proportion of the timing cycle and the second calculating cycle
Second starting point of second calculating cycle；In the present embodiment, timing cycle t0=0.05ms, the setting of the second calculating cycle
For t2=5ms, then accumulative 100 Interruptions of second counter are second calculating cycle, the first kernel root
It can determine the second starting point t2 of second calculating cycle according to second counter, and send second to the second kernel and interrupt
With the second starting point t2 of the second calculating cycle in determination second kernel, while the second counter in first kernel is clear
Zero, counting is started the cycle over from next Interruption.
It is worth noting that heretofore described timing cycle, the first calculating cycle, the second calculating cycle, the first counting
Device and the second counter are only used for the meter for example, those skilled in the art's DSP core according to practical application
The duration setting timing cycle in period, the numerical value and quantity of calculating cycle and counter are calculated, can be realized concrete application demand
For design criteria, details are not described herein.
To further increase the synchronous reliability of first kernel and the second kernel, first kernel use first
The second core clock that core clock and the second kernel use is homologous clock.In the present embodiment, first kernel and
Two kernels use same external clock reference, such as use FPGA as external clock reference, while to the first kernel and the second kernel
Stable clock signal is provided；By multiple actual measurement, same calculating cycle between first kernel and the second kernel
Error meets the requirement of missile-borne information processing system in 10ns or so.
In order to further decrease the coupling and interference between missile-borne information processing system, described first interrupt and second in
The disconnected internuclear interruption using DSP, effectively increases the transmission of the synchronization signal between the first kernel and the second kernel, is realizing the
While independence between one kernel and the second kernel, avoid because of the unnecessary error of transmission of outage bring.
Corresponding with interior internuclear sequential synchronous method provided by the above embodiment, one embodiment of the application also provides one
The data transmission method that kind is carried out data transmission using above-mentioned interior internuclear sequential synchronous method, as shown in Figure 4, comprising: synchronous institute
State the first kernel and the second kernel；First kernel acquires data in the first starting point of each first calculating cycle, described
The acquisition data are transmitted to second kernel and send described second and interrupted by the second starting point of the second calculating cycle；It is described
Second kernel receives second interruption and the acquisition data, carries out data processing to the acquisition data.So first
In the case that kernel and the second kernel are synchronous, the internuclear transmission data in the first kernel and second are interrupted and the using first
Two, which interrupt circulation, carries out data transmission, and can effectively improve the quality of data transmission.
Further, described in order to improve the transmission rate that the data between first kernel and the second kernel are transmitted
First kernel and the second kernel are carried out data transmission using internuclear bus, and the transmission rate can achieve 10Gbps, be much higher than
The transmission rate carried out data transmission using universal serial bus 485 or 422.Therefore first kernel and the second kernel use internuclear
Bus carries out data transmission, and while increasing substantially communication efficiency, also improves communication reliability.
An embodiment provides a kind of computer readable storage mediums, are stored thereon with computer program,
The realization when program is executed by processor: the system clock of DSP is set, and it is fixed that the DSP is sent according to predefined timing cycle
When interrupt；First calculating cycle of the first kernel in the DSP is set, the second calculating cycle of the second kernel, described first
Calculating cycle is more than or equal to the timing cycle, and first calculating cycle is less than second calculating cycle；In described first
Interruption determines the first starting point of the first calculating cycle and the second calculating cycle in first kernel to core based on the received
Second starting point, and send first in first starting point respectively and interrupt to second kernel, in second starting point and send the
Two interrupt to second kernel；Second kernel receives described first and interrupts with the second interruption and respectively as described second
Second starting point of the first starting point of the first calculating cycle and the second calculating cycle in kernel.
Another embodiment of the present invention provides a kind of computer readable storage mediums, are stored thereon with computer journey
The realization when program is executed by processor: sequence synchronizes first kernel and the second kernel；First kernel is each first
First starting point of calculating cycle acquires data, and the acquisition data are transmitted to institute in the second starting point of second calculating cycle
It states the second kernel and sends described second and interrupt；Second kernel receives second interruption and the acquisition data, to institute
It states acquisition data and carries out data processing.
In practical applications, the computer readable storage medium can be using one or more computer-readable media
Any combination.Computer-readable medium can be computer-readable signal media or computer readable storage medium.It calculates
Machine readable storage medium storing program for executing can for example be but not limited to system, device or the device of electricity, magnetic, optical, electromagnetic, infrared ray or semiconductor
Part, or any above combination.The more specific example (non exhaustive list) of computer readable storage medium includes: to have
The electrical connection of one or more conducting wires, portable computer diskette, hard disk, random access memory (RAM), read-only memory
(ROM), erasable programmable read only memory (EPROM or flash memory), optical fiber, portable compact disc read-only memory (CD-
ROM), light storage device, magnetic memory device or above-mentioned any appropriate combination.It is computer-readable to deposit in this in real time example
Storage media can be any tangible medium for including or store program, which can be commanded execution system, device or device
Part use or in connection.
Computer-readable signal media may include in a base band or as carrier wave a part propagate data-signal,
Wherein carry computer-readable program code.The data-signal of this propagation can take various forms, including but unlimited
In electromagnetic signal, optical signal or above-mentioned any appropriate combination.Computer-readable signal media can also be that computer can
Any computer-readable medium other than storage medium is read, which can send, propagates or transmit and be used for
By the use of instruction execution system, device or device or program in connection.
The program code for including on computer-readable medium can transmit with any suitable medium, including but not limited to without
Line, electric wire, optical cable, RF etc. or above-mentioned any appropriate combination.
The computer for executing operation of the present invention can be write with one or more programming languages or combinations thereof
Program code, described program design language include object oriented program language-such as Java, Smalltalk, C++,
It further include conventional procedural programming language-such as " C " language or similar programming language.Program code can be with
It fully executes, partly execute on the user computer on the user computer, being executed as an independent software package, portion
Divide and partially executes or executed on a remote computer or server completely on the remote computer on the user computer.?
Be related in the situation of remote computer, remote computer can pass through the network of any kind --- including local area network (LAN) or
Wide area network (WAN)-be connected to subscriber computer, or, it may be connected to outer computer (such as mentioned using Internet service
It is connected for quotient by internet).
It is provided by the invention a kind of based on internuclear sequential synchronous method and data transmission method in more kernel DSP, pass through
System clock and Interruption that DSP is arranged determine of the first calculating cycle and the second calculating cycle in the first kernel respectively
Point, and by the first kernel is sent first interrupt and second terminal determine in second kernel respectively the first calculating cycle and
The starting point of second calculating cycle to realize interior internuclear timing synchronization problem in more kernel DSP, and effectively improves interior internuclear number
According to efficiency of transmission.
Obviously, the above embodiment of the present invention be only to clearly illustrate example of the present invention, and not be pair
The restriction of embodiments of the present invention may be used also on the basis of the above description for those of ordinary skill in the art
To make other variations or changes in different ways, all embodiments can not be exhaustive here, it is all to belong to this hair
The obvious changes or variations that bright technical solution is extended out are still in the scope of protection of the present invention.
Claims (10)
1. a kind of based on internuclear sequential synchronous method in more kernel DSP characterized by comprising
The system clock of DSP is set, and the DSP is interrupted according to predefined timing cycle transmission timing；
First calculating cycle of the first kernel in the DSP is set, and the second calculating cycle of the second kernel, described first calculates
Period is more than or equal to the timing cycle, and first calculating cycle is less than second calculating cycle；
First kernel based on the received Interruption determine in first kernel the first starting point of the first calculating cycle and
Second starting point of the second calculating cycle, and send first in first starting point respectively and interrupt to second kernel, described
Second starting point sends second and interrupts to second kernel；
Second kernel receives described first and interrupts with the second interruption and respectively as the first calculating week in second kernel
The first starting point of phase and the second starting point of the second calculating cycle.
2. interior internuclear sequential synchronous method according to claim 1, which is characterized in that the timing cycle is described first
The approximate number of the approximate number of calculating cycle and second calculating cycle.
3. interior internuclear sequential synchronous method according to claim 2, which is characterized in that first calculating cycle is described
The approximate number of second calculating cycle.
4. interior internuclear sequential synchronous method according to claim 3, which is characterized in that the interior internuclear sequential synchronous method
It further include the first counter and the second counter for adding up Interruption number,
First counter described in when first kernel receives the Interruption for the first time starts counting, according to the timing
The multiple proportion of period and the first calculating cycle determines the first starting point of the first calculating cycle described in first kernel, described
First counter O reset；
Second counter described in when first kernel receives the Interruption for the first time starts counting, according to the timing
The multiple proportion of period and the second calculating cycle determines the second starting point of the second calculating cycle described in first kernel, described
Second counter O reset.
5. interior internuclear sequential synchronous method according to claim 4, which is characterized in that first kernel use first
The second core clock that core clock and the second kernel use is homologous clock.
6. interior internuclear sequential synchronous method according to claim 1, which is characterized in that described first interrupts and the second interruption
It is internuclear interruption.
7. it is a kind of using it is of any of claims 1-6 it is described in the data that carry out data transmission of internuclear sequential synchronous method pass
Transmission method characterized by comprising
Synchronize first kernel and the second kernel；
First kernel acquires data in the first starting point of each first calculating cycle, the second of second calculating cycle
The acquisition data are transmitted to second kernel and send described second and interrupted by starting point；
Second kernel receives second interruption and the acquisition data, carries out data processing to the acquisition data.
8. data transmission method according to claim 7, which is characterized in that first kernel and the second kernel use core
Between bus carry out data transmission.
9. a kind of computer readable storage medium, is stored thereon with computer program, which is characterized in that the program is held by processor
Such as method as claimed in any one of claims 1 to 6 is realized when row.
10. a kind of computer readable storage medium, is stored thereon with computer program, which is characterized in that the program is by processor
Method as claimed in claim 7 or 8 is realized when execution.
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