CN109385650A - The manufacturing method and its device of a kind of through-silicon via structure, through-silicon via structure - Google Patents
The manufacturing method and its device of a kind of through-silicon via structure, through-silicon via structure Download PDFInfo
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- CN109385650A CN109385650A CN201710674721.4A CN201710674721A CN109385650A CN 109385650 A CN109385650 A CN 109385650A CN 201710674721 A CN201710674721 A CN 201710674721A CN 109385650 A CN109385650 A CN 109385650A
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D15/00—Electrolytic or electrophoretic production of coatings containing embedded materials, e.g. particles, whiskers, wires
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/38—Electroplating: Baths therefor from solutions of copper
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
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Abstract
The invention discloses a kind of through-silicon via structures, and including the through silicon via being set on silicon wafer, copper electroplated layer is filled in the through silicon via, the nano particle that thermal expansion coefficient is lower than copper is dispersed in the copper electroplated layer.The through-silicon via structure good heat dissipation effect, can reduce thermal stress, effectively extend the service life of chip.The present invention further correspondingly provides device used in the manufacturing method and manufacturing method of a kind of above-mentioned through-silicon via structure, the manufacturing method is by adding nano particle into electroplate liquid, copper is reduced and coats nano particle wherein, the evenly dispersed nano particle in copper electroplated layer in cathode in the plating process.It can get the finely dispersed copper electroplated layer of nano particle by the manufacturing method, obtain that heat dissipation effect is more preferable, the more uniform through-silicon via structure of performance.
Description
Technical field
The present invention relates to integrated antenna package technical fields, and in particular to the system of a kind of through-silicon via structure, through-silicon via structure
Make method and device thereof.
Background technique
Integrated circuit technique is fast-developing with Moore's Law, and higher circuit integration density has expedited the emergence of higher interconnection
Density, and bring comprehensive change in post-channel interconnection mode and encapsulation technology.With through silicon via (Through Silicon Via,
TSV it) is mutually linked as the three-dimensionally integrated of core and is encapsulated into the inevitable choice for promoting device performance and cost performance.TSV technology is a kind of
It is directed through silicon wafer itself and realizes the vertically interconnection between stacked chips, form the side of density three-dimensional integrated chip
Method, the technology have many merits such as " high density, multi-functional, small sizes ".
TSV bore dia is usually some tens of pm, and depth-to-width ratio is up to 10~20, usually using copper as filler material.Since TSV is filled out
It fills outside copper and hole and there are problems that thermal expansion coefficient (CTE) mismatch between silicon materials, when TSV structure region heat increases in device
When (heat may be from being on active service in TSV structure spontaneous heating as signal path, also may be from Environmental Heat Source), due to TSV structure
Thermal and mechanical stress caused by material C TE mismatch is further exacerbated by region, is usually expressed as copper expansion, increases chip local delamination
Risk may finally lead to component failure.Therefore, reduce the damage of TSV thermal stress bring to be a problem to be solved.
It in order to solve this problem, is all to consider to reduce the temperature around TSV structure from the mode of external cooling at present, from
And reduce the degree of thermal mismatching.However, the method for external cooling is at high cost, and heat dissipation effect is unsatisfactory.Therefore, it is necessary to open
It is more preferable to send out heat dissipation effect a kind of, the lower TSV structure of cost, after avoiding TSV filling copper heated outward between expansion damage chip
Tie point.
Summary of the invention
It is an object of the present invention to overcome the shortcomings of to mention in background above technology and defect, a kind of heat dissipation effect is provided
It is good, it radiates at low cost, can effectively extend the through-silicon via structure of chip service life, and accordingly provide a kind of through silicon via
Manufacturing device used in the manufacturing method of structure and the manufacturing method, the manufacturing approach craft is simple, nano particle dispersion is equal
Even, which is simple and convenient to operate.
In order to solve the above technical problems, technical solution proposed by the present invention are as follows:
A kind of through-silicon via structure is filled with copper electroplated layer including the through silicon via being set on silicon wafer in the through silicon via, described
The nano particle that thermal expansion coefficient is lower than copper is dispersed in copper electroplated layer.Due to being deposited between the silicon materials outside filling copper and through silicon via
The coefficient of thermal expansion mismatch the problem of, when the heat in through-silicon via structure region in device increases, the thermal stress in through silicon via adds
Play is usually expressed as copper expansion, increases chip local delamination risk, may finally lead to component failure.The present invention passes through in silicon
Copper electroplated layer is filled in through-hole, and disperses nano particle of the thermal expansion coefficient lower than copper in copper electroplated layer, when through silicon via knot
When the heat in structure region increases, the copper in through silicon via can internally squeeze nano particle, and thermal stress is transferred to nano particle, by
It is lower than copper in the thermal expansion coefficient of the nano particle, the degree expanded outward after heated is smaller than copper, so as to reduce through silicon via
The interior thermal stress of structure reaches the active force for reducing the tie point that material in through silicon via is expanded outward between extruding chip, extends
The purpose of chip service life.Copper generates thermal stress under high temperature and the schematic diagram squeezed to nano particle is as shown in Figure 3.
Above-mentioned through-silicon via structure, it is preferred that the nano particle is Al2O3Nano particle, SiC nano particle, Ag nanometers
One of particle is a variety of, and by the nano particle of the dispersion different materials in copper electroplated layer, thermal stress not only can be absorbed,
And the otherwise performance of through-silicon via structure can be improved, if the hardness of through silicon via can be improved in SiC nano particle, and Ag receives
The conductivity of through silicon via can be improved in rice grain.The average grain diameter of nano particle is preferably 35nm~45nm.Partial size is too small to lead
Cause nano particle that can not play expected function；And partial size too greatly then will lead to nano particle enter through silicon via channel by
Resistance.Comprehensively consider, selects average grain diameter more appropriate for the nano particle of 35nm~45nm.
As a general technical idea, another aspect of the present invention provides a kind of manufacturer of above-mentioned through-silicon via structure
Method, comprising the following steps:
S1, it will be pre-processed in the basic electroplate liquid of silicon wafer immersion with through silicon via；
S2, the nanometer prepared containing thermal expansion coefficient lower than the nano particle of copper are co-deposited electroplate liquid；
S3, the co-deposition electroplate liquid of nanometer described in basis electroplate liquid described in step S1 and step S2 is mixed in electroplating bath
Close, form mixing electroplate liquid, will the silicon wafer that basic electroplate liquid is impregnated with obtained by step S1 immerse in mixing electroplate liquid and with plating
The cathode of slot connects, and forms electroplating cathode, galvanic anode is copper anode；
S4, unlatching electroplating power supply are electroplated, and copper ion deposition reaction, nano particle and copper ion one are carried out on silicon wafer
With being filled into the through silicon via of silicon wafer, copper ion is reduced into metallic copper, is dispersed with thermal expansion coefficient inside formation in through silicon via
Lower than copper nano particle electroplated layer to get through-silicon via structure.
In the plating process, the copper ion in electroplate liquid is coated on around nano particle, is received under the action of electric field force
Rice grain makees electrophoresis motion to cathode with cation；After nano particle reaches cathode, copper ion quilt on it is coated
It is reduced into metallic copper, and nano particle is buried on cathode.Finally, nano particle is uniformly distributed in cathode electroplated layer (silicon is logical
Copper electroplated layer in pore structure) in.The internal copper electricity for being evenly distributed with nano particle is obtained by the above method with can be convenient
Coating, it is ensured that the effect and consistency of nanoparticle absorbance thermal stress.
Above-mentioned manufacturing method, it is preferred that in the step S1, the silicon wafer with through silicon via is immersed in basic electroplate liquid
It carrying out pretreated method particularly includes: the silicon wafer with through silicon via, which is placed on dressing, to be had in the closed container of basic electroplate liquid,
To vacuumize process is carried out in closed container, make the infiltration of basic electroplate liquid into through silicon via, be then allowed to stand processing 10min~
60min makes the chemical component in basic electroplate liquid reach preliminary adsorption equilibrium in the inner surface of through silicon via.
Above-mentioned manufacturing method, it is furthermore preferred that it is described basis electroplate liquid in include 190g/L~200g/L copper sulphate,
The brightener of the inhibitor of 2.7g/L~2.8g/L, the accelerator of 0.8g/L~1.0g/L and 0.8g/L~1.0g/L.
Above-mentioned manufacturing method, it is preferred that in the step S4, ultrasonic-frequency power supply is opened while being electroplated, is utilized
Vltrasonic device applies ultrasonic action into through silicon via, and ultrasonic frequency is 30kHz~40kHz, and ultrasonic power is 80W~100W.
It can play the role of stirring liquid by ultrasonic action, the mobility of electroplate liquid be improved, in favor of copper ion and nanometer
Grain improves electroplating efficiency to cathode motion.
Above-mentioned manufacturing method, it is preferred that the nano particle is Al2O3Nano particle, SiC nano particle, Ag nanometers
One of grain is a variety of.
Above-mentioned manufacturing method, it is preferred that in the step S2, it includes 190g/L that the nanometer, which is co-deposited in electroplate liquid,
The sulfuric acid of~200g/L, the hydrochloric acid of 0.04g/L~0.06g/L, the accelerator of 0.8g/L~0.9g/L, 2.6g/L~2.8g/L
The surface-active of inhibitor, the leveling agent of 0.8g/L~1.0g/L, the nano particle of 4g/L~6g/L, 0.04g/L~0.06g/L
The boric acid of agent and 38g/L~42g/L；The nanometer is co-deposited the specific preparation method of electroplate liquid are as follows: by nanoparticle powder, sulphur
Acid, hydrochloric acid, accelerator, inhibitor, leveling agent, surfactant and boric acid are add to deionized water, and are sufficiently stirred, that is, are prepared
Electroplate liquid is co-deposited at nanometer.
Above-mentioned manufacturing method, it is preferred that in the step S3, the pH of the mixing electroplate liquid is 3.5~4.5；It is described
In step S4, the current density of electroplating process is 0.4A/dm2~0.6A/dm2.Electric current is the main excitation of plating, by faraday
Law is it is found that current density size is directly proportional to plating amount；If electric current is too small, rate of deposition is slow；If but electric current is too big, is easy
Filling defect is formed in through silicon via, such as is formed hole, gap or held mouth under the arm.Therefore, comprehensively consider and current density control exists
0.4A/dm2~0.6A/dm2, rate of deposition both can be improved, in turn, ensure that filling quality.
As a general technical idea, the present invention correspondingly additionally provides a kind of dress of manufacture used in above-mentioned manufacturing method
It sets, including electroplating bath, electroplating power supply, galvanic anode, electroplating cathode, ultrasonic amplitude transformer, ultrasonic-frequency power supply, energy converter and controller,
The galvanic anode, electroplating cathode and ultrasonic amplitude transformer are inserted into the electroplating bath, galvanic anode and electroplating cathode respectively with
The anode of the electroplating power supply is connected with cathode, and the ultrasonic-frequency power supply is connect with the energy converter, energy converter and ultrasonic amplitude of fluctuation
Bar is connected, and electroplating power supply and ultrasonic-frequency power supply are connected with the controller.
Compared with the prior art, the advantages of the present invention are as follows:
(1) nano particle that the present invention is lower than copper by dispersing thermal expansion coefficient in the copper electroplated layer of through-silicon via structure,
The nano particle can absorb the thermal stress that copper is generated by coefficient of thermal expansion mismatch in through silicon via, and thermal stress is made to act on through silicon via
Internal structure extends the service life of chip to avoid the tie point between outside expansion damage chip.
(2) present invention can reduce heat inside through silicon via by the nano particle of the addition different materials in copper electroplated layer
While stress, it can also enhance other performances of through-silicon via structure, for example, using SiC that can not only reduce heat as nano particle
Stress, and the hardness of through-silicon via structure can be improved.
(3) nano particle that the manufacturing method of the present invention is lower than copper by adding thermal expansion coefficient in electroplate liquid, in table
Copper ion is coated on around nano particle under the action of the activating agent of face, under electric field action nano particle and copper ion together to
Chip (cathode) moves, and the copper ion around nano particle is reduced to metallic copper after reaching cathode in through silicon via, and will receive
Rice grain coats wherein, is dispersed in nano particle in copper electroplated layer, nano particle can be made uniform by the above method
It is dispersed in through-silicon via structure.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is the present invention
Some embodiments for those of ordinary skill in the art without creative efforts, can also basis
These attached drawings obtain other attached drawings.
Fig. 1 is the schematic diagram of through-silicon via structure of the present invention.
Fig. 2 is the structural schematic diagram of manufacturing device of the present invention.
Fig. 3 is the schematic diagram that copper generates thermal stress and squeezes to nano particle at high temperature.
Marginal data:
1, electroplating bath；2, electroplating power supply；3, galvanic anode；4, electroplating cathode；5, ultrasonic amplitude transformer.
Specific embodiment
To facilitate the understanding of the present invention, the present invention is made below in conjunction with Figure of description and preferred embodiment more complete
Face meticulously describes, but the protection scope of the present invention is not limited to the following specific embodiments.
It should be strongly noted that when to be described as " be fixed on, be fixed in, be connected to or be connected to " another for a certain element
When on element, it can be directly fixed, affixed, connection or is connected on another element, be also possible to by connecting among other
Fitting is indirectly fixed, affixed, connects or is connected on another element.
Unless otherwise defined, all technical terms used hereinafter and the normally understood meaning of those skilled in the art
It is identical.Technical term used herein is intended merely to the purpose of description specific embodiment, is not intended to the limitation present invention
Protection scope.
Unless otherwise specified, various raw material, reagent, the instrument and equipment etc. used in the present invention can pass through city
Field is commercially available or can be prepared by existing method.
Embodiment 1:
As shown in Figure 1, a kind of through-silicon via structure of the invention, which includes the through silicon via on silicon wafer,
And copper electroplated layer is filled in through silicon via, it is evenly dispersed in the copper electroplated layer to have α phase Al2O3Nano particle (thermal expansion coefficient
Lower than copper).α phase Al2O3The average grain diameter of nano particle is 40nm.
The manufacturing method of the through-silicon via structure is as follows:
Step 1: preparing basic electroplate liquid
Copper sulphate, inhibitor, accelerator, brightener etc. are added in deionized water, are sufficiently stirred, basis of formation plating
Liquid, it is spare, copper sulphate in basic electroplate liquid, inhibitor, accelerator and brightener concentration be respectively 195g/L, 2.7g/L,
0.9g/L and 0.9g/L；
Step 2: silicon wafer pre-processes
Silicon wafer with through silicon via is placed in closed container, the above-mentioned basic electroplate liquid of filling in container, to the container into
Row vacuumize process makes basic electroplate liquid infiltration into through silicon via；Then 30min is placed, the ingredient in basic electroplate liquid is made to exist
Through silicon via inner surface reaches preliminary adsorption equilibrium；
Step 3: preparation of nano is co-deposited electroplate liquid
Take suitable α phase Al2O3Nanoparticle powder, boric acid, surfactant, sulfuric acid, hydrochloric acid, accelerator, inhibitor and whole
Flat agent is dissolved in deionized water, is sufficiently stirred, and is obtained nanometer and is co-deposited electroplate liquid, this nanometer is co-deposited the ingredient such as table of electroplate liquid
Shown in 1；
Step 4: group loading electrode
Basic electroplate liquid and nanometer are co-deposited electroplate liquid to mix in electroplating bath, mixing electroplate liquid is formed, will soak
Profit has the silicon wafer of basic electroplate liquid to take out from closed container, immerses in mixing electroplate liquid and connect with the cathode of electroplating bath, shape
At electroplating cathode, galvanic anode is copper anode；
Step 5: plating
Electroplating power supply is opened, setting current density is 0.5A/dm2, make to carry out copper ion deposition reaction on the silicon wafer of cathode；
It is 90W, supersonic frequency 35kHz that ultrasonic power is arranged simultaneously, and opens ultrasonic-frequency power supply, is motivated by ultrasound to applying in through silicon via；
In electroplating process, copper ion is coated on around nano particle under the action of surfactant, work of the nano particle in electric field
Make electrophoresis motion to silicon wafer (cathode) with copper ion under, after nanoparticle reaches cathode, is coated on nanoparticle week
The copper ion enclosed is reduced into metal, and nanoparticle is buried on silicon wafer, forms the internal electroplated layer for being dispersed with nanoparticle,
Through silicon via is filled, that is, completes the manufacture of through-silicon via structure.The through-silicon via structure at high temperature copper generate thermal stress and to
The schematic diagram that nano particle squeezes is as shown in Figure 3.
Nanometer is co-deposited the component list of electroplate liquid in 1 the present embodiment of table
| Sulfuric acid | Hydrochloric acid | Accelerator | Inhibitor | Leveling agent | Nano particle | Surfactant | Boric acid |
| 195g/L | 0.05g/L | 0.9g/L | 2.7g/L | 0.9g/L | 5g/L | 0.05g/L | 40g/L |
Manufacturing device used in the manufacturing method of the present embodiment, the structure of the manufacturing device is as shown in Fig. 2, main includes electricity
Coating bath 1, electroplating power supply 2, galvanic anode 3, electroplating cathode 4, ultrasonic amplitude transformer 5, ultrasonic-frequency power supply (not shown), energy converter
(not shown) and controller (not shown).Wherein, galvanic anode 3, electroplating cathode 4 and ultrasonic amplitude transformer 5 are inserted into
In electroplating bath 1, mixing electroplate liquid is held in electroplating bath 1.Galvanic anode 3 and electroplating cathode 4 respectively with the anode of electroplating power supply 2 and
Cathode is connected, and is powered by electroplating power supply 2 for it.Ultrasonic-frequency power supply is connect with energy converter, the upper end of energy converter and ultrasonic amplitude transformer 5
It is connected.Electroplating power supply 2 and ultrasonic-frequency power supply are connected with controller, and controller connects computer.Controller controls electroplating power supply 2
With opening or closing for ultrasonic-frequency power supply, ultrasonic amplitude transformer 5 increases the flowing of electroplate liquid for driving electroplate liquid to do high-frequency vibration
Property.
Embodiment 2:
As shown in Figure 1, a kind of through-silicon via structure of the invention, which includes the through silicon via on silicon wafer,
And copper electroplated layer is filled in through silicon via, it is evenly dispersed in the copper electroplated layer to have SiC nano particle (thermal expansion coefficient is lower than
Copper).The average grain diameter of the SiC nano particle is 35nm.
The manufacturing method of the through-silicon via structure is as follows:
Step 1: preparing basic electroplate liquid
Copper sulphate, inhibitor, accelerator, brightener etc. are added in deionized water, are sufficiently stirred, basis of formation plating
Liquid, it is spare, copper sulphate in basic electroplate liquid, inhibitor, accelerator and brightener concentration be respectively 190g/L, 2.7g/L,
0.8g/L and 0.8g/L；
Step 2: silicon wafer pre-processes
Silicon wafer with through silicon via is placed in closed container, the above-mentioned basic electroplate liquid of filling in container, to the container into
Row vacuumize process makes basic electroplate liquid infiltration into through silicon via；Then 40min is placed, the ingredient in basic electroplate liquid is made to exist
Through silicon via inner surface reaches preliminary adsorption equilibrium；
Step 3: preparation of nano is co-deposited electroplate liquid
Take suitable SiC nanoparticle powder, boric acid, surfactant, sulfuric acid, hydrochloric acid, accelerator, inhibitor and leveling agent
It is dissolved in deionized water, is sufficiently stirred, obtain nanometer and be co-deposited electroplate liquid, this nanometer is co-deposited ingredient such as 2 institute of table of electroplate liquid
Show；
Step 4: group loading electrode
Basic electroplate liquid and nanometer are co-deposited electroplate liquid to mix in electroplating bath, mixing electroplate liquid is formed, will soak
Profit has the silicon wafer of basic electroplate liquid to take out from closed container, immerses in mixing electroplate liquid and connect with the cathode of electroplating bath, shape
At electroplating cathode, galvanic anode is copper anode；
Step 5: plating
Electroplating power supply is opened, setting current density is 0.6A/dm2, make to carry out copper ion deposition reaction on the silicon wafer of cathode；
It is 100W, supersonic frequency 40kHz that ultrasonic power is arranged simultaneously, and opens ultrasonic-frequency power supply, is motivated by ultrasound to applying in through silicon via；
In electroplating process, copper ion is coated on around nano particle under the action of surfactant, work of the nano particle in electric field
Make electrophoresis motion to silicon wafer (cathode) with copper ion under, after nanoparticle reaches cathode, is coated on nanoparticle week
The copper ion enclosed is reduced into metal, and nanoparticle is buried on silicon wafer, forms the internal electroplated layer for being dispersed with nanoparticle,
Through silicon via is filled, that is, completes the manufacture of through-silicon via structure.
Nanometer is co-deposited the component list of electroplate liquid in 2 the present embodiment of table
| Sulfuric acid | Hydrochloric acid | Accelerator | Inhibitor | Leveling agent | Nano particle | Surfactant | Boric acid |
| 190g/L | 0.06g/L | 0.8g/L | 2.8g/L | 0.8g/L | 4g/L | 0.06g/L | 38g/L |
The foregoing is only a preferred embodiment of the present invention, is not intended to restrict the invention, for the skill of this field
For art personnel, the invention may be variously modified and varied.All within the spirits and principles of the present invention, made any to repair
Change, equivalent replacement, improvement etc., should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of through-silicon via structure, including the through silicon via being set on silicon wafer, which is characterized in that filled with copper electricity in the through silicon via
Coating is dispersed with the nano particle that thermal expansion coefficient is lower than copper in the copper electroplated layer.
2. through-silicon via structure according to claim 1, which is characterized in that the nano particle is Al2O3Nano particle, SiC
One of nano particle, Ag nano particle are a variety of；The average grain diameter of nano particle is 35nm~45nm.
3. a kind of manufacturing method of through-silicon via structure as claimed in claim 1 or 2, comprising the following steps:
S1, it will be pre-processed in the basic electroplate liquid of silicon wafer immersion with through silicon via；
S2, the nanometer prepared containing thermal expansion coefficient lower than the nano particle of copper are co-deposited electroplate liquid；
S3, the co-deposition electroplate liquid of nanometer described in basis electroplate liquid described in step S1 and step S2 is mixed in electroplating bath,
Form mixing electroplate liquid, will the silicon wafer that basic electroplate liquid is impregnated with obtained by step S1 immerse in mixing electroplate liquid and with electroplating bath
Cathode connection, forms electroplating cathode, galvanic anode is copper anode；
S4, unlatching electroplating power supply are electroplated, and copper ion deposition reaction are carried out on silicon wafer, nano particle and copper ion are filled out together
It is charged in the through silicon via of silicon wafer, copper ion is reduced into metallic copper, is dispersed with thermal expansion coefficient inside formation in through silicon via and is lower than
The electroplated layer of the nano particle of copper is to get through-silicon via structure.
4. manufacturing method according to claim 3, which is characterized in that in the step S1, the silicon wafer of through silicon via will be had
It is carried out in the basic electroplate liquid of immersion pretreated method particularly includes:
Silicon wafer with through silicon via, which is placed on dressing, to be had in the closed container of basic electroplate liquid, true to carrying out taking out in closed container
Vacancy reason makes basic electroplate liquid infiltration into through silicon via, is then allowed to stand processing 10min~60min, makes the change in basic electroplate liquid
The inner surface studied point in through silicon via reaches preliminary adsorption equilibrium.
5. manufacturing method according to claim 4, which is characterized in that it is described basis electroplate liquid in include 190g/L~
The copper sulphate of 200g/L, the inhibitor of 2.7g/L~2.8g/L, 0.8g/L~1.0g/L accelerator and 0.8g/L~1.0g/L
Brightener.
6. manufacturing method according to claim 3, which is characterized in that in the step S4, opened while being electroplated
Ultrasonic-frequency power supply is opened, applies ultrasonic action into through silicon via using Vltrasonic device, ultrasonic frequency is 30kHz~40kHz, ultrasonic function
Rate is 80W~100W.
7. manufacturing method according to claim 3, which is characterized in that the nano particle is Al2O3Nano particle, SiC receive
One of rice grain, Ag nano particle are a variety of.
8. manufacturing method according to claim 3, which is characterized in that in the step S2, the nanometer is co-deposited plating
Include in liquid the sulfuric acid of 190g/L~200g/L, the hydrochloric acid of 0.04g/L~0.06g/L, 0.8g/L~0.9g/L accelerator,
The inhibitor of 2.6g/L~2.8g/L, the leveling agent of 0.8g/L~1.0g/L, the nano particle of 4g/L~6g/L, 0.04g/L~
The surfactant of 0.06g/L and the boric acid of 38g/L~42g/L；
The nanometer is co-deposited the specific preparation method of electroplate liquid are as follows: by nanoparticle powder, sulfuric acid, hydrochloric acid, accelerator, inhibition
Agent, leveling agent, surfactant and boric acid are add to deionized water, and are sufficiently stirred, that is, are configured to nanometer and are co-deposited electroplate liquid.
9. the manufacturing method according to any one of claim 3~8, which is characterized in that in the step S3, the mixing
The pH of electroplate liquid is 3.5~4.5；In the step S4, the current density of electroplating process is 0.4A/dm2~0.6A/dm2。
10. manufacturing device used in a kind of manufacturing method as described in any one of claim 3~9, which is characterized in that including
Electroplating bath (1), electroplating power supply (2), galvanic anode (3), electroplating cathode (4), ultrasonic amplitude transformer (5), ultrasonic-frequency power supply, energy converter and
Controller, the galvanic anode (3), electroplating cathode (4) and ultrasonic amplitude transformer (5) are inserted into the electroplating bath (1), plating sun
Pole (3) and electroplating cathode (4) are connected with the anode and cathode of the electroplating power supply (2) respectively, the ultrasonic-frequency power supply with it is described
Energy converter connection, energy converter are connected with ultrasonic amplitude transformer (5), and electroplating power supply (2) and ultrasonic-frequency power supply are connected with the controller
It connects.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710674721.4A CN109385650A (en) | 2017-08-09 | 2017-08-09 | The manufacturing method and its device of a kind of through-silicon via structure, through-silicon via structure |
Applications Claiming Priority (1)
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