CN109379115A - A kind of beam control device - Google Patents
A kind of beam control device Download PDFInfo
- Publication number
- CN109379115A CN109379115A CN201811194699.4A CN201811194699A CN109379115A CN 109379115 A CN109379115 A CN 109379115A CN 201811194699 A CN201811194699 A CN 201811194699A CN 109379115 A CN109379115 A CN 109379115A
- Authority
- CN
- China
- Prior art keywords
- interface
- fpga
- processor
- control terminal
- cpld
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
- H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
- H04B7/0413—MIMO systems
- H04B7/0426—Power distribution
- H04B7/043—Power distribution using best eigenmode, e.g. beam forming or beam steering
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Radar Systems Or Details Thereof (AREA)
Abstract
The present invention proposes a kind of beam control device, including FPGA processor, CPLD processor, arm processor, interface end, control terminal and the calibration data memory for connecting FPGA processor;The control terminal is provided with the FPGA interface of connection FPGA and the CPLD interface of several connection CPLD processors;Arm processor connecting interface end and FPGA;The power supply interface and the communication interface outside connection that the interface end is provided with connection control terminal;The interface end and control terminal are the plate objects of two parallel arrangements.The present invention passes through the interface end and control terminal of parallel arrangement, so that apparatus structure is simply light and handy, while FPGA processor can realize the miniaturization of beam control device with the connection of plurality of devices.
Description
Technical field
The present invention relates to wireless communication technology field more particularly to a kind of beam control devices.
Background technique
The most significant feature of Phased Array Radar Antenna is that antenna beam scanning is realized in the case that antenna array is motionless, phased
The quick scanning of array antenna wave beam and the agile ability of beam shape are that phased-array radar has height to working environment, target environment
The technical foundation of adaptive ability is spent, their realization all relies on beam control device.Existing tradition multi-beam control dress
Set that structure is complicated, for device at valuableness, maintenance cost is high.
Summary of the invention
To solve the above problems, the present invention proposes a kind of beam control device, structure is simply light and handy, and manufacturing cost is low, dimension
Shield is easy.
Technical solution: the present invention proposes at a kind of beam control device, including FPGA processor, CPLD processor, ARM
Manage device, interface end, control terminal and the calibration data memory for connecting FPGA processor;The control terminal is provided with connection FPGA's
The CPLD interface of FPGA interface and several connection CPLD processors;Arm processor connecting interface end and FPGA;The interface
The power supply interface and the communication interface outside connection that end is provided with connection control terminal;The interface end is two parallel with control terminal
The plate object of arrangement.
Further, analog-digital converter interface is additionally provided in the control terminal.
Further, the beam control device further includes the calibration data memory for connecting FPGA
Further, the CPLD interface is distributed in around FPGA interface.
Further, bandpass filter, power splitter, combiner, duplexer and variable gain are additionally provided in the interface end
Amplifier.
The utility model has the advantages that the present invention passes through the interface end and control terminal of parallel arrangement, so that apparatus structure is simply light and handy, simultaneously
FPGA processor can realize the miniaturization of beam control device with the connection of plurality of devices.
Detailed description of the invention
Fig. 1 is the structural diagram of the present invention.
Specific embodiment
Such as Fig. 1, the present invention proposes a kind of beam control device, including FPGA processor, CPLD processor, ARM processing
Device, interface end, control terminal and the calibration data memory for connecting FPGA processor.The interface end is provided with connection control terminal
Power supply interface and connection outside communication interface, for phased-array radar signal transmitting-receiving and power supply is provided.
The control terminal is for generating and receiving and dispatching Time series signal.The control terminal is provided with connection FPGA processor
The CPLD interface of FPGA interface and several connection CPLD processors.CPLD processor is more suitable for completing various algorithms and combination is patrolled
Volume, FPGA processor is more suitable for completing sequential logic;CPLD processor uses more convenient than FPGA processor.At CPLD
The programming for managing device uses E2PROM or FASTFLASH technology, is not necessarily to external memory chip, using simple, and FPGA processor
Programming information need to be stored on external memory, application method is complicated.Therefore FPGA processor data described in the present embodiment
For receiving and parsing, parsing is directed toward according to antenna beam and obtains the wave beam control code of radio-frequency channel, from calibration data memory
It reads the calibration data to compensate wave beam control code, and compensated wave beam control code is issued to radio-frequency channel;Institute
CPLD processor is stated as data drive unit.Several CPLD interfaces are distributed in around FPGA interface, so that at FPGA
The arrangement for managing device and CPLD processor is more reasonable, facilitates the wiring communication of FPGA processor and CPLD processor.
In order to reduce FPGA processor 3 data processing amount the present embodiment arm processor connecting interface end and FPGA at
Device is managed, obtains the beam position of Phased Array Radar Antenna for parsing.
The interface end and control terminal are the plate objects of two parallel arrangements.This structure will be the mould with function of supplying power
Block and the data processing module for having FPGA processor are designed to two circuit boards of parallel arrangement, rationally distributed to save sky
Between, prevent the electromagnetic interference between strong and weak electricity.
The analog-digital converter interface for external digital analog converter is additionally provided in the control terminal.
Bandpass filter, power splitter, combiner, duplexer and variable gain amplifier are additionally provided in the interface end.
The bandpass filter connects the duplexer, and the variable gain amplifier connects the combiner and the power splitter.It will
Bandpass filter, power splitter, combiner, duplexer, variable gain amplifier integrated installation meet functional requirement in interface end
While, save space.
Claims (4)
1. a kind of beam control device, it is characterised in that: including FPGA processor, CPLD processor, ARM processor, interface
End, control terminal and the calibration data memory for connecting FPGA processor;The control terminal is provided with connection FPGA processor
The CPLD interface of FPGA interface and several connection CPLD processors;Arm processor connecting interface end and FPGA processor;Institute
State the power supply interface and the communication interface outside connection that interface end is provided with connection control terminal;The interface end and control terminal are two
The plate object of a parallel arrangement.
2. beam control device according to claim 1, it is characterised in that: be additionally provided with analog-to-digital conversion in the control terminal
Device interface.
3. beam control device according to claim 1, it is characterised in that: the CPLD interface is distributed in FPGA interface
Around.
4. beam control device according to claim 1 to 3, it is characterised in that: also set up in the interface end
There are bandpass filter, power splitter, combiner, duplexer and variable gain amplifier.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811194699.4A CN109379115A (en) | 2018-10-15 | 2018-10-15 | A kind of beam control device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811194699.4A CN109379115A (en) | 2018-10-15 | 2018-10-15 | A kind of beam control device |
Publications (1)
Publication Number | Publication Date |
---|---|
CN109379115A true CN109379115A (en) | 2019-02-22 |
Family
ID=65397876
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201811194699.4A Pending CN109379115A (en) | 2018-10-15 | 2018-10-15 | A kind of beam control device |
Country Status (1)
Country | Link |
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CN (1) | CN109379115A (en) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
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CN202748643U (en) * | 2012-06-20 | 2013-02-20 | 北京神州飞航科技有限责任公司 | Multifunctional serial communication card |
US20130282945A1 (en) * | 2012-04-19 | 2013-10-24 | Lockheed Martin Corporation | Apparatus and method emulating a parallel interface to effect parallel data transfer from serial flash memory |
CN107454742A (en) * | 2016-04-01 | 2017-12-08 | 三星电子株式会社 | Printed circuit board (PCB) and the electronic installation including the printed circuit board (PCB) |
CN206833184U (en) * | 2017-05-11 | 2018-01-02 | 北京航天耐特科技有限公司 | Interface module for microcontroller |
CN207200595U (en) * | 2017-07-24 | 2018-04-06 | 太仓永瑞检测装备科技有限公司 | Three-level PWM rectifier overall-in-one control schema platform based on DSP and FPGA |
CN207867291U (en) * | 2018-01-30 | 2018-09-14 | 北京极创智杰科技有限公司 | Circuit master control borad |
-
2018
- 2018-10-15 CN CN201811194699.4A patent/CN109379115A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20130282945A1 (en) * | 2012-04-19 | 2013-10-24 | Lockheed Martin Corporation | Apparatus and method emulating a parallel interface to effect parallel data transfer from serial flash memory |
CN202748643U (en) * | 2012-06-20 | 2013-02-20 | 北京神州飞航科技有限责任公司 | Multifunctional serial communication card |
CN107454742A (en) * | 2016-04-01 | 2017-12-08 | 三星电子株式会社 | Printed circuit board (PCB) and the electronic installation including the printed circuit board (PCB) |
CN206833184U (en) * | 2017-05-11 | 2018-01-02 | 北京航天耐特科技有限公司 | Interface module for microcontroller |
CN207200595U (en) * | 2017-07-24 | 2018-04-06 | 太仓永瑞检测装备科技有限公司 | Three-level PWM rectifier overall-in-one control schema platform based on DSP and FPGA |
CN207867291U (en) * | 2018-01-30 | 2018-09-14 | 北京极创智杰科技有限公司 | Circuit master control borad |
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Application publication date: 20190222 |