CN109375958A - A kind of firmware loading method and circuit board - Google Patents

A kind of firmware loading method and circuit board Download PDF

Info

Publication number
CN109375958A
CN109375958A CN201811100749.8A CN201811100749A CN109375958A CN 109375958 A CN109375958 A CN 109375958A CN 201811100749 A CN201811100749 A CN 201811100749A CN 109375958 A CN109375958 A CN 109375958A
Authority
CN
China
Prior art keywords
firmware
chip
processor
memory
sent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201811100749.8A
Other languages
Chinese (zh)
Inventor
张标
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ruijie Networks Co Ltd
Original Assignee
Ruijie Networks Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ruijie Networks Co Ltd filed Critical Ruijie Networks Co Ltd
Priority to CN201811100749.8A priority Critical patent/CN109375958A/en
Publication of CN109375958A publication Critical patent/CN109375958A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/445Program loading or initiating
    • G06F9/44521Dynamic linking or loading; Link editing at or after load time, e.g. Java class loading
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum

Abstract

The invention discloses a kind of firmware loading method and circuit boards.This method comprises: processor reads M firmware from memory, M firmware is sent to the first chip by processor, and the first chip determines that the first firmware corresponding with the first chip, the first chip load the first firmware to execute the first business from M firmware;M firmware is sent to the second chip by the first chip, and the second chip determines that the second firmware corresponding with the second chip, the second chip load second firmware to execute the second business from M firmware.In this way, it is not required to that more memory, firmware needed for a memory can store multiple chips is arranged on circuit board.Processor reads multiple firmwares from memory and is sent to each chip, and each chip determines suitable firmware from multiple firmwares and loads the firmware determined, to execute business.It is routed since the memory being arranged on circuit board is less, on circuit board simply, board area is without too big, reduction cost.

Description

A kind of firmware loading method and circuit board
Technical field
The present invention relates to electronic technology field, espespecially a kind of firmware loading method and circuit board.
Background technique
Firmware is the software for driving the component in the equipment to run in an equipment.It is exchange with the equipment For machine, the component in interchanger needs loading firmware, could work normally.In the prior art, there are multiple members in interchanger When device, the corresponding memory of a component, i.e., the firmware of one component is stored in corresponding with one component Memory in.
Continue by taking interchanger as an example, and by taking the component in interchanger is chip as an example, at present multiple cores in interchanger Each chip need to connect a memory in piece.When a chip needs loading firmware, from memory corresponding with the chip It is middle to read simultaneously loading firmware.
Inventor has found that the prior art has following defects that
In the prior art, memory and chip are all disposed on the circuit board in interchanger.When the chip in interchanger compared with When more, then the memory needed is also more, and then causes the component in interchanger on circuit board more, design cost compared with Height, and the area of circuit board is larger, and wiring (such as line between each chip and memory) is complicated, is easy error.
Summary of the invention
The embodiment of the present invention provides a kind of firmware loading method and circuit board, to solve core on circuit board in the prior art The problems such as when piece is more, the memory needed is more, leads to board design higher cost, and area is larger, and wiring is complicated.
In a first aspect, the embodiment of the present invention provides a kind of firmware loading method, it is applied to a circuit board, the circuit board packet It includes: processor, memory and N number of chip;The described method includes:
The processor reads M firmware from the memory;
The M firmware is sent to the first chip by the processor, and first chip is determined from the M firmware The first firmware corresponding with first chip, first chip load first firmware to execute the first business;
The M firmware is sent to the second chip by first chip, so that second chip is from the M firmware Middle determination the second firmware corresponding with second chip, and second firmware is loaded to execute the second business;
Wherein, N is the integer more than or equal to 2, and M is the integer more than or equal to N.
Optionally, first chip determines the first firmware corresponding with first chip, packet from the M firmware It includes:
First chip determines that corresponding with first chip first is solid according to firmware type from the M firmware Part.
It optionally, include cyclic redundancy check in first firmware;The method also includes:
After first chip is by cyclic redundancy check verification failure, sends and instruct to the processor;
The processor receives the instruction that first chip is sent, and it is solid to send described first to first chip again Part.
Optionally, the version of the M firmware stored in the memory is first version;The processor passes through outer Interface equipment in succession in portion's is stored with M firmware of the second edition in one equipment;The method also includes:
When the processor determines M firmware for needing to update the first version in the memory, set from one Standby middle M firmware for reading the second edition, and M firmware of the second edition of reading is stored in the memory In;Wherein, the second edition is higher than the first version.
Optionally, the processor is connect with first chip by first interface, first chip and described the Two chips are connected by second interface, and the first interface is identical as the second interface type.
Second aspect, the embodiment of the present invention provide a kind of circuit board, comprising: processor, memory and N number of chip;Its In, the memory is connected to the processor, and the processor is connect with the first chip in N number of chip, and described The other chips removed except first chip in one chip and N number of chip connect;
The memory, for storing M firmware;
The processor is sent to institute for reading the M firmware from the memory, and by the M firmware State the first chip;
First chip for determining the first firmware corresponding with first chip from the M firmware, and adds First firmware is carried to execute the first business;
First chip is also used to the M firmware being sent to the second chip, wherein second chip is described A chip in other chips;
Second chip for determining the second firmware corresponding with second chip from the M firmware, and adds Second firmware is carried to execute the second business;
Wherein, N is the integer more than or equal to 2, and M is the integer more than or equal to N.
Optionally, first chip is specifically used for: being determined and described first from the M firmware according to firmware type Corresponding first firmware of chip.
It optionally, include cyclic redundancy check in first firmware;First chip is also used to, and passes through the CRC check After code check failure, sends and instruct to the processor;The processor is also used to: receiving the finger that first chip is sent It enables, sends first firmware to first chip again.
Optionally, the version of the M firmware stored in the memory is first version;The processor passes through outer Interface equipment in succession in portion's is stored with M firmware of the second edition in one equipment;The processor is also used to: really When needing to update M firmware of the first version in the memory surely, the second edition is read from one equipment M firmware, and by M firmware of the second edition of reading storage in the memory;Wherein, the second edition Higher than the first version.
Optionally, the processor is connect with first chip by first interface, first chip and described the Two chips are connected by second interface, and the first interface is identical as the second interface type.
The present invention has the beneficial effect that:
In the present invention in the technical solution of embodiment, circuit board includes processor, memory and N number of chip.Memory M firmware is stored, M firmware includes the corresponding N number of firmware of N number of chip;Processor reads M firmware from memory;Processing M firmware is sent to the first chip by device, and the first chip determines the first firmware corresponding with the first chip from M firmware, the One chip loads the first firmware to execute the first business;M firmware is sent to the second chip by the first chip, and the second chip is from M Determine that the second firmware corresponding with the second chip, the second chip load the second firmware to execute the second business in a firmware.Pass through This mode does not need on circuit board that more memory is arranged, and a memory can store solid required for multiple chips Part.Processor reads multiple firmwares from memory, is sent to each chip, closes so that each chip is determined from multiple firmwares Suitable firmware, and the firmware determined is loaded, to execute business.Since the memory being arranged on circuit board is less, on circuit board Wiring is simple, and board area is without too big, saving design cost.
Detailed description of the invention
Fig. 1 is a kind of structural schematic diagram of the circuit board provided in the embodiment of the present invention;
Fig. 2 is a kind of flow diagram of the firmware loading method provided in the embodiment of the present invention;
Fig. 3 is the structural schematic diagram of a data frame of the firmware provided in the embodiment of the present invention;
Fig. 4 A is the schematic diagram of the sending method of the data frame in the embodiment of the present invention in firmware;
Fig. 4 B is the schematic diagram of the sending method of the data frame in the embodiment of the present invention in firmware;
Fig. 5 is a kind of structural schematic diagram of the circuit board provided in the embodiment of the present invention;
Fig. 6 is the structure chart of a kind of electronic equipment provided in an embodiment of the present invention.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with attached drawing to the present invention make into It is described in detail to one step, it is clear that the described embodiment is only a part of the embodiment of the present invention, instead of all the embodiments. Based on the embodiments of the present invention, obtained by those of ordinary skill in the art without making creative efforts all Other embodiments shall fall within the protection scope of the present invention.
The shapes and sizes of each component do not reflect actual proportions in attached drawing, and purpose is schematically illustrate the content of present invention.
It please refers to shown in Fig. 1, is a kind of structural schematic diagram of circuit board provided in an embodiment of the present invention.The circuit board can be with Applied in such as Ethernet switch, router, hub and other network communication equipments, the embodiment of the present invention is not limited It is fixed.
As shown in Figure 1, circuit board includes: memory 1, processor 2 and N number of chip, N is the integer more than or equal to 2. It for being integrated circuit (Integrated Circuit, IC) with chip, and is respectively first with N number of chip in Fig. 1 For IC, second IC, third IC, n-th IC (N number of IC altogether).
Optionally, processor 2 can be general central processing unit (Central Processing Unit, CPU) or spy Determine application integrated circuit (Application Specific Integrated Circuit, ASIC), can be one or more For controlling the integrated circuit of program execution.
Optionally, memory 1 may include high-speed random access memory, can also include nonvolatile storage, such as Disk memory, flush memory device or other non-volatile solid state memory parts etc., the embodiment of the present invention is not construed as limiting.
Optionally, chip can also be other chips in addition to IC, for example, can be digit chip, analog chip or its His chip.
Continuing with shown in Figure 1, memory 1 is connect with processor 2, and first IC in processor 2 and N number of chip connects It connects.First IC is connect with second IC, and the N-1 IC is connect with n-th IC.
Wherein, multiple firmwares are stored in memory 1.Illustratively, it can store N number of firmware in memory 1, In, each firmware in N number of firmware is corresponding with an IC.For example, the first firmware stored in memory 1 and first IC pairs It answers, the second firmware is corresponding with second IC, and N firmware is corresponding with n-th IC.Illustratively, in practical applications, memory 1 In can also store M firmware (M is more than or equal to N, and is integer more than or equal to 2), in N number of firmware in this M firmware Each firmware is corresponding with an IC.
For storing M firmware in memory 1, each chip loading firmware in circuit board shown in FIG. 1 is described below Process, it is specific as follows:
Processor 2 reads M firmware from memory 1, and M firmware is sent to first IC (processor 2 to first A IC sends the mode of M firmware, will introduce later).After first IC obtains M firmware, first is determined from M firmware The first firmware that a IC needs.Then, first IC continues for M firmware to be sent to second IC, and second IC is from N number of firmware The second firmware that second IC of middle determination needs.
Similar, after the N-1 IC receives the M firmware that the N-2 IC is sent, determine that N-1 is solid from M firmware Then M firmware is sent to n-th IC by part.
Optionally, processor 2 sends M firmware to first IC by first interface, and first IC passes through second interface M firmware is sent to second IC.First interface is identical with the type of second interface.For example, shown in Figure 1, first is connect Mouth may include clock transmission interface 1 (TX_CLK_1) and data transmission interface 2 (TX_DAT_1).When second interface may include Clock transmission interface 2 (TX_CLK_2) and data transmission interface 2 (TX_DAT_2).Pass through first interface to first about processor 2 A IC sends the process of M firmware, will introduce later.
Referring to FIG. 2, being a kind of flow diagram of firmware loading method provided in an embodiment of the present invention, this method can be with Applied in above-mentioned circuit board shown in FIG. 1 or similar circuit board.As shown in Fig. 2, this method comprises:
Step 201: processor 2 reads M firmware from memory 1.
Step 202: M firmware is sent to the first IC by processor 2, and the first IC is determined and the first IC pairs from M firmware The first firmware answered, the first IC load the first firmware to execute the first business.
Step 203: the first IC gives M firmware to the 2nd IC, so that determination is corresponding with the 2nd IC from M firmware by the 2nd IC The second firmware, and load the second firmware to execute the second business.
It, it is found that can be only in memory 1 by foregoing teachings please continue to refer to N number of IC is provided with shown in Fig. 1, on circuit board It stores N number of firmware (the corresponding IC of a firmware), also can store M firmware (M is greater than N).To be stored with M in memory 1 For a firmware.There are many modes when processor 2 reads firmware from memory 1.Mode one, processor 2 disposably will storages All firmwares (i.e. M firmware) are all read out in device 1, i.e. step 201.Mode two, processor 2 can only read M admittedly N number of firmware in part.For mode two, processor 2 can from M firmware the determination N number of firmware to be read, then read again The N number of firmware determined.Wherein, processor 2, can be according to firmware and IC from M firmware when the determination N number of firmware to be read Between corresponding relationship N number of firmware is selected from M firmware.For example, designer is when designing circuit board, can by firmware and Corresponding relationship between IC stores, and processor 2 is according to the corresponding relationship from selecting in N number of IC each IC pairs in M firmware The firmware answered.
In step 202, the M firmware read from memory 1 is sent to first IC, first IC by processor 2 After receiving M firmware, the first firmware needed is selected from M firmware.Mode one, first IC are selected from M firmware When the first firmware needed, corresponding with first IC first can be selected to consolidate from M firmware according to corresponding relationship above-mentioned Part.Mode 2 can also be according to firmware type from M firmware when first IC selects the first firmware needed from M firmware It is middle to select the first firmware corresponding with first IC.For example, if the type of each IC is different, the IC for being typically different type is needed The firmware type wanted is different, so the type of each firmware is not also identical.Assuming that the firmware type of M firmware be respectively Class1, Type 2, type M.Wherein, the type for the firmware that first IC needs is Class1, so, first IC is found from M firmware Type is the firmware of Class1, which is the first firmware that first IC needs.
In embodiments of the present invention, first IC from M firmware determine the first firmware after, can in several ways by Firmware is sent to second IC.One: the first IC of mode from M firmware really go out first IC need the first firmware after, M-1 firmware is sent to second IC, second IC selects the second firmware needed from this M-1 firmware.Wherein, second A IC selects the process of the second firmware needed from this M-1 firmware, selects from this M firmware with first IC above-mentioned The first firmware needed is similar, in order to illustrate the succinct of book, seldom repeats.Mode two, first IC go out really from M firmware After the first firmware that first IC needs, M firmware is sent to second IC, i.e. step 203 together.Second IC is from M After determining the second firmware that second IC needs in firmware, this M firmware is issued into third IC again.
For mode one, M-2 firmware is sent to third IC (Fig. 1 is not shown) by second IC, and third IC is used Similar mode (referring to first IC above-mentioned from the process for determining the first firmware in M firmware) is true from M-2 firmware Fixed third firmware corresponding with third IC, third IC load third firmware to execute third business.
For mode two, second IC continues for M firmware to be sent to third IC, and third IC is by a similar method Determine that third firmware corresponding with third IC, the 3rd IC load third firmware to execute third business from M firmware.
From the description of front it is found that first IC is true from M firmware after processor 2 sends M firmware to first IC The first firmware that fixed first IC needs.Then, M firmware can be sent to second IC by first IC.Likewise, second After a IC receives M firmware of first IC transmission, M firmware can also be sent to third IC.As it can be seen that in the application In embodiment, each IC can play the role of forwarding firmware to other IC, i.e., in circuit board provided by the embodiments of the present application, nothing The special device for being used to forward firmware need to be set, the utilization rate of each IC is improved.
In embodiments of the present invention, for first IC after selecting the first firmware in M firmware, the first firmware may mistake (for example version is different), cause first IC that can not load the first firmware.Therefore, in embodiments of the present invention, first IC is from M After selecting the first firmware in a firmware, it can be determined that whether the first firmware is correct.A kind of possible implementation is first IC is to judge the first firmware by the cyclic redundancy check code (Cyclic Redundancy Check, CRC) in the first firmware It is no correct.For example, including information field and check field and the first cyclic redundancy check in the first firmware.Optionally, the first CRC Check code can be at the end of the first firmware.After first IC receives the first firmware, according to the check field in the first firmware Regenerate the second cyclic redundancy check.If the first cyclic redundancy check is identical with the second cyclic redundancy check, it is verified, i.e., first is solid Part is correct.If the first cyclic redundancy check and the second cyclic redundancy check be not identical, authentication failed, i.e. the first firmware error.If verifying Pass through, first IC can load the first firmware.If authentication failed, first IC sends instruction (for example, please join to processor 2 As shown in Figure 1, first IC sends described instruction to processor 2 by RELOAD_OUT1, and corresponding, processor 2 passes through RELOAD_IN1 receives the instruction that first IC is sent), which is used to indicate the first firmware and is not available, request processor 2 Again the first firmware is sent to first IC.
Above-mentioned is by taking whether first the first firmware of IC verifying be correct as an example, likewise, second IC can also be to use Similar mode verifies the second firmware, in order to save space, seldom repeats.
Optionally, when processor 2 receives the instruction that first IC is sent, processor 2 can be sent out to first IC again Send the first firmware.Processor 2 is sent again to first IC there are many modes of the first firmware.Mode one: processor 2 will include The M firmware of first firmware is all sent to first IC.Mode two: the first firmware is only sent to first IC by processor 2.When So, processor 2, which sends the first firmware to first IC again, can also use other modes, and the present invention does not limit.
Similar, after first IC sends M firmware to second IC, second IC can also sentence by a similar method Whether disconnected second firmware is correct.If the second firmware error, second IC can send instruction (for example, referring to first IC Shown in Fig. 1, second IC sends described instruction to first IC by RELOAD_OUT2, and corresponding, first IC passes through RELOAD_IN2 receives the instruction that second IC is sent), which is used to indicate first IC and sends the to second IC again Two firmwares.First IC sends the mode of the second firmware to second IC again, sends the to first IC again with processor 2 The mode of one firmware is similar, and it is no longer repeated again.
The process that processor 2 sends the first firmware to first IC is described below.
Optionally, processor 2 can be sent when sending the first firmware to first IC in a manner of data frame.Assuming that First firmware includes J data frame, wherein J is the integer more than or equal to 1.Processor 2 first sends first number to first IC According to frame, the second data frame then is sent to first IC and represents processor 2 until having sent j-th data frame to first IC The first firmware has been sent to first IC.
In general, a data frame has start bit (bit) and stop bits.Start bit is used to indicate the starting of the data frame, Stop bits is used to indicate the end of the data frame.It is shown in Figure 3, it is the structural schematic diagram of a data frame.Wherein, it originates It there may also be long numeric data between position and stop bits, a complete data frame characterized from start bit to stop bits.
Below by taking processor 2 sends first data frame to first IC as an example, introduces processor 2 and sent to first IC Two kinds of implementations of first data frame.
The first possible implementation:
Continuing with shown in Figure 1, processor 2 sends first data frame to first IC by TX_DAT_1, and first The data-signal of a data frame refers to shown in Fig. 4 A.Processor 2 by TX_CLK_1 to first IC tranmitting data register signal, when Clock signal refers to shown in Fig. 4 A.After first IC receives the data-signal of clock signal and first data frame, when determining High level is on clock signal, while data-signal is in the position of rising edge, which is the start bit of data frame.I.e. One IC reads first data frame since the start bit.When first IC is determined in high level in clock signal, simultaneously Data-signal is in the position of failing edge, which is the stop bits of data frame.I.e. first IC terminates to read from the stop bits Take first data frame.As shown in figure 3, data frame further includes valid data position, valid data between start bit and stop bits The jump of position need to be jumped when being in low level in clock signal, and first IC is carried out in the rising edge of clock signal Sampling is to read the first data.That is, first IC can be when clock signal be in rising edge, reading data (has Imitate data).In addition, first IC can be in rising edge in clock signal, and keep after a period of stabilisation, carrying out sampling reading Take the first data.
Second of possible implementation:
Continuing with shown in Figure 1, processor 2 sends the data of first data frame by TX_DAT_1 to first IC Signal, the data-signal of first data frame refer to shown in Fig. 4 B.When processor 2 is sent by TX_CLK_1 to first IC Clock signal, clock signal refer to shown in Fig. 4 B.First IC receives the data-signal of clock signal and first data frame Afterwards, it determines and is in low level in clock signal, while position of the data-signal Jing Guo a complete positive pulse, which is The start bit of data frame.I.e. first IC reads first data frame since the start bit.When first IC determines that clock is believed Low level is on number, while data-signal is in the position of failing edge, which is the stop bits of data frame.I.e. first IC terminates to read first data frame from the stop bits.As shown in figure 3, further including valid data before start bit and stop bits The jump of position, valid data position need to be jumped when being in low level in clock signal, and first IC is in clock signal Rising edge sampled to read data.That is, first IC can read number when clock signal is in rising edge According to (i.e. valid data).In addition, first IC can be in rising edge in clock signal, and holding is after a period of stabilisation, into The first data are read in row sampling.
After first IC has read the first data frame, start to read second data frame.First IC reads second The mode of a data frame is similar with the mode of first data frame is read, not described here any more.
Above-mentioned is so that processor 2 sends the process of the first firmware to first IC as an example.Likewise, first IC is to second It when a IC sends the second firmware, and is sent in a manner of data frame, it is no longer repeated herein.
Fig. 5 is referred to, for a kind of structural schematic diagram of the circuit board provided in the embodiment of the present invention.It is current in memory 1 What is stored is the firmware of first version, and processor 2 passes through an external interface external equipment 3 in succession, deposits in this external equipment 3 Contain the firmware of the second edition (second edition is greater than first version).
Wherein, processor 2 determines when needing the M firmware upgrade to the first version stored in memory 1, can be from outer M firmware of the second edition is read in portion's equipment 3, and M firmware of the second edition read is stored in memory 1. For example, second edition firmware is stored in memory 1 there are many mode by processor 2.For example, the last time is stored in by processor 2 The firmware of 1 legacy version of memory (i.e. first version) is deleted, and processor 2 is stored from external equipment 3 by the firmware of the second edition again In memory 1, in this way, the memory space of memory 1 is saved.For another example, processor 2 is from external equipment 3 by The firmware of two versions and the firmware of first version are stored in jointly in memory 1.
Specifically, processor 2 determines the need for the M firmware upgrade to the first version stored in memory 1, it can To be realized there are many in a manner of.
Mode one, the operation of some IC loading firmware are broken down.
In this fashion, processor 2 may not need all firmwares of upgrading, only upgrades and consolidates needed for the IC of operation troubles Part.By taking first IC as an example, when first IC, which loads the first firmware, to break down, it can inform that 2 first IC of processor add Carry the failure of the first firmware.Processor 2 can read the corresponding highest version firmware of the first firmware from external equipment 3.Processing The corresponding highest version firmware of first firmware is stored in memory 1 by device 2.Processor 2 can also be corresponding by first firmware Highest version firmware be sent to first IC so that first IC loads the highest version firmware, to execute business.
Certain period is arranged in mode two, processor 2, and when reaching the period, processor 2 actively upgrades M firmware.? In this mode, processor 2 once can all upgrade all firmwares, portion firmware can also be upgraded, the embodiment of the present invention It is not construed as limiting.
Optionally, the external interface between processor 2 and external equipment 3 shown in fig. 5 can be USB interface, Ethernet Interface, or other external interfaces, it is not limited here.
By above description, in technical solution in embodiments of the present invention, circuit board includes processor, memory with And N number of chip.Memory stores M firmware, and M firmware includes the corresponding N number of firmware of N number of chip;Processor is from memory Read M firmware;M firmware is sent to the first chip, the first chip determining and first chip pair from M firmware by processor The first firmware answered, the first chip load the first firmware to execute the first business;M firmware is sent to the second core by the first chip Piece, the second chip determine that the second firmware corresponding with the second chip, the second chip load the second firmware to execute from M firmware Second business.In this way, it does not need that more memory is arranged on circuit board, a memory can store multiple cores Firmware required for piece.Processor reads multiple firmwares from memory, is sent to each chip, so that each chip is from multiple Suitable firmware is determined in firmware, and loads the firmware determined, to execute business.Due to the memory that is arranged on circuit board compared with It is few, it is routed on circuit board simply, board area is without too greatly, saving design cost.
Based on the same inventive concept, offer a kind of electronic equipment of the embodiment of the present invention, please refers to shown in Fig. 6, is this hair The structure chart for a kind of electronic equipment that bright embodiment provides.The electronic equipment includes:
Shell 601;
Circuit board 602 is set in shell 601, and wherein circuit board 602 can be electricity described in the embodiment of the present invention Road plate.
Optionally, above-mentioned electronic equipment can be Ethernet switch, router, hub and other electronic equipments.
Since electronic equipment provided in an embodiment of the present invention is in the phase isomorphism with circuit board provided in an embodiment of the present invention Think lower proposition, therefore the various change mode of the firmware loading method in 2 embodiment of earlier figures and specific embodiment are equally suitable For the electronic equipment of the present embodiment, by the aforementioned detailed description to firmware loading method, those skilled in the art can be clear The implementation process for instructing electronic equipment in the present embodiment of Chu, so this will not be detailed here in order to illustrate the succinct of book.

Claims (10)

1. a kind of firmware loading method is applied to a circuit board, the circuit board includes: processor, memory and N number of core Piece, which is characterized in that the described method includes:
The processor reads M firmware from the memory;
The M firmware is sent to the first chip, first chip determining and institute from the M firmware by the processor Corresponding first firmware of the first chip is stated, first chip loads first firmware to execute the first business;
The M firmware is sent to the second chip by first chip, so that second chip is true from the M firmware Fixed the second firmware corresponding with second chip, and second firmware is loaded to execute the second business;
Wherein, N is the integer more than or equal to 2, and M is the integer more than or equal to N.
2. the method as described in claim 1, which is characterized in that first chip from the M firmware determine with it is described Corresponding first firmware of first chip, comprising:
First chip determines the first firmware corresponding with first chip according to firmware type from the M firmware.
3. method according to claim 1 or 2, which is characterized in that include cyclic redundancy check in first firmware;Correspondingly, The method also includes:
After first chip is by cyclic redundancy check verification failure, sends and instruct to the processor;
The processor receives the instruction that first chip is sent, and sends first firmware to first chip again.
4. method according to claim 1 or 2, which is characterized in that the version of the M firmware stored in the memory For first version;The processor passes through an external interface equipment in succession, and the M of the second edition is stored in one equipment A firmware;The method also includes:
When the processor determines M firmware for needing to update the first version in the memory, from one equipment M firmware of the second edition is read, and in the memory by the storage of M firmware of the second edition of reading; Wherein, the second edition is higher than the first version.
5. method according to claim 1 or 2, which is characterized in that the processor connects with first chip by first Mouth connection, first chip is connect with second chip by second interface, and the first interface connects with described second Mouth type is identical.
6. a kind of circuit board characterized by comprising processor, memory and N number of chip;
Wherein, the memory is connected to the processor, and the processor is connect with the first chip in N number of chip, First chip is connected with other chips except removing first chip in N number of chip;
The memory, for storing M firmware;
The processor is sent to described for reading the M firmware from the memory, and by the M firmware One chip;
First chip for determining the first firmware corresponding with first chip from the M firmware, and loads institute The first firmware is stated to execute the first business;
First chip is also used to the M firmware being sent to the second chip, wherein second chip is described other A chip in chip;
Second chip for determining the second firmware corresponding with second chip from the M firmware, and loads institute The second firmware is stated to execute the second business;
Wherein, N is the integer more than or equal to 2, and M is the integer more than or equal to N.
7. circuit board as claimed in claim 6, which is characterized in that first chip is specifically used for: according to firmware type from The first firmware corresponding with first chip is determined in the M firmware.
8. circuit board as claimed in claims 6 or 7, which is characterized in that include cyclic redundancy check in first firmware;
First chip is also used to, and after cyclic redundancy check verification failure, is sent and is instructed to the processor;
The processor is also used to: being received the instruction that first chip is sent, is sent described the to first chip again One firmware.
9. circuit board as claimed in claims 6 or 7, which is characterized in that the version of the M firmware stored in the memory This is first version;The processor passes through an external interface equipment in succession, is stored with the second edition in one equipment M firmware;The processor is also used to: when determining M firmware for needing to update the first version in the memory, from institute M firmware for reading the second edition in an equipment is stated, and M firmware of the second edition of reading is stored in institute It states in memory;Wherein, the second edition is higher than the first version.
10. circuit board as claimed in claims 6 or 7, which is characterized in that the processor and first chip pass through first Interface connection, first chip are connect with second chip by second interface, and the first interface connects with described second Mouth type is identical.
CN201811100749.8A 2018-09-20 2018-09-20 A kind of firmware loading method and circuit board Pending CN109375958A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811100749.8A CN109375958A (en) 2018-09-20 2018-09-20 A kind of firmware loading method and circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811100749.8A CN109375958A (en) 2018-09-20 2018-09-20 A kind of firmware loading method and circuit board

Publications (1)

Publication Number Publication Date
CN109375958A true CN109375958A (en) 2019-02-22

Family

ID=65405698

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811100749.8A Pending CN109375958A (en) 2018-09-20 2018-09-20 A kind of firmware loading method and circuit board

Country Status (1)

Country Link
CN (1) CN109375958A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101667133A (en) * 2009-09-30 2010-03-10 威盛电子股份有限公司 Method for updating firmware and chip updating firmware by using same
CN106775791A (en) * 2015-11-20 2017-05-31 海思光电子有限公司 The method and optical module of firmware loads in optical module
US20170185781A1 (en) * 2015-12-29 2017-06-29 Samsung Electronics Co., Ltd. System-on-chips and electronic devices including same
CN108227613A (en) * 2017-01-23 2018-06-29 威盛电子股份有限公司 Electronic device and its operating method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101667133A (en) * 2009-09-30 2010-03-10 威盛电子股份有限公司 Method for updating firmware and chip updating firmware by using same
CN106775791A (en) * 2015-11-20 2017-05-31 海思光电子有限公司 The method and optical module of firmware loads in optical module
US20170185781A1 (en) * 2015-12-29 2017-06-29 Samsung Electronics Co., Ltd. System-on-chips and electronic devices including same
CN108227613A (en) * 2017-01-23 2018-06-29 威盛电子股份有限公司 Electronic device and its operating method

Similar Documents

Publication Publication Date Title
KR101154148B1 (en) Multiple independent serial link memory
US8984249B2 (en) ID generation apparatus and method for serially interconnected devices
CN100511148C (en) CPU system starting method and system
JP4247262B2 (en) Integrated circuit device
JP5382661B2 (en) Apparatus and method for capturing serial input data
KR20080047998A (en) Apparatus and method for switching an apparatus to a power saving mode
CN108897577A (en) A kind of server backplane CPLD state self-adaption system and method
CN103530215A (en) Self-inspection method and device of inter integrated circuit host and host
US9104401B2 (en) Flash memory apparatus with serial interface and reset method thereof
CN109375958A (en) A kind of firmware loading method and circuit board
EP2194458A2 (en) Request processing device, request processing system, and access testing method
US20040117541A1 (en) System and method for updating firmware in a non-volatile memory without using a processor
US7453380B2 (en) Apparatus and method for processing analog signals and outputting digitally converted analog signals using serial bus
US7984234B2 (en) Memory control apparatus and memory control method
JP7273176B2 (en) Memory control system with sequence processing unit
TW201237866A (en) Controlling method and controller for DRAM
US20070260812A1 (en) Programming method for write buffer and double word flash programming
JP2009252294A (en) Memory controller, memory system, and writing method of data to memory device
JP4892852B2 (en) Serial interface control method
JP2010079372A (en) Storage device, method for testing bus, and method for switching data transfer mode
JPH11328961A (en) Electronic circuit device and interface circuit
JPH07129486A (en) Serial communication circuit
CN118035157A (en) Control method, chip, medium and device for serial peripheral interface system
KR100680457B1 (en) Data output circuit in a flash memory device and method of outputting data using the same
US6360295B1 (en) Serially loadable digital electronic memory and method of loading the same

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20190222