CN109375877A - A kind of method of managing main frame end logical place correspondence mappings table in flash memory storage - Google Patents
A kind of method of managing main frame end logical place correspondence mappings table in flash memory storage Download PDFInfo
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- CN109375877A CN109375877A CN201811245098.1A CN201811245098A CN109375877A CN 109375877 A CN109375877 A CN 109375877A CN 201811245098 A CN201811245098 A CN 201811245098A CN 109375877 A CN109375877 A CN 109375877A
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- flash memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
- G06F3/0611—Improving I/O performance in relation to response time
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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Abstract
The invention discloses a kind of methods of logical place correspondence mappings table in managing main frame end in flash memory storage, comprising the following steps: the corresponding segmentation of managing main frame data in A, confirmation flash memory storage；B, the hit rate+1 of the segmentation after confirmation；C, confirm in memory with the presence or absence of this segmentation；D, memory sections is confirmed whether to write back to flash memory；E, the segmentation of flash memory is write back according to hit rate decision, the invention proposes store two segmentations in memory, determine which segmentation will be written back in flash memory according to segmentation correlation hit rate height, when judging that there are this segmentations in memory, it from the segmentation corresponding with host data of reading in flash memory and will be put into memory, when judge in memory there is no this segmentation, determine to write back the segmentation of flash memory according to hit rate, segmentation corresponding with host data is read from flash memory and is put into memory, and execution efficiency is substantially improved.
Description
Technical field
The present invention relates to logical place correspondence mappings table technical field in managing main frame end in flash memory storage, specially a kind of sudden strains of a muscle
The method of managing main frame end logical place correspondence mappings table in storage.
Background technique
Flash memory (Flash Memory) is that a kind of the non-volatile of long-life (is still able to maintain under power blackout situation and is stored
Data information) memory, data deletion be not as unit of single byte but as unit of fixed block (note
Meaning: NOR Flash is byte storage.), block size is generally 256KB to 20MB.Flash memory is the read-only storage of Electrical Erasable
The mutation of device (EEPROM), flash memory unlike EEPROM, EEPROM can be deleted and be rewritten in byte-level without
It is that entire chip is erasable, and most of chip of flash memory needs block to wipe.Due to remaining to save data when its power-off, flash memory is usual
Be used to save setting information, such as in the BIOS(basic program of computer), PDA(personal digital assistant), save in digital camera
Data etc..
There is n block in one flash memory, includes n page in a block.After page is written into data, unless to this page is included
Block erase movement, this page otherwise cannot be written again.Flash memory has the not reproducible characteristic being written into the same position.?
Because flash memory possesses this characteristic, the function of logical place correspondent entity position is needed in flash memory device, with current skill
Art can manage corresponding position through the mapping table of a logical place correspondent entity position.This table can be placed on flash memory and deposit
It is operated in the memory of storage device.
As the capacity of flash memory device is increasing, the mapping table of whole part logical place correspondent entity position is recorded
Required memory size is bigger, and table can be cut into n segmentation according to memory size by technology at present, and for example memory can use sky
Between be 1024 bytes, if record entire flash memory device mapping table size be 8192 bytes, thus whole part
Mapping table is divided into 8 segmentations, is a ~ h respectively.
The difference of NOR type and NAND-type flash memory is very big, and so to say, NOR type flash memory has more like single-chip microcontroller flash memory
Independent address wire and data line, but price is somewhat expensive, and capacity is smaller；And NAND type is more like hard disk, address wire and data line
It is shared I/O line, it is general that all information of similar hard disk all pass through a hard disk line transmission, and NAND type and NOR type are dodged
It deposits and compares, cost wants lower, and capacity is much bigger.Therefore, NOR type flash memory is relatively suitble to the occasion of frequent random read-write, leads to
It is usually used in storing and program code and is directly run in flash memory, mobile phone is exactly using the rich and influential family of NOR type flash memory, so mobile phone
" memory " capacity is usually little；NAND-type flash memory is mainly used to data on file, our common flash memory products, such as flash disk, number
Code storage card is all to use NAND-type flash memory.Here we also need to rectify a concept, that is, the speed of flash memory has very much in fact
Limit, itself service speed, frequency are just more much lower than memory, and NAND-type flash memory also compares similar to the mode of operation efficiency of hard disk
The Direct Access Mode of memory is much slower.It therefore, not be to recognize in interface, or even with assuming as a matter of course with the performance bottleneck for flash disk
Huge performance boost can be obtained using USB2.0 interface later for flash disk.
The mode of operation low efficiency of NAND-type flash memory mentioned above, this is related with Interface design with its architecture design, it
It operates really very as hard disk (NAND-type flash memory considers the compatibility with hard disk really at the beginning of design in fact), its property
Can feature also like hard disk: small data block service speed is very slow, and long data block speed is just quickly, this species diversity is deposited more than other
Big more of storage media.Highly we notice this performance characteristics.
Flash memory access ratio is faster, noiseless, radiates small.User's space capacity requirement amount is small, it is intended to can if purchasing
Too many not consider, same memory space buys flash memory.If necessary to volume space big (such as 500G), hard disk is just bought, more just
Preferably, it also can satisfy the demand of user's application.
That relevant segmentation of host data can be only saved in memory, flash memory is stored in other segmentations.When being segmented in memory
Uncorrelated with present host data, the content for needing segmentation to update is stored in flash memory, and relevant segmentation from flash memory
Taking-up is put into memory.
If the relevant striping order of host data is respectively: segmentation a -> segmentation c -> segmentation a -> segmentation d mono-
Straight iterative cycles, the process operated in this way just will become segmentation a be written to flash memory, from flash memory read segmentation c, then point
Section c is written to flash memory, and segmentation a is read from flash memory, then segmentation a is written to flash memory, and segmentation d is then read memory,
It is repeated always, increase flash memory in this way reads the number being written, and reduces the execution efficiency of storage device.
Summary of the invention
The purpose of the present invention is to provide a kind of execution speed for accelerating storage device, and the write-in for reducing flash memory is read
Number, thus the method for promoting logical place correspondence mappings table in managing main frame end in a kind of flash memory storage of execution efficiency, with solution
Certainly the problems mentioned above in the background art.
To achieve the above object, the invention provides the following technical scheme: managing main frame end logical bit in a kind of flash memory storage
The method for setting correspondence mappings table: the following steps are included:
A, confirm the corresponding segmentation of managing main frame data in flash memory storage；
B, the hit rate+1 of the segmentation after confirmation；
C, confirm in memory with the presence or absence of this segmentation；
D, memory sections is confirmed whether to write back to flash memory；
E, the segmentation of flash memory is write back according to hit rate decision.
Preferably, the step A flash memory storage is equipped with, single-chip microcontroller, flash controller, and input/output control module is deposited
Storage unit array and precharge unit.
It preferably, include CPU module in managing main frame in the step A flash memory storage, reading unit executes controller,
Input and output controller, cache, data converter, mapping table.
Preferably, include mapping table in the step C memory storage, include 2 segmentations and hit rate machine on mapping table
System, segmentation and hit rate mechanism are equipped with calculator and identification module, include 1024 bytes in each segmentation.
Preferably, the capacity of the mapping table pair is 8192 bytes.
Compared with prior art, the beneficial effects of the present invention are:
The present invention accelerates storage dress to improve the service efficiency of logical place correspondent entity position mapping table in storage device
The execution speed set, and reduce the write-in reading times of flash memory, it is proposed that multiple segmented contents are put in memory plus hit
Rate mechanism reads segmentation corresponding with host data from flash memory and is put into memory, substantially come the method for determining replacement segmentation
Promote execution efficiency.
Detailed description of the invention
Fig. 1 is the relevant striping order schematic diagram of host data of the present invention；
Fig. 2 is that two stepwise schematic views are stored in memory of the present invention；
Fig. 3 is the flow chart for the method that multiple segmented contents determine replacement segmentation plus hit rate mechanism in memory of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
Please refer to Fig. 1, Fig. 2 or Fig. 3, the present invention provides a kind of technical solution: managing main frame end is patrolled in a kind of flash memory storage
The method for collecting position correspondence mappings table: the following steps are included:
A, confirm the corresponding segmentation of managing main frame data in flash memory storage；
B, the hit rate+1 of the segmentation after confirmation；
C, confirm in memory with the presence or absence of this segmentation；
D, memory sections is confirmed whether to write back to flash memory；
E, the segmentation of flash memory is write back according to hit rate decision.
Confirm the corresponding segmentation of managing main frame data in flash memory storage, is equipped in flash memory storage, single-chip microcontroller, flash memory control
Device processed, input/output control module, memory cell array and precharge unit include CPU mould in managing main frame in flash memory storage
Block, reading unit execute controller, input and output controller, cache, data converter, mapping table.
The hit rate+1 of segmentation after confirmation confirms in memory and is segmented with the presence or absence of this, includes mapping table in memory storage,
The capacity of mapping table pair is 8192 bytes, includes 2 segmentations and hit rate mechanism on mapping table, segmentation and hit rate machine
System is equipped with calculator and identification module, includes 1024 bytes in each segmentation.
That relevant segmentation of host data can be only saved in memory, other segmentations are stored in flash memory, when being segmented in memory
Uncorrelated with present host data, the content for needing segmentation to update is stored in flash memory, and is segmented relevant from flash memory
Middle taking-up is put into memory.
When the relevant striping order of host data is respectively: segmentation a -> segmentation c -> segmentation a -> segmentation d is always
Iterative cycles, the process operated in this way just will become segmentation a and be written to flash memory, and segmentation c is read from flash memory, then segmentation c
It is written to flash memory, segmentation a is read from flash memory, then segmentation a is written to flash memory, segmentation d is then read memory, one
It is directly repeated, increase flash memory in this way reads the number being written, and will will be greatly reduced the execution efficiency of storage device in this way.
It is confirmed whether memory sections to write back to flash memory, the segmentation for writing back flash memory is determined according to hit rate, if it is point
Section a -> segmentation c -> segmentation a -> segmentation d this situation of iterative cycles always, first storage segmentation a in memory, then
Storage segmentation c writes back to segmentation c followed by according to hit rate because segmentation a does not need to take out from flash memory in memory
In flash memory, segmentation d reading is then placed on memory.
The method of managing main frame end logical place correspondence mappings table, first confirms that the corresponding segmentation of host data, then
The hit rate+1 for obtaining this segmentation is judged after calculating with the presence or absence of corresponding segmentation in memory, if there are phases in memory
The segmentation answered, then reading segmentation corresponding with host data from flash memory and being put into memory, if phase is not present in memory
The segmentation answered, then memory sections will be determined whether to write back to flash memory, the corresponding segmentation that will be not present in memory, according to
Hit rate determines to write back the segmentation of flash memory, segmentation corresponding with host data is finally read from flash memory and is put into memory, defeated
Result out.
The present invention accelerates to deposit to improve the service efficiency of logical place correspondent entity position mapping table in storage device
The execution speed of storage device, and the write-in reading times of flash memory are reduced, multiple segmented contents are put in memory plus hit rate
Mechanism reads segmentation corresponding with host data from flash memory and is put into memory, substantially mention come the method for determining replacement segmentation
Rise execution efficiency.
The beneficial effects of the present invention are:
The present invention accelerates storage dress to improve the service efficiency of logical place correspondent entity position mapping table in storage device
The execution speed set, and reduce the write-in reading times of flash memory, it is proposed that multiple segmented contents are put in memory plus hit
Rate mechanism reads segmentation corresponding with host data from flash memory and is put into memory, substantially come the method for determining replacement segmentation
Promote execution efficiency.
It although an embodiment of the present invention has been shown and described, for the ordinary skill in the art, can be with
A variety of variations, modification, replacement can be carried out to these embodiments without departing from the principles and spirit of the present invention by understanding
And modification, the scope of the present invention is defined by the appended.
Claims (5)
1. a kind of method of managing main frame end logical place correspondence mappings table in flash memory storage: the following steps are included:
A, confirm the corresponding segmentation of managing main frame data in flash memory storage；
B, the hit rate+1 of the segmentation after confirmation；
C, confirm in memory with the presence or absence of this segmentation；
D, memory sections is confirmed whether to write back to flash memory；
E, the segmentation of flash memory is write back according to hit rate decision.
2. the method for managing main frame end logical place correspondence mappings table in a kind of flash memory storage according to claim 1,
Be characterized in that: the step A flash memory storage is equipped with, single-chip microcontroller, flash controller, input/output control module, storage unit
Array and precharge unit.
3. the method for managing main frame end logical place correspondence mappings table in a kind of flash memory storage according to claim 1,
It is characterized in that: including CPU module in managing main frame in the step A flash memory storage, reading unit executes controller, inputs defeated
Controller out, cache, data converter, mapping table.
4. the method for managing main frame end logical place correspondence mappings table in a kind of flash memory storage according to claim 1,
It is characterized in that: including mapping table in the step C memory storage, include 2 segmentations and hit rate mechanism, segmentation on mapping table
And hit rate mechanism is equipped with calculator and identification module, includes 1024 bytes in each segmentation.
5. the method for managing main frame end logical place correspondence mappings table in a kind of flash memory storage according to claim 3,
Be characterized in that: the capacity of the mapping table pair is 8192 bytes.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811245098.1A CN109375877A (en) | 2018-10-24 | 2018-10-24 | A kind of method of managing main frame end logical place correspondence mappings table in flash memory storage |
| PCT/CN2018/115510 WO2020082449A1 (en) | 2018-10-24 | 2018-11-14 | Method for mapping table corresponding to logical position of management host in flash memory storage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201811245098.1A CN109375877A (en) | 2018-10-24 | 2018-10-24 | A kind of method of managing main frame end logical place correspondence mappings table in flash memory storage |
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| CN109375877A true CN109375877A (en) | 2019-02-22 |
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Citations (4)
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| CN104281535A (en) * | 2014-09-24 | 2015-01-14 | 北京兆易创新科技股份有限公司 | Method and device for processing mapping tables in memory |
| CN107168888A (en) * | 2017-05-19 | 2017-09-15 | 惠州佰维存储科技有限公司 | The mapping table management method and its system of Nand flash memories |
| CN107832013A (en) * | 2017-11-03 | 2018-03-23 | 中国科学技术大学 | A kind of method for managing solid-state hard disc mapping table |
| CN108491335A (en) * | 2018-03-30 | 2018-09-04 | 北京联想核芯科技有限公司 | Handle method, apparatus, equipment and the medium of mapping item |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103425600B (en) * | 2013-08-23 | 2016-01-20 | 中国人民解放军国防科学技术大学 | Address mapping method in a kind of solid-state disk flash translation layer (FTL) |
| CN103810113B (en) * | 2014-01-28 | 2016-07-06 | 华中科技大学 | A kind of fusion memory system of nonvolatile storage and dynamic random access memory |
| CN104461393B (en) * | 2014-12-09 | 2017-05-17 | 华中科技大学 | Mixed mapping method of flash memory |
| CN106445839A (en) * | 2016-10-09 | 2017-02-22 | 国云科技股份有限公司 | High performance document storage system and method thereof |
-
2018
- 2018-10-24 CN CN201811245098.1A patent/CN109375877A/en active Pending
- 2018-11-14 WO PCT/CN2018/115510 patent/WO2020082449A1/en active Application Filing
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104281535A (en) * | 2014-09-24 | 2015-01-14 | 北京兆易创新科技股份有限公司 | Method and device for processing mapping tables in memory |
| CN107168888A (en) * | 2017-05-19 | 2017-09-15 | 惠州佰维存储科技有限公司 | The mapping table management method and its system of Nand flash memories |
| CN107832013A (en) * | 2017-11-03 | 2018-03-23 | 中国科学技术大学 | A kind of method for managing solid-state hard disc mapping table |
| CN108491335A (en) * | 2018-03-30 | 2018-09-04 | 北京联想核芯科技有限公司 | Handle method, apparatus, equipment and the medium of mapping item |
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| WO2020082449A1 (en) | 2020-04-30 |
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Application publication date: 20190222 |