CN109360814A - The encapsulating structure and its manufacturing method of IC chip - Google Patents
The encapsulating structure and its manufacturing method of IC chip Download PDFInfo
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- CN109360814A CN109360814A CN201811143955.7A CN201811143955A CN109360814A CN 109360814 A CN109360814 A CN 109360814A CN 201811143955 A CN201811143955 A CN 201811143955A CN 109360814 A CN109360814 A CN 109360814A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/345—Arrangements for heating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3737—Organic materials with or without a thermoconductive filler
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Materials Engineering (AREA)
- Ceramic Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
It include temperature-sensitive circuit in the integrated circuit on chip the invention discloses a kind of encapsulating structure of IC chip, the temperature-sensitive circuit probability that is out of order when operating temperature reduces increases；Encapsulating structure includes: heat-conducting layer, at least coats a front surface and a side surface of temperature-sensitive circuit completely；Heat insulation layer is formed in the surface of heat-conducting layer and coats heat-conducting layer；Heat-conducting layer forms the uniform structure of temperature of each position in the region for coating heat-conducting layer, heat insulation layer forms the structure that is maintained of temperature in region of the region heat dissipation for preventing heat insulation layer from coating to make heat insulation layer coat, so as to make the low-temperature end of range of operating temperature of the chip be expanded.The invention also discloses a kind of manufacturing methods of the encapsulating structure of IC chip.The present invention can be reduced the heat leakage of chip, and integrated circuit is avoided to occur abnormal and thus caused client's loss under excessive worst cold case.
Description
Technical field
The present invention relates to semiconductor integrated circuit fields, more particularly to a kind of encapsulating structure of IC chip.This
Invention further relates to a kind of temperature maintenance methods of IC chip.
Background technique
Since IC chip application environment is changeable, when there is low temperature environment, the properties of integrated circuit of chip will be sent out
Raw offset.In extreme circumstances even occur short duration failure or by internal false triggering can not inverse operation lead to permanent failure,
User is caused to lose.
The method of the Integrated Circuit Temperature for the holding chip being currently known has sides that are several, such as installing heater outside chip additional
Method, the method heated to circuit board entirety covering and heat insulating layer or fluid circulation system etc., assist chip to maintain operating temperature not
It causes too low.
Summary of the invention
Technical problem to be solved by the invention is to provide a kind of encapsulating structures of IC chip, can be reduced chip
Heat leakage avoids integrated circuit from occurring abnormal and thus caused client's loss under excessive worst cold case.For this purpose, of the invention
A kind of temperature maintenance methods of IC chip are also provided.
In order to solve the above technical problems, in the encapsulating structure of IC chip provided by the invention, it is integrated on chip
In circuit include temperature-sensitive circuit, the temperature-sensitive circuit operating temperature reduce when be out of order probability increase；Encapsulation knot
Structure includes:
Heat-conducting layer, the heat-conducting layer at least coat a front surface and a side surface of the temperature-sensitive circuit completely；
Heat insulation layer, the heat insulation layer are formed in the surface of the heat-conducting layer and coat the heat-conducting layer；
The heat-conducting layer forms the uniform structure of temperature for making each position in region of the heat-conducting layer cladding, the insulation
What the temperature that layer forms the region for preventing the region heat dissipation of the heat insulation layer cladding to make the heat insulation layer cladding was maintained
Structure, so as to make the low-temperature end of range of operating temperature of the chip be expanded.
A further improvement is that the heat-conducting layer coats a front surface and a side surface of the entire chip completely.
A further improvement is that the front of the chip is formed with passivation layer.
A further improvement is that the material of the heat-conducting layer uses heat-conducting silicon rubber；The material of the heat insulation layer is using hair
Steep polyimides.
A further improvement is that being formed with opening in the passivation layer, formed in the opening by the integrated electricity
The electrode on road draws liner.
A further improvement is that being provided with the heating electricity being made of heating metal layer in integrated circuit on the chip
Road, the heat-conducting layer also coat the heater circuit.
A further improvement is that the encapsulating structure further includes outer enclosure device, the outer enclosure device will be formed
There is the chip of the heat-conducting layer and the heat insulation layer to coat completely；The material of the outer enclosure device includes plastics or pottery
Porcelain.
A further improvement is that the bottom surface in the chip is also formed with frame and earth plate, the chip bottom
The outer enclosure device by the bottom surface of the frame and earth plate cover.
A further improvement is that gold thread passes through the outer enclosure device, the heat insulation layer and the heat-conducting layer and correspondence
The electrode draw liner connection.
In order to solve the above technical problems, the manufacturing method of the encapsulating structure of IC chip provided by the invention, special
Sign is, includes temperature-sensitive circuit in the integrated circuit on chip, and the temperature-sensitive circuit when operating temperature reduces
Probability of failure increases；The front of the chip is formed with passivation layer, and opening is formed in the passivation layer, in the opening
It is formed and liner is drawn by the electrode of the integrated circuit；The forming step of encapsulating structure includes:
Step 1: forming heat-conducting layer using deposition or coating process, the heat-conducting layer is at least using the passivation layer as substrate
A front surface and a side surface of the temperature-sensitive circuit is coated completely；The heat-conducting layer forms the region for making the heat-conducting layer cladding
The uniform structure of the temperature of each position.
Step 2: forming heat insulation layer using deposition or coating process, the heat insulation layer is formed in the surface of the heat-conducting layer
And the heat-conducting layer is coated.
The heat insulation layer forms the region for preventing the region heat dissipation of the heat insulation layer cladding to make the heat insulation layer cladding
The structure that is maintained of temperature, so as to make the low-temperature end of range of operating temperature of the chip be expanded.
A further improvement is that the heat-conducting layer coats a front surface and a side surface of the entire chip completely.
A further improvement is that the material of the heat-conducting layer uses heat-conducting silicon rubber；The material of the heat insulation layer is using hair
Steep polyimides.
A further improvement is that being provided with the heating electricity being made of heating metal layer in integrated circuit on the chip
Road, the heat-conducting layer also coat the heater circuit.
A further improvement is that further comprising the steps of:
Step 3: the bottom surface of the chip forms frame and earth plate.
Step 4: forming outer enclosure device, the outer enclosure device will be formed with the heat-conducting layer, the heat insulation layer
It is coated completely with the chip of the frame and earth plate；The material of the outer enclosure device includes plastics or ceramics.
A further improvement is that further comprising the steps of:
Step 5: formed gold thread, the gold thread pass through the outer enclosure device, the heat insulation layer and the heat-conducting layer and
The corresponding electrode draws liner connection.
The present invention for include in the integrated circuit on chip low temperature may out of order temperature-sensitive circuit spy
Point specially devises the heat-conducting layer and heat insulation layer at least covering temperature-sensitive circuit, and heat-conducting layer can make the temperature in covered region
Uniformly, heat insulation layer can prevent covered region from radiating, and the temperature in the region that can finally make heat insulation layer coat well is protected
It holds, so as to make the low-temperature end of range of operating temperature of the chip be expanded, also so as to widening temperature-sensitive circuit
Operating temperature range, and since other integrated circuits itself can work in low temperature range, so the present invention can widen entirely
The range of the operating temperature of chip also can prevent chip from occurring short duration failure or permanent failure in low-temperature working.
It can be realized in addition, the present invention is only through to improve encapsulating structure, simple process and at low cost；It can also be big
The big temperature drift required precision for reducing chip device, reduces security risk, promotes manufacturing process window, and client is helped to extend chip
Low temperature life reduces low temperature error rate, promotes client's section.
Detailed description of the invention
The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments:
Fig. 1 is the structural schematic diagram of the encapsulating structure of IC chip of the embodiment of the present invention.
Specific embodiment
As shown in Figure 1, being the structural schematic diagram of the encapsulating structure of 2 chip 1 of integrated circuit of the embodiment of the present invention, the present invention is real
It include temperature-sensitive circuit, the temperature in the integrated circuit 2 on chip 1 in the encapsulating structure for applying 2 chip 1 of an integrated circuit
Sensitive circuit operating temperature reduce when be out of order probability increase；Encapsulating structure includes:
Heat-conducting layer 4, the heat-conducting layer 4 at least coat a front surface and a side surface of the temperature-sensitive circuit completely.
Heat insulation layer 5, the heat insulation layer 5 are formed in the surface of the heat-conducting layer 4 and coat the heat-conducting layer 4.
The heat-conducting layer 4 forms the uniform structure of temperature of each position in the region for coating the heat-conducting layer 4, described exhausted
Thermosphere 5 forms the region heat dissipation for preventing the heat insulation layer 5 from coating to which the temperature in the region for coating the heat insulation layer 5 is protected
The structure held, so as to make the low-temperature end of range of operating temperature of the chip 1 be expanded, also so as to widening the core
The range of the operating temperature of piece 1.
In the embodiment of the present invention, the heat-conducting layer 4 coats a front surface and a side surface of the entire chip 1 completely.
The front of the chip 1 is formed with passivation layer 3.The material of the passivation layer 3 is silicon nitride.
It is formed with opening in the passivation layer 3, is formed in the opening and lining is drawn by the electrode of the integrated circuit 2
Pad.
In the embodiment of the present invention, the heating electricity being made of heating metal layer is provided in the integrated circuit 2 on the chip 1
Road, the heat-conducting layer 4 also coat the heater circuit.In other embodiments, the heater circuit can be also not provided with.Namely
The heater circuit can carry out selective setting according to actual needs, can further provide for heating when the heating device is arranged
Function.
The encapsulating structure further includes outer enclosure device 7, and the outer enclosure device 7 will be formed with the heat-conducting layer 4
It is coated completely with the chip 1 of the heat insulation layer 5.
Frame and earth plate 6, the external envelope of 1 bottom of chip are also formed in the bottom surface of the chip 1
Assembling device 7 covers the bottom surface of the frame and earth plate 6.
Gold thread 8 passes through the outer enclosure device 7, the heat insulation layer 5 and the heat-conducting layer 4 and the corresponding electrode draws
Liner connection out.
Being included in low temperature in the integrated circuit 2 that the embodiment of the present invention is directed on chip 1 may out of order temperature sensitivity
The characteristics of circuit, specially devises the heat-conducting layer 4 and heat insulation layer 5 at least covering temperature-sensitive circuit, and heat-conducting layer 4 can make to be covered
Region temperature it is uniform, heat insulation layer 5 can prevent covered region from radiating, can finally make well heat insulation layer 5 coat area
The temperature in domain is maintained, so as to make the low-temperature end of range of operating temperature of the chip 1 be expanded, also so as to expanding
The range of the operating temperature of wide temperature-sensitive circuit, and since other integrated circuits 2 itself can work in low temperature range, so this
Inventive embodiments can widen the range of the operating temperature of entire chip 1, can also prevent chip 1 from occurring in low-temperature working of short duration
Failure or permanent failure.
It can be realized in addition, the embodiment of the present invention is only through to improve encapsulating structure, simple process and at low cost；
The temperature drift required precision of 1 device of chip can also be substantially reduced, security risk is reduced, promotes manufacturing process window, helps client
Extend 1 low temperature life of chip, reduce low temperature error rate, promotes client's section.
In the manufacturing method of the encapsulating structure of 2 chip 1 of integrated circuit of the embodiment of the present invention, in the integrated circuit 2 on chip 1
Including temperature-sensitive circuit, the temperature-sensitive circuit may be out of order when operating temperature reduces；The front of the chip 1
It is formed with passivation layer 3, is formed with opening in the passivation layer 3, forms the electrode by the integrated circuit 2 in the opening
Draw liner；The forming step of encapsulating structure includes:
Step 1: being substrate with the passivation layer 3, heat-conducting layer 4, the heat-conducting layer 4 are formed using deposition or coating process
At least a front surface and a side surface of the temperature-sensitive circuit is coated completely；The heat-conducting layer 4, which is formed, makes the cladding of heat-conducting layer 4
The uniform structure of the temperature of each position in region.
In present invention method, the heat-conducting layer 4 coats a front surface and a side surface of the entire chip 1 completely.
The material of the passivation layer 3 is silicon nitride.
The heater circuit being made of heating metal layer, the heat-conducting layer 4 are provided in integrated circuit 2 on the chip 1
Also the heater circuit is coated.In other embodiments method, it can also be not provided with the heater circuit.Namely the heating electricity
Road can carry out selective setting according to actual needs, and heating function can be further provided for when the heating device is arranged.
Step 2: forming heat insulation layer 5 using deposition or coating process, the heat insulation layer 5 is formed in the table of the heat-conducting layer 4
Face simultaneously coats the heat-conducting layer 4.
The heat insulation layer 5 forms area of the region heat dissipation for preventing the heat insulation layer 5 from coating to make the heat insulation layer 5 coat
The structure that the temperature in domain is maintained, so as to make the low-temperature end of range of operating temperature of the chip 1 be expanded, also from
And the range of the operating temperature of the chip 1 can be widened.
Step 3: the bottom surface of the chip 1 forms frame and earth plate 6.
Step 4: formed outer enclosure device 7, the outer enclosure device 7 will be formed with the heat-conducting layer 4, it is described absolutely
The chip 1 of thermosphere 5 and the frame and earth plate 6 coats completely.
Step 5: forming gold thread 8, the gold thread 8 passes through the outer enclosure device 7, the heat insulation layer 5 and described thermally conductive
Layer 4 and the corresponding electrode draw liner connection.
The present invention has been described in detail through specific embodiments, but these are not constituted to limit of the invention
System.Without departing from the principles of the present invention, those skilled in the art can also make many modification and improvement, these are also answered
It is considered as protection scope of the present invention.
Claims (15)
1. a kind of encapsulating structure of IC chip, which is characterized in that include temperature sensitive electrical in the integrated circuit on chip
Road, the temperature-sensitive circuit operating temperature reduce when be out of order probability increase；Encapsulating structure includes:
Heat-conducting layer, the heat-conducting layer at least coat a front surface and a side surface of the temperature-sensitive circuit completely；
Heat insulation layer, the heat insulation layer are formed in the surface of the heat-conducting layer and coat the heat-conducting layer；
The heat-conducting layer forms the uniform structure of temperature for making each position in region of the heat-conducting layer cladding, the heat insulation layer shape
Structure at the region heat dissipation of the heat insulation layer cladding is prevented to make the temperature in the region of the heat insulation layer cladding be maintained,
So as to make the low-temperature end of range of the operating temperature of the chip be expanded.
2. the encapsulating structure of IC chip as described in claim 1, it is characterised in that: the heat-conducting layer will be entire described
A front surface and a side surface of chip coats completely.
3. the encapsulating structure of IC chip as claimed in claim 2, it is characterised in that: the front of the chip is formed with
Passivation layer.
4. the encapsulating structure of IC chip as described in claim 1, it is characterised in that: the material of the heat-conducting layer uses
Heat-conducting silicon rubber；The material of the heat insulation layer uses polyimide foam.
5. the encapsulating structure of IC chip as claimed in claim 3, it is characterised in that: be formed in the passivation layer
Opening forms in the opening and draws liner by the electrode of the integrated circuit.
6. the encapsulating structure of IC chip as described in claim 1, it is characterised in that: the integrated circuit on the chip
In be provided with the heater circuit being made of heating metal layer, the heat-conducting layer also coats the heater circuit.
7. the encapsulating structure of IC chip as claimed in claim 5, which is characterized in that the encapsulating structure further includes outer
Portion's packaging system, the outer enclosure device coat the chip for being formed with the heat-conducting layer and the heat insulation layer completely；
The material of the outer enclosure device includes plastics or ceramics.
8. the encapsulating structure of IC chip as claimed in claim 7, it is characterised in that: in the bottom surface of the chip
It is also formed with frame and earth plate, the outer enclosure device of the chip bottom is by the bottom table of the frame and earth plate
Face covering.
9. the encapsulating structure of IC chip as claimed in claim 7, it is characterised in that: gold thread passes through the outer enclosure
Device, the heat insulation layer and the heat-conducting layer and the corresponding electrode draw liner connection.
10. a kind of manufacturing method of the encapsulating structure of IC chip, which is characterized in that include in the integrated circuit on chip
Temperature-sensitive circuit, the temperature-sensitive circuit operating temperature reduce when be out of order probability increase；The positive shape of the chip
At there is passivation layer, it is formed with opening in the passivation layer, is formed in the opening and is drawn by the electrode of the integrated circuit
Liner；The forming step of encapsulating structure includes:
Step 1: forming heat-conducting layer using deposition or coating process, the heat-conducting layer is at least by institute using the passivation layer as substrate
The a front surface and a side surface for stating temperature-sensitive circuit coats completely；The heat-conducting layer forms everybody for making the region of the heat-conducting layer cladding
The uniform structure of the temperature set；
Step 2: forming heat insulation layer using deposition or coating process, the heat insulation layer is formed in the surface of the heat-conducting layer and will
The heat-conducting layer cladding；
The heat insulation layer forms the temperature in the region for preventing the region heat dissipation of the heat insulation layer cladding to make the heat insulation layer cladding
The structure that is maintained is spent, so as to make the low-temperature end of range of operating temperature of the chip be expanded.
11. the manufacturing method of the encapsulating structure of IC chip as claimed in claim 10, it is characterised in that: described thermally conductive
Layer coats a front surface and a side surface of the entire chip completely.
12. the encapsulating structure of IC chip as claimed in claim 10, it is characterised in that: the material of the heat-conducting layer is adopted
Use heat-conducting silicon rubber；The material of the heat insulation layer uses polyimide foam.
13. the manufacturing method of the encapsulating structure of IC chip as claimed in claim 10, it is characterised in that: the chip
On integrated circuit in be provided with the heater circuit being made of heating metal layer, the heat-conducting layer is also by the heater circuit packet
It covers.
14. the manufacturing method of the encapsulating structure of IC chip as claimed in claim 10, which is characterized in that further include step
It is rapid:
Step 3: the bottom surface of the chip forms frame and earth plate；
Step 4: forming outer enclosure device, the outer enclosure device will be formed with the heat-conducting layer, the heat insulation layer and institute
The chip for stating frame and earth plate coats completely；The material of the outer enclosure device includes plastics or ceramics.
15. the manufacturing method of the encapsulating structure of IC chip as claimed in claim 14, which is characterized in that further include step
It is rapid:
Step 5: forming gold thread, the gold thread passes through the outer enclosure device, the heat insulation layer and the heat-conducting layer and correspondence
The electrode draw liner connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811143955.7A CN109360814B (en) | 2018-09-29 | 2018-09-29 | Packaging structure of integrated circuit chip and manufacturing method thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811143955.7A CN109360814B (en) | 2018-09-29 | 2018-09-29 | Packaging structure of integrated circuit chip and manufacturing method thereof |
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| CN109360814B CN109360814B (en) | 2020-09-29 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20220178763A1 (en) * | 2020-12-08 | 2022-06-09 | Delta Electronics (Shanghai) Co., Ltd. | Temperature detection system and on board charger |
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| CN109360814B (en) | 2020-09-29 |
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