CN109343136B - Security check machine - Google Patents
Security check machine Download PDFInfo
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- CN109343136B CN109343136B CN201811437341.XA CN201811437341A CN109343136B CN 109343136 B CN109343136 B CN 109343136B CN 201811437341 A CN201811437341 A CN 201811437341A CN 109343136 B CN109343136 B CN 109343136B
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- 238000012545 processing Methods 0.000 claims abstract description 111
- 238000007689 inspection Methods 0.000 claims abstract description 47
- 238000001514 detection method Methods 0.000 claims abstract description 30
- 230000004888 barrier function Effects 0.000 claims abstract description 17
- 238000012163 sequencing technique Methods 0.000 claims abstract description 6
- 238000004891 communication Methods 0.000 claims description 9
- 238000012360 testing method Methods 0.000 claims description 7
- 238000012937 correction Methods 0.000 claims description 6
- 230000005540 biological transmission Effects 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 238000003708 edge detection Methods 0.000 claims description 4
- 238000003702 image correction Methods 0.000 claims description 4
- 238000003709 image segmentation Methods 0.000 claims description 4
- 238000003707 image sharpening Methods 0.000 claims description 4
- 238000001914 filtration Methods 0.000 claims description 3
- 238000002347 injection Methods 0.000 claims description 3
- 239000007924 injection Substances 0.000 claims description 3
- 239000000203 mixture Substances 0.000 claims description 3
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- 239000005416 organic matter Substances 0.000 claims 1
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- 238000004519 manufacturing process Methods 0.000 abstract description 5
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- 230000000694 effects Effects 0.000 description 5
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- 239000000243 solution Substances 0.000 description 3
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- 238000013473 artificial intelligence Methods 0.000 description 1
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- G01V5/22—
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
Abstract
The invention discloses a security inspection machine, which comprises a light barrier, a ray source, a detector and an SoC data processing module, wherein the SoC data processing module comprises a hardware processing unit HPS integrated with an ARM processor and a programming logic unit FPGA; the light barrier is used for sending out a detection signal when being shielded by an article to be detected entering the detection channel; the hardware processing unit HPS is used for generating and sending a trigger signal according to the detection signal; the radiation source generates X rays according to the trigger signal, and the detector generates detection data according to the X rays and the object to be detected; the programming logic unit FPGA is used for carrying out data sequencing and image processing according to the detection data to obtain processing data; and according to the processing data, the hardware processing unit HPS is also used for building a system display interface. The invention solves the technical problems of low inspection processing speed and high manufacturing cost of the security inspection machine in the related technology.
Description
Technical Field
The invention belongs to the technical field of security inspection, and relates to a security inspection machine comprising an SoC data processing module.
Background
In the security inspection field, the X-ray security inspection machine can display the structural image of the internal articles through the package, can directly observe and analyze through the screen, can inspect the forbidden articles hidden in the baggage, the articles and various mails without unpacking, is safe, convenient and fast, and is one of more devices applied in the security inspection work. With the economic growth and the increasing population mobility, the requirements of safety inspection of public places and transportation hubs are gradually increased, the demand of security inspection machines is increased, and the inspection speed and the manufacturing cost are required to be improved. In the related technology, the image processing process of the security inspection machine is completed by the upper computer, and the inspection processing speed is low; and the traditional security inspection machine mainly comprises a photoelectric sensor, a ray source, a detector, a control panel, an acquisition board and an upper computer, and has a complex hardware structure and higher cost.
In view of the above problems, no effective solution has been proposed.
Disclosure of Invention
The invention provides a security inspection machine, which at least solves the technical problems of low inspection processing speed and high manufacturing cost of the security inspection machine in the related technology.
The technical solution of the invention is as follows: a security inspection machine comprises a light barrier, a ray source, a detector and an SoC data processing module, wherein the SoC data processing module comprises a hardware processing unit HPS integrated with an ARM processor and a programming logic unit FPGA; the light barrier is used for sending out a detection signal when being shielded by an article to be detected entering the detection channel; the hardware processing unit HPS is used for generating and sending a trigger signal according to the detection signal; the radiation source generates X rays according to the trigger signal, and the detector generates detection data according to the X rays and the article to be detected; the programming logic unit FPGA is used for carrying out data sequencing and image processing according to the detection data to obtain processing data; and according to the processing data, the HPS is also used for building a system display interface.
Optionally, the hardware processing unit HPS is further configured to receive the detection data and transmit the detection data to the programming logic unit FPGA through AXI bridge before the programming logic unit FPGA performs data sorting and image processing according to the detection data.
Optionally, the data sorting includes classifying the high-energy image data and the low-energy image data, and sorting the data respectively; the image processing comprises obtaining a high-energy image and a low-energy image according to the high-energy image data and the low-energy image data after sequencing, and processing at least one of the following processing on the high-energy image and the low-energy image: image sharpening, edge enhancement, edge detection, image segmentation, image enhancement, image filtering, brightness correction and reverse color processing.
Optionally, when the movement speed of the article to be detected in the security inspection machine is greater than a predetermined threshold, the image processing further includes image correction, wherein the value range of the predetermined threshold is 0.4m/s to 0.6 m/s.
Optionally, the programming logic unit FPGA is further configured to perform image processing on the high-energy image and the low-energy image, fuse the high-energy image and the low-energy image to perform pseudo-color processing, and distinguish the to-be-detected item as an organic substance, an inorganic substance, or a mixture.
Optionally, the system display interface includes at least one of: the system comprises a user management interface, an image management interface, a log management interface, a system management interface and a dangerous goods injection management interface.
Optionally, the security inspection machine further includes an interface circuit module, where the interface circuit module includes a light barrier interface circuit, a digital radiation source serial port circuit, a detector interface circuit, and an a/D data acquisition interface circuit, where at least one of the a/D data acquisition interface circuits is provided; the interface circuit module is used for providing a data transmission channel between the SoC data processing module and the light barrier, the ray source and the detector.
Optionally, the interface circuit module further includes: HDMI interface circuit, USB interface circuit; the security check machine further comprises: the system comprises a display, a mouse and a keyboard, wherein the display is connected with the hardware processing unit HPS through the HDMI interface circuit and is used for displaying the system display interface.
Optionally, the security check machine further includes a hardware circuit module, where the hardware circuit module includes at least one of: the device comprises a clock circuit, a QSPI Flash circuit, a DDR3 memory circuit, an SDIO interface circuit, a UART-USB conversion circuit, an Ethernet interface circuit, a GPIO circuit and a JTAG interface circuit.
Optionally, the GPIO circuit is configured to test communication quality between the hardware processing unit HPS and the programming logic unit FPGA; and the Ethernet interface circuit is connected to the MAC of the HPS and is used for assisting the security check machine to upgrade boot firmware and operating system images on line.
The security check machine adopts the SoC data processing module which comprises the hardware processing unit HPS integrated with the ARM processor and the programming logic unit FPGA as a security check data processing system, and greatly improves the data processing speed by taking the hardware processing unit HPS as a data processing controller and the programming logic unit FPGA as a data processor; and the hardware processing unit HPS and the programming logic unit FPGA are integrated in the SoC device, so that the effects of reducing the area of a circuit board, reducing power consumption and improving communication bandwidth are achieved, the requirement that a security check machine needs to be externally connected with the circuit board, the acquisition board and the upper computer is further avoided, the circuit structure is greatly simplified, and the hardware cost is saved. Therefore, the invention solves the technical problems of low inspection processing speed and high manufacturing cost of the security inspection machine in the related technology, and achieves the technical effects of improving the processing speed and precision and reducing the cost.
Drawings
FIG. 1 is a block diagram of a security inspection machine according to an embodiment of the invention;
FIG. 2 is a first preferred block diagram of a security inspection machine according to an embodiment of the invention;
fig. 3 is a second preferred structure of a security inspection machine according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the solution of the present invention, embodiments of the present invention will be described below with reference to the accompanying drawings.
According to an embodiment of the present invention, a security inspection machine is provided, and fig. 1 is a structural diagram of the security inspection machine according to the embodiment of the present invention. As shown in fig. 1, the security inspection machine includes an optical barrier 11, a radiation source 12, and a detector 13, wherein the security inspection machine further includes an SoC data processing module 14, and the SoC data processing module 14 includes a hardware processing unit HPS 141 integrated with an ARM processor and a programming logic unit FPGA 142.
When the security inspection machine is used for inspection, the functions and the working flows of all the parts are as follows: the light barrier 11 is used for sending out a detection signal when being shielded by an article to be detected entering the detection channel; the hardware processing unit HPS 141 is configured to generate and send a trigger signal according to the detection signal; the ray source 12 generates X rays according to the trigger signal, and the detector 13 generates detection data according to the X rays and the object to be detected; the programming logic unit FPGA 142 is used for carrying out data sequencing and image processing according to the detection data to obtain processing data; the hardware processing unit HPS 141 is also used to perform system display interface setup according to the processing data.
Preferably, the hardware processing unit HPS 141 is further configured to receive the detection data before the programming logic unit FPGA 142 performs data sorting and image processing according to the detection data, and transmit the detection data to the programming logic unit FPGA through an AXI bridge.
That is, preferably, the hardware processing unit HPS 141 and the programming logic unit FPGA 142 communicate with each other by using an AXI bus. Integrated in the hardware processing unit HPS 141 is a dual core ARM processor. The AXI bus comprises three data transmission channels, namely an FPGA-to-HPS bridge, an HPS-to-FPGA bridge and a lightweight HPS-to-FPGA bridge, when the communication data are less, the communication data are preferentially transmitted through the lightweight HPS-to-FPGA bridge, and the quick and convenient transmission effect can be realized.
The security check machine in the embodiment of the invention adopts the SoC data processing module 14 which comprises the hardware processing unit HPS 141 integrated with the ARM processor and the programming logic unit FPGA 142 as a security check data processing system, and greatly improves the data processing speed by taking the hardware processing unit HPS 141 as a data processing controller and the programming logic unit FPGA 142 as a data processor; and the hardware processing unit HPS 141 and the programming logic unit FPGA 142 are integrated in the SoC device, so that the effects of reducing the area of a circuit board, reducing power consumption and improving communication bandwidth are achieved, the requirement that the security inspection machine needs an external circuit board, an acquisition board and an upper computer is further avoided, the circuit structure is greatly simplified, and the hardware cost is saved. Therefore, the embodiment of the invention solves the technical problems of low inspection processing speed and high manufacturing cost of the security inspection machine in the related technology, and achieves the technical effects of improving the processing speed and precision and reducing the cost.
It should be noted that the programming logic unit FPGA 142 may control the FPGA to SDRAM interface to access the memory of the hardware processing unit HPS 141 through the SDRAM controller inside the hardware processing unit HPS 141.
Further, since the detection data generated by the detector 13 is an irregular signal, the data sorting operation includes classifying and sorting the high-energy image data and the low-energy image data; the image processing operation comprises obtaining a high-energy image and a low-energy image according to the sorted high-energy image data and low-energy image data, and processing at least one of the following processing on the high-energy image and the low-energy image: image sharpening, edge enhancement, edge detection, image segmentation, image enhancement, image filtering, brightness correction and reverse color processing.
Wherein, the edge enhancement can be processed by a Laplacian operator; the brightness correction may be processed by gamma correction; the image sharpening can be carried out by a laplacian operator to extract high-frequency components; edge detection can be handled by Canny operators; image segmentation may be handled by edge-based segmentation methods; image enhancement may be handled by histogram equalization.
In order to prevent the problem that the image is deformed due to the fact that the conveying speed of the article to be detected in the security check machine is too high, the embodiment of the invention can also introduce an image real-time correction algorithm to perform image correction on the high-energy image and the low-energy image, namely preferably, when the moving speed of the article to be detected in the security check machine is greater than a preset threshold value, the image processing can further include image correction, wherein the value range of the preset threshold value is 0.4 m/s-0.6 m/s.
Because the security check machine needs to display the substance to be detected and alarm the hazardous article area according to the corresponding rule, preferably, the programming logic unit FPGA 142 is further configured to perform image processing on the high-energy image and the low-energy image, fuse the high-energy image and the low-energy image to perform pseudo-color processing, and divide the substance to be detected into organic substances, inorganic substances or a mixture, so as to appropriately highlight the hazardous article area and alarm. Because the related image processing and the pseudo color processing are finished in the programming logic unit FPGA 142, the processing requirement that a security check machine needs to be connected with an upper computer is avoided, so the embodiment of the invention can better integrate an algorithm and improve the image processing speed. Meanwhile, in order to improve the distinguishing efficiency and accuracy of the articles to be detected, the embodiment of the invention can also carry out intelligent image judgment by adopting an artificial intelligence method of a neural network so as to realize rapid and accurate distinguishing of the dangerous article area.
Aiming at the operation needs and application habits of a user, the system display interface can comprise at least one of the following: the system comprises a user management interface, an image management interface, a log management interface, a system management interface and a dangerous goods injection management interface. The interface can be set into a plurality of presentation modes according to user preferences and requirements.
Preferably, the security inspection machine in the embodiment of the present invention may further include an interface circuit module 15, where the interface circuit module 15 may include a light barrier interface circuit 151, a digital radiation source serial port circuit 152, a detector interface circuit 153, and an a/D data acquisition interface circuit 154, and further, at least one a/D data acquisition interface circuit 154.
The interface circuit module 15 is used for providing a data transmission channel between the SoC data processing module 14 and the light barrier 11, the radiation source 12, and the detector 13.
Optionally, the connection relationship between the interface circuit module 15 and other devices in the security check machine may be:
the input end of the light barrier interface circuit 151 is connected with the light barrier 11, and the output end of the light barrier interface circuit is connected with the hardware processing unit HPS 141;
the input end of the digital ray source serial port circuit 152 is connected with the hardware processing unit HPS 141, and the output end of the digital ray source serial port circuit is connected with the ray source 12;
the input end of the detector interface circuit 153 is connected with the ray source serial port circuit 152, and the output end of the detector interface circuit 153 is connected with each A/D data acquisition interface circuit 154;
the input end of each A/D data acquisition interface circuit 154 is connected with the detector 13, and the output end is connected with the programming logic unit FPGA 142.
For the convenience of observation and operation of a user, preferably, the security check machine in the embodiment of the present invention may further include a display 16, a mouse 17, and a keyboard 18; the interface circuit module 15 may further include: an HDMI interface circuit 155 and a USB interface circuit 156. Fig. 2 is a first preferred structure diagram of a security inspection machine according to an embodiment of the invention. As shown in fig. 2, the display 16 is connected to the hardware processing unit HPS 141 through the HDMI interface circuit 155, and displays a system display interface; the mouse 17 and the keyboard 18 are connected to the hardware processing unit HPS 141 through the USB interface circuit 156, and are used to input user operation information and control a system display interface.
Preferably, the security check machine in the embodiment of the present invention may further include a hardware circuit module 19, and fig. 3 is a second preferred structure diagram of the security check machine according to the embodiment of the present invention. As shown in fig. 3, the hardware circuit module 19 may include at least one of: the device comprises a clock circuit 191, a QSPI Flash circuit 192, a DDR3 memory circuit 193, an SDIO interface circuit 194, a UART-USB conversion circuit 195, an Ethernet interface circuit 196, a GPIO circuit 197 and a JTAG interface circuit 198.
In order to facilitate the security check machine to update the system and the functional application in time, preferably, the hardware processing unit HPS 141 is integrated with a MAC, and the ethernet interface circuit 196 is connected to the MAC of the hardware processing unit HPS 141 and is used to assist the security check machine in upgrading the boot firmware and the operating system image on line. Among other things, ethernet interface circuitry 196 may include ethernet PHY circuitry through which the associated data is transmitted to the MAC and an RJ45 jack.
Meanwhile, in order to monitor the data processing condition in the SoC data processing module 14, the GPIO circuit 197 is used to test the communication quality between the hardware processing unit HPS 141 and the programming logic unit FPGA 142. The test can be set as an active test which is continuously carried out by the system according to a preset period so as to carry out early warning in time when the communication quality is deteriorated, so that a user can check and maintain in time, and the normal operation of security check work is further prevented from being influenced.
Further, the clock circuit 191 may be composed of a 50MHz active crystal oscillator, and provides a system clock for the hardware processing unit HPS 141. The QSPI Flash 192 circuit can be composed of 32MB SPI Flash and is used for storing boot firmware and operating system images of a platform.
The SDIO interface circuit 194 may be composed of an SD card, an SDIO interface chip, an SD card socket, and peripheral circuits thereof, and is used to store boot firmware and operating system images of the platform, which are in backup relationship with the QSPI Flash 192 circuit.
The DDR3 memory circuit 193 may be a 32-bit 1GB DDR3 composed of 2 DDR3 granules, as an operating system memory of the hardware processing unit HPS 141; optionally, a 32-bit 2GB DDR3 composed of 4 DDR3 granules may be further included as an image data buffer of the programming logic unit FPGA 142.
The UART-USB conversion circuit 195 may be composed of a UART-USB bridge and its peripheral circuits, and converts the UART serial port of the hardware processing unit HPS 141 into a USB2.0 interface, which is used as a system debugging port.
The JTAG interface circuit 198 can be used for providing JTAG functions for circuits in the security inspection machine, debugging on-chip software and a programming logic unit FPGA 142, and providing short-circuit protection and electrostatic protection circuits.
The hardware processing unit HPS 141 is also used for scheduling each software and hardware module inside the SoC data processing module 14, and the effective data extraction and read/write DDR3 module.
Preferably, the programming logic unit FPGA 142 is implemented by Verilog code when performing data sorting and image processing.
Those skilled in the art will appreciate that those matters not described in detail in the present specification are well known in the art.
Claims (9)
1. A security check machine comprises a light barrier, a ray source and a detector, and is characterized by further comprising an SoC data processing module, wherein the SoC data processing module comprises a hardware processing unit HPS integrated with an ARM processor and a programming logic unit FPGA;
the light barrier is used for sending out a detection signal when being shielded by an article to be detected entering the detection channel; the hardware processing unit HPS is used for generating and sending a trigger signal according to the detection signal; the ray source generates X rays according to the trigger signal, and generates detection data according to the X rays, the article to be detected and the detector; the programming logic unit FPGA is used for carrying out data sequencing and image processing according to the detection data to obtain processing data; according to the processing data, the hardware processing unit HPS is also used for building a system display interface;
the HPS is further configured to receive the detection data and transmit the detection data to the FPGA through AXI bridging before the FPGA performs data sorting and image processing according to the detection data;
the security check machine also comprises a GPIO circuit which is used for testing the communication quality between the hardware processing unit HPS and the programming logic unit FPGA; the test is a continuous active test set by a security check machine system according to a preset period, and an early warning is given when the communication quality is degraded.
2. A security inspection machine according to claim 1, wherein said data sorting comprises sorting and sorting high energy image data and low energy image data, respectively; the image processing comprises obtaining a high-energy image and a low-energy image according to the high-energy image data and the low-energy image data after sequencing, and processing at least one of the following processing on the high-energy image and the low-energy image: image sharpening, edge enhancement, edge detection, image segmentation, image enhancement, image filtering, brightness correction and reverse color processing.
3. The security inspection machine according to claim 2, wherein when the moving speed of the article to be detected in the security inspection machine is greater than a predetermined threshold, the image processing further comprises image correction, wherein the value range of the predetermined threshold is 0.4 m/s-0.6 m/s.
4. The security inspection machine according to claim 2, wherein the programming logic unit FPGA is further configured to fuse the high-energy image and the low-energy image for pseudo-color processing after image processing of the high-energy image and the low-energy image, and is configured to distinguish the object to be inspected as organic matter, inorganic matter, or a mixture.
5. A security inspection machine according to claim 1, wherein said system display interface includes at least one of: the system comprises a user management interface, an image management interface, a log management interface, a system management interface and a dangerous goods injection management interface.
6. The security inspection machine according to claim 1, further comprising an interface circuit module, wherein the interface circuit module comprises a light barrier interface circuit, a digital ray source serial port circuit, a detector interface circuit and an A/D data acquisition interface circuit, wherein at least one of the A/D data acquisition interface circuits; the interface circuit module is used for providing a data transmission channel between the SoC data processing module and the light barrier, the ray source and the detector.
7. A security inspection machine according to claim 6,
the interface circuit module further includes: HDMI interface circuit, USB interface circuit;
the security check machine further comprises: the system comprises a display, a mouse and a keyboard, wherein the display is connected with the hardware processing unit HPS through the HDMI interface circuit and is used for displaying the system display interface.
8. A security inspection machine according to claim 1, further comprising hardware circuit modules including at least one of: the device comprises a clock circuit, a QSPI Flash circuit, a DDR3 memory circuit, an SDIO interface circuit, a UART-USB conversion circuit, an Ethernet interface circuit and a JTAG interface circuit.
9. The security inspection machine according to claim 8, wherein said ethernet interface circuit is connected to the MAC of said hardware processing unit HPS for assisting said security inspection machine to upgrade boot firmware and operating system images online.
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