CN109342921A - A kind of ageing testing method and system of high speed exchange chip - Google Patents
A kind of ageing testing method and system of high speed exchange chip Download PDFInfo
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- CN109342921A CN109342921A CN201811172506.5A CN201811172506A CN109342921A CN 109342921 A CN109342921 A CN 109342921A CN 201811172506 A CN201811172506 A CN 201811172506A CN 109342921 A CN109342921 A CN 109342921A
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- test
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
- G01R31/2817—Environmental-, stress-, or burn-in tests
Abstract
The present invention provides the ageing testing methods and system of a kind of high speed exchange chip, in dynamic aging test, tested IC is placed in burn-in board, pumping signal is provided by control panel for burn-in board, high temperature and voltage high low bias test are carried out to tested IC, the numerical portion progress digital pin of tested IC is drawn high and drags down operation, loopback test is carried out to the analog portion of tested IC, send and receive packets test is carried out to the Switching Module of tested IC.The present invention can be realized to high speed exchange chip numerical portion, the burn-in test of analog portion and switching part, the burn-in screen test item of initial failure product is covered more comprehensive, be conducive to find that more possible potential problems in burn-in test, and show that the result of each functional test item of high temperature dynamic aging can find the ageing-resistant ability of each functional module in time by real-time monitoring, be conducive to analyze test result by real-time storage ageing information.
Description
Technical field
The invention belongs to chip testing field, ageing testing method and the survey of a kind of high speed exchange chip are especially related to
Test system.
Background technique
As semiconductor integrated circuit is widely used in communication, electronics, computer-related every field, volume towards
Gently, thin, small direction is developed, and the integrity problem of integrated circuit also obtains the concern of more and more people.In military weapon
The special occasions such as system, Aerospace Electronic Equipments, Industry Control, the reliability of integrated circuit even more occupy very important
Position, importance are even no less than the performance indicator of of integrated circuit itself.Burn-in test includes that static test and dynamic are surveyed
Examination, wherein static test is to apply temperature stress and voltage and current stress to measured device, and dynamic aging test is in addition to device
Part applies outside temperature stress and voltage and current stress, also applies dynamic stimulating signal to circuit internal node, allows chip excess load
It works and its defect is made to accelerate exposure, reject the process of inoperable chip.Initial failure product is sifted out, is the weight for improving reliability
Want means.
Traditional high temperature dynamic aging method enables measured device be placed in hot environment and provides working power, also in input terminal
The dynamic driving signal of circuit work is provided, so that device interface is being done dynamic always in this way and overturns.This method is very close to number
The actual operating state of integrated circuit applies dynamic stimulating signal, therefore high temperature to its port using IC device as a system
Dynamic aging usually copes with the burn-in screen of Integrated circuit digital part.
But the analog portion or analog portion and numerical portion in the integrated circuit that the above method mixes modulus
High speed serdes (SERializer serializer/DESerializer deserializer of analog portion in interface, such as exchange chip
Referred to as), in exchange chip analog portion and numerical portion interface Switching Module, then cannot accomplish dynamic stimulating signal test
It is completely covered.And existing aging testing system is the screening realized to the initial failure product of chip, for ageing process
In the problem of cannot finding in time and check analysis afterwards, the being unfavorable for failure product analysis of phenomenon and information.
Summary of the invention
In view of this, the present invention provides the ageing testing method and system of a kind of high speed exchange chip, to overcome existing collection
The problem of simulation of integrated circuit part cannot be covered at circuit aging method.
In order to achieve the above objectives, the technical scheme of the present invention is realized as follows: a kind of aging of high speed exchange chip is surveyed
Tested IC is placed in burn-in board, provides pumping signal by control panel for burn-in board by method for testing in dynamic aging test, right
Tested IC carries out high temperature and voltage high low bias test, draws high to the numerical portion progress digital pin of tested IC and drags down operation, to quilt
The analog portion for surveying IC carries out loopback test, carries out send and receive packets test to the Switching Module of tested IC.
Further: high temperature test is that burn-in board is placed in ageing oven, carries out aging height by adjusting ageing oven temperature
Temperature test, voltage high low bias test is to realize high low bias test by board mounted power.
Further: control panel is communicated using iic bus with IC, and IC needs the pin controlled to lead to by golden finger
Control panel carries out low level 0 to digital pin by control program and drags down with drawing high for high level 1, realizes that digital pin is drawn high
Drag down operation.
Further: control panel is communicated using iic bus with IC, and IC needs the pin controlled to lead to by golden finger
Control panel configures IC function by control program and realizes send and receive packets test.
Further, the detection data that the burn-in board will acquire is uploaded to the MCU of control panel by iic bus, by MCU
Control storage and real-time display, detection data include burn-in board number, the state-detection in place of every IC of whole plate as a result, voltage,
Electric current, I2C builds joint inspection survey as a result, loopback test is as a result, send and receive packets test result, directly storage display.
Another aspect of the present invention, additionally provides a kind of aging testing system of high speed exchange chip, including control panel, old
Change plate, pinboard, in which:
Control panel is monitored control to burn-in board；Pumping signal is provided for burn-in board, high temperature and electricity are carried out to tested IC
High low bias test is pressed, the numerical portion progress digital pin of tested IC is drawn high and drags down operation, the analog portion of tested IC is carried out
Loopback test carries out send and receive packets test to the Switching Module of tested IC；Control panel is equipped with control module, and the control module includes
MCU；
Burn-in board carries out the carrier of burn-in test to chip；IC in burn-in board needs the pin controlled to pass through golden hand
It guides out, the interface signal of burn-in board and control panel is one-to-one relationship, burn-in board and control panel by switching board and turns
It is direct-connected to connect signal wire progress.
Further, the control panel further includes display module, memory module；The display module link control module,
To ageing test result real-time display；The memory module link control module, real-time storage ageing information.
Compared with prior art, the invention has the benefit that the present invention can be realized to high speed exchange chip digital section
Point, the burn-in test of analog portion and switching part covers the burn-in screen test item of initial failure product more complete
Face is conducive to find that more possible potential problems in burn-in test, and shows that high temperature dynamic aging is each by real-time monitoring
The result of a functional test item can find the ageing-resistant ability of each functional module in time, have by real-time storage ageing information
It is analyzed conducive to test result.
Detailed description of the invention
Fig. 1 is the schematic diagram of the method for the embodiment of the present invention；
Fig. 2 is the flow chart of the method for the embodiment of the present invention；
Fig. 3 is the schematic diagram of system described in the embodiment of the present invention；
Fig. 4 is burn-in board and control panel connection schematic diagram in system described in the embodiment of the present invention.
Specific embodiment
It should be noted that in the absence of conflict, the feature in the embodiment of the present invention and embodiment can be mutual
Combination.
As shown in Figure 1, the present invention carries out high temperature and voltage high low bias test, logarithm when dynamic aging is tested, to tested IC
Character segment progress digital pin, which is drawn high, drags down operation, carries out loopback test to high speed serdes, carries out send and receive packets to Switching Module
Test.
As shown in Fig. 2, testing process of the invention are as follows:
(1) electrification reset is tested；
(2) read-write register is tested；
(3) Digital I/O Turnover testing；
(4) high speed serdes loopback test；
(5) Switching Module send and receive packets are tested.
Wherein, high temperature test is that burn-in board is placed in ageing oven, carries out aging high temperature side by adjusting ageing oven temperature
Examination, voltage high low bias test is to realize high low bias test by board mounted power.
Control panel is communicated using iic bus with IC, and the pin that IC needs control passes through golden finger and leads to control panel, is led to
It crosses control program and digital pin progress low level 0 is dragged down with drawing high for high level 1, realize that digital pin is drawn high and drags down operation.
Control panel is communicated using iic bus with IC, and the pin that IC needs control passes through golden finger and leads to control panel, is led to
It crosses control program configuration IC function and realizes send and receive packets test.
The detection data that the burn-in board will acquire is uploaded to the MCU of control panel by iic bus, is controlled and is stored by MCU
And real-time display, detection data include burn-in board number, the state-detection in place of every IC of whole plate is as a result, voltage, electric current, I2C
Joint inspection survey is built as a result, loopback test is as a result, send and receive packets test result, directly storage display.
As shown in Figure 3,4, high temperature dynamic aging test macro includes control panel, is monitored control to burn-in board；Aging
Plate carries out the carrier of burn-in test to chip；Display module, to ageing test result real-time display；Memory module, real-time storage
Ageing information.The pin that IC in burn-in board needs to control is drawn by golden finger, the interface signal of burn-in board and control panel
For one-to-one relationship, burn-in board and control panel are direct-connected by switching board and the progress of tandem signal line.
The foregoing describe the information such as basic principles and main features of the invention and embodiment, but the present invention is not by upper
The limitation for stating implementation process, under the premise of not departing from spirit and range, the present invention can also have various changes and modifications.
Therefore, unless this changes and improvements are departing from the scope of the present invention, they should be counted as comprising in the present invention.
Claims (7)
1. a kind of ageing testing method of high speed exchange chip, which is characterized in that in dynamic aging test, tested IC is placed in
Burn-in board provides pumping signal by control panel for burn-in board, high temperature and voltage high low bias test is carried out to tested IC, to tested IC
Numerical portion carry out digital pin and draw high and drag down operation, to the analog portion progress loopback test of tested IC, to tested IC's
Switching Module carries out send and receive packets test.
2. a kind of ageing testing method of high speed exchange chip according to claim 1, it is characterised in that: high temperature test is
Burn-in board is placed in ageing oven, carries out aging high temperature test by adjusting ageing oven temperature, voltage high low bias test is to pass through plate
It carries power supply and realizes high low bias test.
3. a kind of ageing testing method of high speed exchange chip according to claim 1, it is characterised in that: control panel uses
Iic bus is communicated with IC, and the pin that IC needs control passes through golden finger and leads to control panel, is drawn by controlling program to number
Foot carries out low level 0 and drags down with drawing high for high level 1, realizes that digital pin is drawn high and drags down operation.
4. a kind of ageing testing method of high speed exchange chip according to claim 1, it is characterised in that: control panel uses
Iic bus is communicated with IC, and the pin that IC needs control passes through golden finger and leads to control panel, is passed through control program and is configured IC function
It is able to achieve send and receive packets test.
5. a kind of ageing testing method of high speed exchange chip according to claim 1, which is characterized in that the burn-in board
The detection data that will acquire is uploaded to the MCU of control panel by iic bus, controls storage and real-time display, detection data by MCU
It is numbered including burn-in board, the state-detection in place of every IC of whole plate is as a result, voltage, electric current, I2C builds joint inspection survey as a result, loopback is surveyed
Test result, send and receive packets test result, directly storage display.
6. a kind of aging testing system of high speed exchange chip, which is characterized in that including control panel, burn-in board, pinboard,
In:
Control panel is monitored control to burn-in board；Pumping signal is provided for burn-in board, high temperature is carried out to tested IC and voltage is drawn
Bias testing, draws high the numerical portion progress digital pin of tested IC and drags down operation, carries out loopback to the analog portion of tested IC
Test carries out send and receive packets test to the Switching Module of tested IC；Control panel is equipped with control module, and the control module includes MCU；
Burn-in board carries out the carrier of burn-in test to chip；IC in burn-in board needs the pin controlled to draw by golden finger
Out, the interface signal of burn-in board and control panel is that one-to-one relationship, burn-in board and control panel pass through switching board and switching letter
Number line carries out direct-connected.
7. a kind of aging testing system of high speed exchange chip according to claim 6, which is characterized in that the control panel
It further include display module, memory module；The display module link control module, to ageing test result real-time display；It is described
Memory module link control module, real-time storage ageing information.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201811172506.5A CN109342921A (en) | 2018-10-09 | 2018-10-09 | A kind of ageing testing method and system of high speed exchange chip |
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| CN201811172506.5A CN109342921A (en) | 2018-10-09 | 2018-10-09 | A kind of ageing testing method and system of high speed exchange chip |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110347139A (en) * | 2019-05-22 | 2019-10-18 | 苏州浪潮智能科技有限公司 | A kind of test fixture of I2C bus |
| CN111123004A (en) * | 2019-12-25 | 2020-05-08 | 广州路派电子科技有限公司 | Burn-in board test system and burn-in board test method for vehicle |
| CN113640644A (en) * | 2021-07-26 | 2021-11-12 | 珠海格力电器股份有限公司 | Power chip defect detection method, system, equipment and storage medium |
| CN113866612A (en) * | 2021-11-30 | 2021-12-31 | 北京京瀚禹电子工程技术有限公司 | Aging test board and aging test equipment |
| CN115792585A (en) * | 2023-02-10 | 2023-03-14 | 湖南进芯电子科技有限公司 | Integrated circuit aging test method and device and readable storage medium |
| CN115856567A (en) * | 2022-10-11 | 2023-03-28 | 杭州中安电子有限公司 | Vehicle-gauge-grade MCU device TDBI test method |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110347139A (en) * | 2019-05-22 | 2019-10-18 | 苏州浪潮智能科技有限公司 | A kind of test fixture of I2C bus |
| CN111123004A (en) * | 2019-12-25 | 2020-05-08 | 广州路派电子科技有限公司 | Burn-in board test system and burn-in board test method for vehicle |
| CN113640644A (en) * | 2021-07-26 | 2021-11-12 | 珠海格力电器股份有限公司 | Power chip defect detection method, system, equipment and storage medium |
| CN113866612A (en) * | 2021-11-30 | 2021-12-31 | 北京京瀚禹电子工程技术有限公司 | Aging test board and aging test equipment |
| CN115856567A (en) * | 2022-10-11 | 2023-03-28 | 杭州中安电子有限公司 | Vehicle-gauge-grade MCU device TDBI test method |
| CN115792585A (en) * | 2023-02-10 | 2023-03-14 | 湖南进芯电子科技有限公司 | Integrated circuit aging test method and device and readable storage medium |
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