CN109313594B - 用于指令包的奇偶校验 - Google Patents

用于指令包的奇偶校验 Download PDF

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Publication number
CN109313594B
CN109313594B CN201780038165.XA CN201780038165A CN109313594B CN 109313594 B CN109313594 B CN 109313594B CN 201780038165 A CN201780038165 A CN 201780038165A CN 109313594 B CN109313594 B CN 109313594B
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CN
China
Prior art keywords
parity
instruction
packet
instruction packet
instructions
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CN201780038165.XA
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English (en)
Chinese (zh)
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CN109313594A (zh
Inventor
埃里希·詹姆士·普罗恩德克
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Qualcomm Inc
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Qualcomm Inc
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Publication date
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Publication of CN109313594A publication Critical patent/CN109313594A/zh
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Publication of CN109313594B publication Critical patent/CN109313594B/zh
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1032—Simple parity
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/45—Caching of specific data in cache memory
    • G06F2212/452—Instruction code

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Software Systems (AREA)
  • Detection And Correction Of Errors (AREA)
  • Executing Machine-Instructions (AREA)
  • Devices For Executing Special Programs (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Error Detection And Correction (AREA)
CN201780038165.XA 2016-06-24 2017-06-02 用于指令包的奇偶校验 Active CN109313594B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/192,981 2016-06-24
US15/192,981 US10108487B2 (en) 2016-06-24 2016-06-24 Parity for instruction packets
PCT/US2017/035713 WO2017222784A1 (en) 2016-06-24 2017-06-02 Parity for instruction packets

Publications (2)

Publication Number Publication Date
CN109313594A CN109313594A (zh) 2019-02-05
CN109313594B true CN109313594B (zh) 2022-06-17

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201780038165.XA Active CN109313594B (zh) 2016-06-24 2017-06-02 用于指令包的奇偶校验

Country Status (7)

Country Link
US (1) US10108487B2 (enExample)
EP (1) EP3475823B1 (enExample)
JP (1) JP6943890B2 (enExample)
KR (1) KR102433782B1 (enExample)
CN (1) CN109313594B (enExample)
SG (1) SG11201810111UA (enExample)
WO (1) WO2017222784A1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10606587B2 (en) * 2016-08-24 2020-03-31 Micron Technology, Inc. Apparatus and methods related to microcode instructions indicating instruction types
CN115081429B (zh) * 2022-07-07 2024-10-22 北京微纳星空科技股份有限公司 一种指令校验方法、装置、设备和存储介质
US12399766B2 (en) 2023-01-12 2025-08-26 Nxp Usa, Inc. Central processing unit system and method with improved self-checking
US20250217230A1 (en) * 2023-12-27 2025-07-03 Nxp Usa, Inc. System and method of checking integrity of an instruction decoder of a processing system

Citations (3)

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CN1326132A (zh) * 2000-05-25 2001-12-12 斯罗扬有限公司 具有压缩指令的处理器及处理器指令的压缩方法
CN102160031A (zh) * 2008-09-23 2011-08-17 高通股份有限公司 用以执行线性反馈移位指令的系统及方法
CN103534952A (zh) * 2011-04-08 2014-01-22 美光科技公司 使用低密度奇偶校验码的编码及解码技术

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US4005405A (en) 1975-05-07 1977-01-25 Data General Corporation Error detection and correction in data processing systems
US6041430A (en) * 1997-11-03 2000-03-21 Sun Microsystems, Inc. Error detection and correction code for data and check code fields
US7013454B2 (en) 1999-02-22 2006-03-14 Sun Microsystems, Inc. Thread suspension system and method using trapping instructions
US6738892B1 (en) 1999-10-20 2004-05-18 Transmeta Corporation Use of enable bits to control execution of selected instructions
US6934903B1 (en) * 2001-12-17 2005-08-23 Advanced Micro Devices, Inc. Using microcode to correct ECC errors in a processor
US7240277B2 (en) 2003-09-26 2007-07-03 Texas Instruments Incorporated Memory error detection reporting
US7370230B1 (en) 2004-01-08 2008-05-06 Maxtor Corporation Methods and structure for error correction in a processor pipeline
US7302619B1 (en) * 2004-07-06 2007-11-27 Mindspeed Technologies, Inc. Error correction in a cache memory
TW200604934A (en) * 2004-07-16 2006-02-01 Benq Corp Firmware management system and method thereof
US7447948B2 (en) * 2005-11-21 2008-11-04 Intel Corporation ECC coding for high speed implementation
US20080256419A1 (en) 2007-04-13 2008-10-16 Microchip Technology Incorporated Configurable Split Storage of Error Detecting and Correcting Codes
US8135927B2 (en) * 2007-09-28 2012-03-13 International Business Machines Corporation Structure for cache function overloading
US8201067B2 (en) * 2008-02-25 2012-06-12 International Business Machines Corporation Processor error checking for instruction data
JP2009238168A (ja) * 2008-03-28 2009-10-15 Mitsubishi Electric Corp マイクロプロセッサ
US8812855B2 (en) * 2009-03-02 2014-08-19 Nxp B.V. Software protection
US8904115B2 (en) 2010-09-28 2014-12-02 Texas Instruments Incorporated Cache with multiple access pipelines
US9176739B2 (en) * 2011-08-05 2015-11-03 Cisco Technology, Inc. System and method for checking run-time consistency for sequentially and non-sequentially fetched instructions
US20140089755A1 (en) * 2012-09-27 2014-03-27 Shveta KANTAMSETTI Reliability enhancements for high speed memory - parity protection on command/address and ecc protection on data
US20140244932A1 (en) * 2013-02-27 2014-08-28 Advanced Micro Devices, Inc. Method and apparatus for caching and indexing victim pre-decode information
CN103279329B (zh) * 2013-05-08 2015-07-29 中国人民解放军国防科学技术大学 支持同步edac校验的高效取指流水线
CN103645964B (zh) * 2013-11-22 2017-05-10 中国电子科技集团公司第三十二研究所 嵌入式处理器的高速缓存容错机制

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1326132A (zh) * 2000-05-25 2001-12-12 斯罗扬有限公司 具有压缩指令的处理器及处理器指令的压缩方法
CN102160031A (zh) * 2008-09-23 2011-08-17 高通股份有限公司 用以执行线性反馈移位指令的系统及方法
CN103534952A (zh) * 2011-04-08 2014-01-22 美光科技公司 使用低密度奇偶校验码的编码及解码技术

Also Published As

Publication number Publication date
JP2019519858A (ja) 2019-07-11
JP6943890B2 (ja) 2021-10-06
KR20190021247A (ko) 2019-03-05
BR112018076279A8 (pt) 2023-01-31
EP3475823A1 (en) 2019-05-01
KR102433782B1 (ko) 2022-08-17
EP3475823B1 (en) 2022-04-20
WO2017222784A1 (en) 2017-12-28
CN109313594A (zh) 2019-02-05
BR112018076279A2 (pt) 2019-03-26
SG11201810111UA (en) 2019-01-30
US10108487B2 (en) 2018-10-23
US20170371739A1 (en) 2017-12-28

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