CN109301023A - Photodiode and preparation method thereof, flat panel detector - Google Patents
Photodiode and preparation method thereof, flat panel detector Download PDFInfo
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- CN109301023A CN109301023A CN201811160076.5A CN201811160076A CN109301023A CN 109301023 A CN109301023 A CN 109301023A CN 201811160076 A CN201811160076 A CN 201811160076A CN 109301023 A CN109301023 A CN 109301023A
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- 239000002210 silicon-based material Substances 0.000 claims description 10
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
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- 206010019133 Hangover Diseases 0.000 description 2
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- MCVAAHQLXUXWLC-UHFFFAOYSA-N [O-2].[O-2].[S-2].[Gd+3].[Gd+3] Chemical compound [O-2].[O-2].[S-2].[Gd+3].[Gd+3] MCVAAHQLXUXWLC-UHFFFAOYSA-N 0.000 description 2
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- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
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- 229910052792 caesium Inorganic materials 0.000 description 1
- TVFDJXOCXUVLDH-UHFFFAOYSA-N caesium atom Chemical compound [Cs] TVFDJXOCXUVLDH-UHFFFAOYSA-N 0.000 description 1
- XQPRBTXUXXVTKB-UHFFFAOYSA-M caesium iodide Chemical compound [I-].[Cs+] XQPRBTXUXXVTKB-UHFFFAOYSA-M 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
Abstract
The invention discloses a kind of photodiode and preparation method thereof, flat panel detector, which includes: substrate；Working electrode, intermediate insulating layer, active layer, passivation layer and output electrode are sequentially formed on the substrate, wherein, the output electrode is electrically connected by the via hole through the intermediate insulating layer, the active layer and the passivation layer with the working electrode, and the active layer includes amorphous silicon layer and crystallization semiconductor layer.The photodiode response speed faster, to visible light has higher absorptivity, and has broader absorption spectrum ranges.
Description
Technical field
The present invention relates to field of sensing technologies more particularly to photodiode and preparation method thereof, flat panel detector.
Background technique
Flat panel detector is widely used in the fields such as x-ray imaging and ultrasonic imaging.X-ray imaging flat panel detector
It is the working principle based on the indirect-converting type more used at present, basic structure is that surface is one layer of scintillator material (iodine
Change caesium or gadolinium oxysulfide), scintillator material layer lower layer is the photodiode array of matrix arrangement.
Currently, be mainly PIN type photodiode using amorphous silicon (a-Si) as the photodiode of active layer, tool
Have that leakage current is low, the higher advantage of Quantum detection efficiency, but when preparing PIN type photodiode, it needs repeatedly to carry out ion
The doping process of injection is to form P layers therein and N layers, and the process is more complicated.
The photodiode of MSM (metal-semiconductor-metal) type, manufacture craft is relatively easy, Quantum detection efficiency
Height, but its response speed is poor compared with PIN type photodiode.Therefore, the response speed of the photodiode of MSM type how is promoted
It is a problem to be solved.
Summary of the invention
The present invention provides a kind of photodiode and preparation method thereof, flat panel detector, to solve in the related technology not
Foot.
According to a first aspect of the embodiments of the present invention, a kind of photodiode is provided, comprising:
Substrate；
Working electrode, intermediate insulating layer, active layer, passivation layer and output electrode are sequentially formed on the substrate, wherein
The output electrode passes through the via hole and the working electrode through the intermediate insulating layer, the active layer and the passivation layer
Electrical connection, the active layer includes amorphous silicon layer and crystallization semiconductor layer.
Optionally, the crystallization semiconductor layer and the amorphous silicon layer are to be sequentially formed at folding on the intermediate insulating layer
Layer structure.
Optionally, the crystallization semiconductor layer is polysilicon layer, semiconductor type carbon nano-tube film layer or molybdenum disulfide
Any one in film layer.
Optionally, the crystallization semiconductor layer is polysilicon layer, and the polysilicon layer includes being sequentially formed at the centre
The first polysilicon layer and the second polysilicon layer on insulating layer；
Second polysilicon layer includes multiple second multi-crystal silicon areas, and the amorphous silicon layer includes multiple amorphous silicon regions, institute
It states the second multi-crystal silicon area and the amorphous silicon region is arranged alternately；
First polysilicon layer is connected with each second multi-crystal silicon area.
Optionally, the output electrode is transparent conductive electrode.
Optionally, it is staggeredly set through the via hole of the intermediate insulating layer and active layer with the via hole through the passivation layer
It sets.
According to a second aspect of the embodiments of the present invention, a kind of preparation method of photodiode is provided, comprising:
One substrate is provided；
Working electrode, intermediate insulating layer, active layer, passivation layer and output electrode are sequentially formed over the substrate, wherein
Via hole is respectively formed in the intermediate insulating layer, the active layer and the passivation layer, the output electrode is by running through institute
The via hole for stating intermediate insulating layer, the active layer and the passivation layer is connect with the working electrode, and the active layer includes non-
Crystal silicon layer and crystallization semiconductor layer.
Optionally, the formation active layer includes:
The crystallization semiconductor layer and the amorphous silicon layer are sequentially formed on the working electrode.
Optionally, the crystallization semiconductor layer is polysilicon layer, and the polysilicon layer includes the first polysilicon layer and second
Polysilicon layer, second polysilicon layer include multiple second multi-crystal silicon areas；The formation active layer includes:
The first polysilicon layer is formed on the working electrode；
Amorphous silicon material layer is formed on first polysilicon layer；
Crystallizing treatment is carried out to multiple regional areas being spaced apart from each other of the amorphous silicon material layer, forms multiple more than second
Crystal silicon area, each region for not carrying out the amorphous silicon material layer of Crystallizing treatment form each amorphous silicon region；
Wherein, second multi-crystal silicon area and the amorphous silicon region are arranged alternately, first polysilicon layer and each institute
The second multi-crystal silicon area is stated to connect.
According to a third aspect of the embodiments of the present invention, a kind of flat panel detector is provided, comprising: any of the above-described photoelectricity
Diode.
According to the above technical scheme it is found that the photodiode, response speed faster, to visible light have higher absorption
Rate is high, and has broader absorption spectrum ranges.
It should be understood that above general description and following detailed description be only it is exemplary and explanatory, not
It can the limitation present invention.
Detailed description of the invention
The drawings herein are incorporated into the specification and forms part of this specification, and shows and meets implementation of the invention
Example, and be used to explain the principle of the present invention together with specification.
Fig. 1 is the schematic diagram of the section structure of the photodiode shown in an exemplary embodiment of the invention；
Fig. 2 is the schematic diagram of the section structure of the photodiode shown in another exemplary embodiment of the present invention；
Fig. 3 is the schematic diagram of the section structure of the photodiode shown in another exemplary embodiment of the present invention；
It is each to walk when Fig. 4 a- Fig. 4 j is the preparation method using the photodiode shown in an exemplary embodiment of the invention
The schematic diagram of the section structure of photodiode in rapid；
Fig. 5 be shown in an of the invention exemplary embodiment under two kinds of intensities of illumination, photodiode in 100V and
Resonse characteristic under 105V bias；
When Fig. 6 a- Fig. 6 b is the preparation method using the photodiode shown in another exemplary embodiment of the present invention, respectively
The schematic diagram of the section structure of photodiode in step；
When Fig. 7 a- Fig. 7 b is the preparation method using the photodiode shown in another exemplary embodiment of the present invention, respectively
The schematic diagram of the section structure of photodiode in step.
Specific embodiment
Example embodiments are described in detail here, and the example is illustrated in the accompanying drawings.Following description is related to
When attached drawing, unless otherwise indicated, the same numbers in different drawings indicate the same or similar elements.Following exemplary embodiment
Described in embodiment do not represent all embodiments consistented with the present invention.On the contrary, they be only with it is such as appended
The example of device and method being described in detail in claims, some aspects of the invention are consistent.
The basic structure of X-ray flat panel detector is that surface is one layer of scintillator material (cesium iodide or gadolinium oxysulfide), is dodged
Shuo Ti material layer lower layer is the photodiode array of matrix arrangement.
Incident X-ray on it can be converted to visible light, photodiode array by the scintillator material positioned at surface
Again it will be seen that light is converted to electric signal, the size of electric signal is directly proportional to the incident intensity of X-ray, reads photoelectricity by scanning
The electric signal of diode array output, then digital signal is converted thereof into, X-ray digital image can be formed by image procossing.
Above-mentioned photodiode can use the photodiode of MSM type, need to be promoted MSM type photodiode at present
Response speed, in response to this problem, the embodiment of the present invention provides a kind of photodiode, comprising:
Substrate；
Working electrode, intermediate insulating layer, active layer, passivation layer and output electrode are sequentially formed on substrate, wherein output
Electrode is electrically connected by the via hole through intermediate insulating layer, active layer and passivation layer with working electrode, and active layer includes amorphous silicon
Layer and crystallization semiconductor layer.
Substrate can be the substrate of multiple material, such as glass base for carrying each layer structure being disposed thereon, substrate
Plate or plastic base etc..
Working electrode is the electrode for being biased signal to photodiode, and working electrode generally includes two, to
Two working electrodes apply voltage signal of different sizes, and to generate bias between two electrodes, output electrode is for outside
The electric signal that portion's element output photoelectric diode generates, the preferable material system of electric conductivity can be used in working electrode and output electrode
Make, such as conductive metal, conductive metal specifically include: molybdenum (Mo), copper (Cu) and aluminium (Al) etc..
Active layer is semiconductor material layer, and active layer is photoelectric conversion layer, can convert the light to electric signal, and then pass through
Output electrode exports the electric signal.
Intermediate insulating layer is used to play the role of working electrode and the mutually isolated layer of active layer to reduce dark current.It is blunt
Change layer and be used for the layer that active layer and output electrode is mutually isolated, the material of intermediate insulating layer and passivation layer can be inorganic insulation
Material or organic insulating material, inorganic insulating material are, for example, silica (SiOx), silicon nitride (SiNx), aluminium oxide (Al2O3)
Deng organic insulating material is, for example, polyimides PI (Polyimide, abbreviation PI) etc..
The working principle of above-mentioned photodiode is as follows: in photodiode work, applying to two working electrode
Different voltage signals, such as apply positive voltage signal to a working electrode, apply negative voltage signal to a working electrode,
Certain bias is generated between two working electrodes, electric field can be formed in active layer, when incident ray is irradiated to active layer
When upper, electron-hole pair was generated in active layer, under the action of electric field, electron-hole pair is separated into electrons and holes, and divides
It does not drift about to two working electrodes, ultimately forms electric signal after intermediate insulating layer, the intensity of incident ray and electric signal
Size is directly proportional, and the electric signal of formation is exported through output electrode.
In the present embodiment, the active layer in photodiode includes amorphous silicon layer and crystallization semiconductor layer, wherein amorphous silicon
(also known as a-Si) layer is the film layer with semiconductor property, and optical band gap is 1.7eV or so, to the absorption efficiency of visible light
It is higher, and it is possible to which the inexpensive uniform amorphous silicon layer of formation on substrate, advantageously reduces being prepared into for photodiode
This.
Crystallization semiconductor layer in active layer also has the property of semiconductor, and the semiconductor layer by crystallization has higher
Carrier mobility can increase the drift velocity of photo-generated carrier, improve the response speed of photodiode, and crystallization half
Conductor layer has higher absorptivity height to visible light, and has broader absorption spectrum ranges, and photodiode can be improved
Electric property and working efficiency.
Fig. 1 is the schematic diagram of the section structure of the exemplary photodiode for implementing to provide of the present invention one, shown referring to Fig.1,
The photodiode includes:
Substrate 10；
Working electrode 20, intermediate insulating layer 30, active layer 40, passivation layer 50 and output electrode are sequentially formed on substrate 10
60, working electrode 20 includes first electrode 21 and second electrode 22；
Active layer 40 includes the crystallization semiconductor layer 41 and amorphous silicon layer 42 being sequentially formed on intermediate insulating layer 30；
Be respectively formed with via hole in intermediate insulating layer 30, active layer 40 and passivation layer 50, output electrode 60 by running through in
Between the via hole of insulating layer 30, active layer 40 and passivation layer 50 be electrically connected with working electrode 20.
A kind of parallel terrace photodiode is present embodiments provided, active layer therein is by crystallization semiconductor layer
With the double-layer overlapped layered structure of amorphous silicon layer composition.
Crystallization semiconductor layer can be the polysilicon layer formed after carrying out Crystallizing treatment to amorphous silicon material, Huo Zheye
It can be for monocrystalline or polycrystalline crystallization property semiconductor layer, such as carbon nano-tube film layer, molybdenum disulfide film layer.
Polysilicon is a kind of form of elemental silicon, silicon atom with diamond lattice morphologic arrangement at many nucleus, such as these
Nucleus grows up to the different crystal grain of high preferred orientation, then these crystal grain, which combine, crystallizes into polysilicon.Polysilicon has semiconductive
Matter and higher photoelectric conversion efficiency, therefore, polysilicon layer helps to improve the response speed of photodiode.
Carbon nanotube also known as Baji-tube are that a kind of have special construction (radial dimension is nanometer scale, and axial dimension is
Micron dimension, pipe both ends are substantially all sealing) One-dimensional Quantum material, be mainly made of the carbon atom of hexagonal arrangement
Several layers to tens of layers of coaxial round tube.
It can be classified as metal mold carbon nanotube and semiconductor type carbon nano-tube according to the conduction property of carbon nanotube, this
The carbon nano-tube film layer formed by semiconductor type carbon nano-tube in embodiment, semiconductor type carbon nano-tube film layer have compared with
High electron mobility helps to improve the response speed of photodiode.
Molybdenum disulfide film layer is platelike molybdenumdisulfide (MoS2), it is a kind of two-dimentional Transition-metal dichalcogenide, tool
There is class graphene-structured, is capable of forming fullerene structure nanoparticle and nanotube, band gap is about 1.9eV, and luminous efficiency is high,
And there is good carrier transport performance, molybdenum disulfide film layer helps to improve the response speed of photodiode.
Fig. 2 is the schematic diagram of the section structure that another exemplary of the present invention implements the photodiode provided, referring to Fig. 2 institute
Show, which includes:
Substrate 10；
Working electrode 20, intermediate insulating layer 30, active layer 40, passivation layer 50 and output electrode are sequentially formed on substrate 10
60, working electrode 20 includes first electrode 21 and second electrode 22；
Be respectively formed with via hole in intermediate insulating layer 30, active layer 40 and passivation layer 50, output electrode 60 by running through in
Between the via hole of insulating layer 30, active layer and passivation layer 50 be electrically connected with working electrode 20.
Active layer 40 includes polysilicon layer and amorphous silicon layer, and polysilicon layer includes being sequentially formed on intermediate insulating layer 30
First polysilicon layer 43 and the second polysilicon layer 44；
Second polysilicon layer 44 includes multiple second multi-crystal silicon areas 441, and amorphous silicon layer 45 includes multiple amorphous silicon regions 451,
Second multi-crystal silicon area 441 and amorphous silicon region 451 are arranged alternately；First polysilicon layer 43 connects with each second multi-crystal silicon area 441
Touching connection.
In the present embodiment, active layer be polysilicon layer and the alternatively distributed vertical interlaced type photodiode of amorphous silicon layer,
Polysilicon layer include along underlay substrate horizontal direction (such as direction shown in solid line A as shown in the figure) distribution the first polysilicon layer and
The second polysilicon layer being distributed along the vertical direction (such as direction shown in solid line B as shown in the figure) of underlay substrate, and polysilicon layer
Carrier mobility it is higher, can achieve 100cm2/ Vs or more, it is thus possible to improve the biography of carrier in the horizontal direction
Movement Capabilities further increase the transmittability of carrier in vertical direction.
Also, by forming the second polysilicon layer in amorphous silicon layer, the trap density in amorphous silicon layer can be reduced, and
And increase the drift velocity of photo-generated carrier, compared with prior art, the quantum efficiency of the photodiode is higher, response speed
Faster.
For vertical interlaced type photodiode, referring to shown in Fig. 3, the first polysilicon in above-mentioned active layer 40
Layer 43 can also be only located between second multi-crystal silicon area 441 at two edges along the transverse extension direction of underlay substrate, can also be with
Realize that the purpose for connecting the first polysilicon layer 43 with each second multi-crystal silicon area 441, the present invention do not limit this.
In some instances, output electrode is transparent conductive electrode.
Output electrode side is the side of light incidence, and output electrode uses transparent conductive electrode, light can be improved
It is incident to the transmitance of active layer, helps to improve the external quantum efficiency of photodiode, greatly improves its response speed.
The material of transparent conductive electrode be, for example, indium tin oxide ITO (Indium Tin Oxides, abbreviation ITO) or its
His transparent conductive material.
In an optional embodiment, referring to Fig.1 or shown in Fig. 2, through intermediate insulating layer 30 and active layer 40
Via hole (referred to as the first via hole 71) is staggered with the via hole (referred to as the first via hole 72) through passivation layer 50.
The first via hole 71 through intermediate insulating layer 30 and active layer 40 and the second via hole 72 through passivation layer 50 are mutually
Staggeredly, i.e. the projection of 71 region of the first via hole and 72 region of the second via hole on same plane (such as substrate) is at least
Part is not overlapped.
When depositing output electrode material layer on the passivation layer, output electrode material not only be will form on the passivation layer, also can
Certain thickness output electrode material is formed in the first via hole and the second via hole, due to the presence of the first via hole, will cause this
There is certain difference in height with the film layer outside hole in place hole, thickness of the photoresist at this will be more much thicker than other regions, this will
So that the Patternized technique of the second via hole becomes difficult.Therefore, the first via hole and the second via hole are arranged in a staggered manner to evade above-mentioned ask
Topic.
It should be noted that the thickness of crystallization semiconductor layer therein is much smaller than amorphous silicon layer for active layer
Thickness.
The embodiment of the present invention also provides a kind of preparation method of photodiode, this method comprises:
Step S10, a substrate is provided；
Step S20, working electrode, intermediate insulating layer, active layer, passivation layer and output electrode are sequentially formed on substrate,
Wherein, via hole is respectively formed in intermediate insulating layer, active layer and passivation layer, output electrode is by running through intermediate insulating layer, having
The via hole of active layer and passivation layer is electrically connected with working electrode, and active layer includes amorphous silicon layer and crystallization semiconductor layer.
In an optional embodiment, forming active layer includes:
Crystallization semiconductor layer and amorphous silicon layer are sequentially formed on the working electrode (s.
In some instances, the crystallization semiconductor layer is polysilicon layer, and the polysilicon layer includes the first polysilicon layer
With the second polysilicon layer, second polysilicon layer includes multiple second multi-crystal silicon areas；The formation active layer includes:
The first polysilicon layer is formed on the working electrode；
Amorphous silicon material layer is formed on first polysilicon layer；
Crystallizing treatment is carried out to multiple regional areas being spaced apart from each other of the amorphous silicon material layer, forms multiple more than second
Crystal silicon area, each region for not carrying out the amorphous silicon material layer of Crystallizing treatment form each amorphous silicon region；
Wherein, second multi-crystal silicon area and the amorphous silicon region are arranged alternately, first polysilicon layer and each institute
The second multi-crystal silicon area is stated to connect.
Above-mentioned preparation method can be used for preparing photodiode provided in an embodiment of the present invention, for tying shown in Fig. 1 and Fig. 2
The detailed preparation process of the photodiode of structure, is described in detail below.
The preparation process of photodiode shown in FIG. 1 can be divided into two kinds of situations, and one is the crystallization in active layer partly to lead
It is semiconductor type carbon nano-tube film layer or two sulphur one is the crystallization semiconductor layer in active layer when body layer is polysilicon layer
When changing molybdenum film layer.
When the crystallization semiconductor layer in active layer is polysilicon layer, the specific preparation process of photodiode shown in Fig. 1
The following steps are included:
Step S100, a substrate 10 is provided；
The substrate is, for example, glass substrate, can also further be cleaned to substrate.
Step S110, conductive material layer 200 as shown in fig. 4 a, is formed on substrate 10；
Conductive material layer is, for example, metallic diaphragm, certain thickness gold can be formed on the substrate with sputtering of materials coating process
Belong to film layer, the thickness of metallic diaphragm is, for example, 100nm (nanometer).
Step S120, as shown in Figure 4 b, conductive material layer 200 is patterned to form working electrode 20, working electrode 20
For example including first electrode 21 and second electrode 22；
Conductive material layer is patterned using patterning processes, forms the figure of first electrode and second electrode.
Step S130, intermediate insulating layer 30 as illustrated in fig. 4 c, is formed on the working electrode (s；
The vapour deposition process PECVD that plasma enhanced chemical can be used deposits certain thickness insulation on the working electrode (s
Material layer, the insulation material layer are intermediate insulating layer；
The material of intermediate insulating layer is if inorganic material, such as silica (SiOx), silicon nitride (SiNx) or aluminium oxide
(Al2O3), thickness can be 400-500nm.The material of intermediate insulating layer is thick if organic material, such as polyimides PI
Degree can be 200nm.
Step S140, the first amorphous silicon layer 400 as shown in figure 4d, is formed on intermediate insulating layer 30；
Vapour deposition process PECVD (the Plasma Enhanced Chemical of plasma enhanced chemical can be used
Vapor Deposition, abbreviation PECVD) deposit certain thickness first amorphous silicon layer on the working electrode (s, i.e. a-Si layers,
The thickness of one amorphous silicon layer is, for example, 30-70nm.
Step S150, Crystallizing treatment as shown in fig 4e, is carried out to the first amorphous silicon layer 400 and forms polysilicon layer 41；
Quasi-molecule laser annealing ELA (Excimer Laser Annealing, abbreviation ELA) technique can be used by amorphous silicon
Layer is converted into polysilicon layer, and the carrier mobility of polysilicon layer can be greater than 100cm2/Vs。
Step S160, the second amorphous silicon layer 42 as shown in fig. 4f, is formed on polysilicon layer 41；
The vapour deposition process PECVD that plasma enhanced chemical can be used deposits certain thickness second on the polysilicon layer
Amorphous silicon layer, the thickness of the second amorphous silicon layer are, for example, 400-500nm, which is the amorphous silicon in active layer
Layer.
Step S170, it as shown in figure 4g, is formed in intermediate insulating layer 30, polysilicon layer 41 and the second amorphous silicon layer 42
Form the first via hole 71；
Intermediate insulating layer 30, polysilicon layer 41 and the second amorphous silicon layer 42 are patterned using patterning processes, right
The position of pre-formed output electrode is answered to form the first mistake through intermediate insulating layer 30, polysilicon layer 41 and the second amorphous silicon layer 42
Hole 71.
Step S180, the first conductive layer 81 as shown in figure 4h, is formed in the first via hole 71；
Can first using plasma enhancing chemistry vapour deposition process PECVD deposited on the second amorphous silicon layer 41 centainly
The conductive material of thickness；
The conductive material is patterned using patterning processes later, removes the conductive material in other regions, reservation
Conductive material in first via hole 71 forms the first conductive layer 81.
Step S190, passivation layer 50 as shown in figure 4i, is formed on the second amorphous silicon layer 42；
Can be used plasma enhanced chemical vapour deposition process PECVD deposited on the second amorphous silicon layer it is certain thickness
The material of passivation layer, passivation layer can be silicon nitride, and the thickness of passivation layer is, for example, 100-500nm.
Step S200, the second via hole 72 as shown in figure 4j, is formed in 50 layers of passivation layer；
Passivation layer is patterned using patterning processes, is formed in the position of the pre-formed output electrode of correspondence through passivation
The second via hole layer by layer.
Step S210, as shown in Figure 1, forming output electrode 60 on passivation layer 50；
Can first using plasma enhancing chemistry vapour deposition process PECVD deposit certain thickness lead on the passivation layer
Material layer；
The conductive material layer is patterned using patterning processes later, the conductive material layer of reservation forms output electrode
60, also, conductive material layer also will form in the second via hole 72 simultaneously, and the material layer in the second via hole 72 forms second
Conductive layer 82.
The second conductive layer in the second via hole and the thickness of output electrode are, for example, 135nm.
Shown in referring to Fig.1, working electrode 60 is by the first conductive layer 81 in the first via hole 71 and is located at the second mistake
The second conductive layer 72 in hole 72 is electrically connected with output electrode (second electrode 22).
For this field, working electrode passes through the first via hole and the second via hole and output electrode (second electrode 22) electricity
Connection, namely refer to first conductive layer of the working electrode by being located in the first via hole and the second conductive layer in the second via hole
It is electrically connected with output electrode (second electrode 22).
For the photodiode formed using above-mentioned preparation method, by carrying out illumination survey to the photodiode
Examination experiment is it is found that the response speed of the photodiode improves a lot.
Referring to Figure 5, abscissa indicates the time in figure, and unit is second (S), and ordinate indicates photodiode output
Electric current, unit is ampere (A).
It is shown in figure under two kinds of intensities of illumination, response characteristic of the photodiode under 100V and 105V bias, wherein
It is 300nW/cm that the first two pulse, which is intensity of illumination, in figure2When, the photoelectric current that photodiode generates, latter two pulse is illumination
Intensity is 1000nW/cm2When, the photoelectric current that photodiode generates, black curve and blue curve are the survey under 100V bias
Data are tried, yellow curve and orange curve are the test data under 105V bias, at similarity condition retest 1 time, so
To 4 curves.
The test experiments curve as shown in above-mentioned figure it is found that the photodiode in different biass and different illumination intensity
When, the corresponding hangover time of failing edge of the photoelectric current generated can be reduced within 10-20s, be less than conventional photodiode
Hangover time 30s, thus illustrate the response speed of the photodiode faster.
Crystallization semiconductor layer in the photodiode of the structure shown in Fig. 1 in active layer is that semiconductor type carbon nano-tube is thin
When film layer or molybdenum disulfide film layer, preparation detailed process is the difference is that step S140 and step S150, other steps
It is rapid identical, specifically, step S140 and step S150 could alternatively be following step:
Step S141, semiconductor type carbon nano-tube film layer or molybdenum disulfide film layer are formed on intermediate insulating layer；
Semiconductor type carbon nano-tube solution is formed in working electrode surface by modes such as spin coating, sprays, is formed random
Network-like film is as semiconductor type carbon nano-tube film layer.
Transfer method can be used, the single-layer or multi-layer molybdenum disulfide film of large area is transferred to working electrode surface, with
One or more layers molybdenum disulfide film layer is formed on working electrode；Or use chemical gaseous phase deposition CVD (Chemical Vapor
Deposition, abbreviation CVD) method deposits to form molybdenum disulfide film layer in electrode layer.
The second amorphous silicon layer work can be formed in semiconductor type carbon nano-tube film layer or molybdenum disulfide film layer later
For the amorphous silicon layer in active layer.
For forming the specific preparation process of photodiode shown in Fig. 2, the difference is that above-mentioned steps
S160, other steps are identical, specifically, step S160 could alternatively be following step S161-S162:
In above-mentioned steps S150, carrying out the polysilicon layer formed after Crystallizing treatment to the first amorphous silicon layer is knot shown in Fig. 2
The first polysilicon layer 43 in the active layer of structure；
Step S161 is carried out later, referring to shown in Fig. 6 a, the second amorphous silicon layer 440 is formed on the first polysilicon layer 43；
The vapour deposition process PECVD that plasma enhanced chemical can be used deposits certain thickness second on the polysilicon layer
Amorphous silicon layer 440.
Step S162, referring to shown in Fig. 6 b, using excimer laser degeneration ELA technique, to more in the second amorphous silicon layer 440
A regional area being spaced apart from each other carries out Crystallizing treatment, i.e., the selective partial region to the second amorphous silicon 440 carries out crystallization
Processing is converted to polysilicon by the second amorphous silicon layer 440 of each regional area of Crystallizing treatment, forms multiple second polysilicons
Area 441, the amorphous silicon layer property for not carrying out Crystallizing treatment region do not change, and form each amorphous silicon region 451.
Also, the second multi-crystal silicon area 441 and amorphous silicon region 451 are arranged alternately, since the first polysilicon layer 43 is located at each the
One layer on two multi-crystal silicon areas 441, the first polysilicon layer 43 is connected with each second multi-crystal silicon area 441.
For forming the specific preparation process of photodiode shown in Fig. 3, the difference is that above-mentioned steps
S150-S160, other steps are identical, specifically, step S150 could alternatively be following step S151:
Step S151, non-to first referring to shown in Fig. 7 a after forming the first amorphous silicon layer 400 as shown in figure 4d
The regional area of crystal silicon layer 400 carries out Crystallizing treatment, converts by the first amorphous silicon layer 400 of the regional area of Crystallizing treatment
For polysilicon, the first polysilicon layer 43 is formed, other are constant without the property of the first amorphous silicon layer of Crystallizing treatment.
Step S161 and S162 in the above-described embodiment executed later, form structure as shown in Figure 7b.
Patterning processes described above for example, the coating of photoresist, exposure, development, the stripping of etching and/or photoresist
From process, for have technique, details are not described herein again for detailed process.
The embodiment of the invention also provides a kind of flat panel detectors, comprising: two pole of photoelectricity described in any of the above-described embodiment
Pipe.
Its detection accuracy and response speed can be improved by using the photodiode of above-described embodiment in the flat panel detector
Degree.
The present invention is directed to cover any variations, uses, or adaptations of the invention, these modifications, purposes or suitable
The variation of answering property follows general principle of the invention and including the undocumented common knowledge in the art of the present invention or used
Use technological means.The description and examples are only to be considered as illustrative, and true scope and spirit of the invention are by following right
It is required that pointing out.
Claims (10)
1. a kind of photodiode characterized by comprising
Substrate；
Working electrode, intermediate insulating layer, active layer, passivation layer and output electrode are sequentially formed on the substrate, wherein described
Output electrode is electrically connected by the via hole through the intermediate insulating layer, the active layer and the passivation layer with the working electrode
It connects, the active layer includes amorphous silicon layer and crystallization semiconductor layer.
2. photodiode according to claim 1, which is characterized in that
The crystallization semiconductor layer and the amorphous silicon layer are the laminated construction being sequentially formed on the intermediate insulating layer.
3. photodiode according to claim 1, which is characterized in that
The crystallization semiconductor layer is appointing in polysilicon layer, semiconductor type carbon nano-tube film layer or molybdenum disulfide film layer
It anticipates one kind.
4. photodiode according to claim 1, which is characterized in that
The crystallization semiconductor layer is polysilicon layer, and the polysilicon layer includes the be sequentially formed on the intermediate insulating layer
One polysilicon layer and the second polysilicon layer；
Second polysilicon layer includes multiple second multi-crystal silicon areas, and the amorphous silicon layer includes multiple amorphous silicon regions, and described
Two multi-crystal silicon areas and the amorphous silicon region are arranged alternately；
First polysilicon layer is connected with each second multi-crystal silicon area.
5. photodiode according to claim 1-3, which is characterized in that
The output electrode is transparent conductive electrode.
6. photodiode according to claim 1-3, which is characterized in that
It is staggered through the via hole of the intermediate insulating layer and active layer and the via hole through the passivation layer.
7. a kind of preparation method of photodiode, which is characterized in that
One substrate is provided；
Working electrode, intermediate insulating layer, active layer, passivation layer and output electrode are sequentially formed over the substrate, wherein in institute
It states and is respectively formed via hole in intermediate insulating layer, the active layer and the passivation layer, the output electrode is by described
Between the via hole of insulating layer, the active layer and the passivation layer connect with the working electrode, the active layer includes amorphous silicon
Layer and crystallization semiconductor layer.
8. the method according to the description of claim 7 is characterized in that the formation active layer includes:
The crystallization semiconductor layer and the amorphous silicon layer are sequentially formed on the working electrode.
9. the method according to the description of claim 7 is characterized in that the crystallization semiconductor layer is polysilicon layer, the polycrystalline
Silicon layer includes the first polysilicon layer and the second polysilicon layer, and second polysilicon layer includes multiple second multi-crystal silicon areas；It is described
Forming active layer includes:
The first polysilicon layer is formed on the working electrode；
Amorphous silicon material layer is formed on first polysilicon layer；
Crystallizing treatment is carried out to multiple regional areas being spaced apart from each other of the amorphous silicon material layer, forms multiple second polysilicons
Area, each region for not carrying out the amorphous silicon material layer of Crystallizing treatment form each amorphous silicon region；
Wherein, second multi-crystal silicon area and the amorphous silicon region are arranged alternately, first polysilicon layer and each described the
Two multi-crystal silicon areas connect.
10. a kind of flat panel detector characterized by comprising photodiode described in any one of claims 1-6.
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