CN109273477B - CMOS-TDI image sensor and forming method thereof - Google Patents
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Abstract
A CMOS-TDI image sensor and a method of forming the same, wherein the CMOS-TDI image sensor comprises: the display device comprises a substrate, a plurality of pixel regions and a plurality of pixel regions, wherein the substrate comprises a plurality of pixel regions; a plurality of mutually-separated first doping regions positioned in each pixel region substrate; the first grid structure is positioned on the surface of the substrate of each pixel area and spans a plurality of first doping areas. The CMOS-TDI image sensor can improve charge transmission efficiency and image quality.
Description
Technical Field
The invention relates to the field of semiconductors, in particular to a CMOS-TDI image sensor and a forming method thereof.
Background
Time Delay Integration (TDI) image sensors are an evolution of linear image sensors. The imaging mechanism of the time delay integral image sensor is to expose the pixels passing through the object line by line and accumulate the exposure structures, thereby solving the problem of weak imaging signals caused by insufficient exposure time of a high-speed moving object. The time delay integral image sensor can increase effective exposure time and improve the signal-to-noise ratio of the image.
The time delay integration image sensor is divided into a CCD (charge coupled device) and a CMOS (complementary metal oxide semiconductor), however, due to the particularity of the CCD process, other processing circuits cannot be integrated on the image sensor, and the universality and the flexibility are poor.
Another type of TDI image sensor is a CMOS type, which is based on a general CMOS manufacturing process, and each pixel corresponds to a charge transfer region, and charges transferred to the region are converted into voltage signals through a charge amplification block. The line-by-line exposure speed of the sensor array is consistent with the object travelling speed, and each line of pixels outputs a voltage signal. All the M lines of output voltage signals are accumulated, and for the M-level TDI image sensor, the signals are improved by M times, but the voltage domain noise is improved along with the signals.
However, the performance of the existing CMOS-TDI image sensor is still poor.
Disclosure of Invention
The invention aims to provide a CMOS-TDI image sensor and a forming method thereof, so as to improve the performance of the CMOS-TDI image sensor.
In order to solve the above technical problem, the present invention provides a CMOS-TDI image sensor, comprising: the display device comprises a substrate, a plurality of pixel regions and a plurality of pixel regions, wherein the substrate comprises a plurality of pixel regions; a plurality of mutually-separated first doping regions positioned in each pixel region substrate; the first grid structure is positioned on the surface of the substrate of each pixel area and spans a plurality of first doping areas.
Optionally, a plurality of first doping regions in each pixel region are arranged along a first direction; in the first direction, the size of the first doped region is: 1 micron to 10 microns.
Optionally, the minimum distance between the edges of adjacent first doped regions is: 0.5 to 1.5 microns.
Optionally, the depth of the first doped region is: 0.1 to 3 microns.
Optionally, the number of the first doped regions in each pixel region is 2 to 50.
Optionally, the number of the first gate structures in each pixel region is 2 to 4.
Optionally, the first gate structure includes: the first gate dielectric layer is positioned on the surface of the pixel region substrate, and the first electrode layer is positioned on the surface of the first gate dielectric layer; the material of the first gate dielectric layer comprises silicon oxide; the material of the substrate comprises silicon.
Optionally, the plurality of pixel regions are from a1 st-level pixel region to an n-1 st-level pixel region; the substrate is also provided with an nth-level pixel area, and a second doped area is also arranged in the nth-level pixel area; the image sensor further includes: and the second gate structure is positioned on the surface of the second doped region.
Optionally, the plurality of pixel regions are from the 1 st-level pixel region to the nth-level pixel region.
Optionally, the substrate of the pixel region has first ions therein; the first doped region has second ions therein, and the second ions are opposite to the first ions in conductivity type.
Optionally, the substrate further includes a well region, and the well region is grounded.
Optionally, the method further includes: and the metal interconnection layer is positioned on the surface of the first gate structure.
Correspondingly, the invention also provides a method for forming the CMOS-TDI image sensor, which comprises the following steps: providing a substrate, wherein the substrate comprises a plurality of pixel areas; forming a plurality of first doping regions which are separated from each other in each pixel region substrate; and forming a first gate structure on the surface of the substrate of each pixel region, wherein the first gate structure spans a plurality of first doping regions.
Compared with the prior art, the technical scheme of the embodiment of the invention has the following beneficial effects:
in the CMOS-TDI image sensor provided by the technical scheme of the invention, a plurality of mutually-separated first doping regions are formed in each pixel region. Because the first gate structure crosses over the plurality of first doping regions, the first gate structure is not only in surface contact with the first doping regions, but also in surface contact with the substrate between adjacent first doping regions, and the contact area between the first gate structure and the first doping regions is smaller than the sum of the contact areas between the first gate structure and the first doping regions and between the first gate structure and the substrate. Because the contact area between the first gate structure and the first doped region is smaller, the amount of electric charges captured by the defects at the interface of the first gate structure and the first doped region in the transmission process is smaller, so that the loss amount of the electric charges is smaller, and the transmission efficiency of the electric charges is favorably improved.
Furthermore, the pixel areas are from the 1 st-level pixel area to the n-1 st-level pixel area, so that the charge transfer efficiency of the 1 st-level pixel area to the n-1 st-level pixel area is high. The substrate is further provided with an nth-level pixel region, a second doped region is further arranged in the nth-level pixel region, and the CMOS-TDI image sensor further comprises a second gate structure located on the surface of the second doped region. The second doped region is continuous, so that the contact area between the second gate structure and the second doped region is larger, and the improvement of the charge reading efficiency is facilitated. In conclusion, the CMOS-TDI image sensor has high transmission efficiency and high reading efficiency.
Further, the depth of the first doping region is relatively deep, so that the sum of full well capacities of charges in a plurality of first doping regions in each pixel region is still large.
Drawings
Fig. 1 and 2 are schematic structural diagrams of a CMOS-TDI image sensor;
fig. 3 to 7 are schematic structural diagrams of steps of a method for forming a CMOS-TDI image sensor according to an embodiment of the present invention.
Detailed Description
As mentioned in the background, the performance of CMOS-TDI image sensors is still poor.
Fig. 1 and 2 are schematic structural diagrams of a CMOS-TDI image sensor.
Referring to fig. 1 and 2, fig. 2 is a schematic cross-sectional view taken along a line a-a1 in fig. 1, fig. 1 is a top view taken along a direction X in fig. 2, providing a substrate 100, wherein the substrate 100 includes a plurality of pixel regions i, and first doped regions 101 are formed in the pixel regions i; a gate structure 102 is formed on the surface of the substrate 100 in the pixel region i, and the gate structure 102 crosses over the first doped region 101.
In the CMOS-TDI image sensor, the method for forming the first doped region 101 includes: forming a mask layer (not shown in the figure) on a part of the surface of the substrate 100, wherein the mask layer exposes the surface of the substrate 100 in the pixel region I; and performing ion implantation in the substrate 100 by using the mask layer as a mask to form a first doping region 101. It can be seen that the first doping region 101 is continuous, and the contact area between the gate structure 102 and the first doping region 101 is large.
The gate structure 102 includes: a gate dielectric layer (not shown) on the surface of the first doped region 101 and an electrode (not shown) on the surface of the gate dielectric layer. The gate dielectric layer is made of silicon oxide, and the substrate 100 is made of silicon, so that the interface between the gate dielectric layer and the substrate 100 has more defects. When the CMOS-TDI image sensor works, charges are easily captured by the defects at the interface, and the contact area between the gate structure 102 and the first doping region 101 is large, so that the charges captured by the defects are large, and the loss amount of the charges is large, which is not beneficial to improving the Charge Transfer Efficiency (CTE) of the CMOS-TDI image sensor.
In order to solve the technical problem, the present invention provides a CMOS-TDI image sensor, comprising: the display device comprises a substrate, a plurality of pixel regions and a plurality of pixel regions, wherein the substrate comprises a plurality of pixel regions; the first doping area is positioned in each pixel area substrate; the first grid structure is positioned on the surface of the substrate of each pixel area and spans a plurality of first doping areas. The CMOS-TDI image sensor is high in charge transfer efficiency.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Fig. 3 to 7 are schematic structural diagrams of steps of a method for forming a CMOS-TDI image sensor according to an embodiment of the present invention.
Referring to fig. 3, a substrate 200 is provided, wherein the substrate 200 includes a plurality of pixel regions (not shown).
In this embodiment, the material of the substrate 200 is silicon. In other embodiments, the material of the substrate comprises: germanium, silicon germanium, or silicon on insulator.
In the present embodiment, the plurality of pixel regions are the 1 st-level pixel region C1 through the n-1 st-level pixel region Cn-1.
In other embodiments, the plurality of pixel regions are the 1 st-nth-level pixel regions.
The pixel region is used for forming a first doping region and a first grid structure subsequently; the doped region D is used to form a first doped region.
And a first gate structure crossing the plurality of first doping regions is formed subsequently, and because the plurality of first doping regions are separated from each other, the first gate structure is not only in surface contact with the first doping regions, but also in surface contact with the substrate 200 between the adjacent first doping regions, and the contact area between the first gate structure and the first doping regions is smaller than the sum of the contact areas between the first gate structure and the first doping regions and between the first gate structure and the substrate 200. Although the gate structure has more defects at the interface with the substrate 200, the contact area between the first gate structure and the first doped region is smaller, and the charges trapped by the defects at the interface are smaller, so that the loss of the charges is smaller, and therefore, the transfer efficiency of the charges is improved.
The pixel region substrate 200 has first ions therein. In this embodiment, the first ions are P-type ions, such as: boron ions. In other embodiments, the first ions are N-type ions, such as phosphorous ions or arsenic ions.
The substrate 200 further includes a well region (not shown) therein, and the well region is grounded.
Referring to fig. 4, a first doped region 201 is formed in the substrate 200 of each pixel region.
In the present embodiment, the first doping region 201 is formed at the 1 st to n-1 st level pixel regions C1 to Cn-1 in the substrate 200.
In this embodiment, the method further includes: forming a second doping region 202 within the substrate 200 of the nth-level pixel region Cn; the method for forming the first doped region 201 and the second doped region 202 comprises the following steps: forming a mask layer (not shown) on a portion of the surface of the substrate 200 at each of the 1 st-level pixel region C1 through the n-1 st-level pixel region Cn-1; and forming a first doped region 201 in the substrate 200 of the doped region D and a second doped region 202 in the substrate 200 of the nth-level pixel region Cn by using the mask layer as a mask.
In other embodiments, the first doped region is formed in the 1 st to nth pixel regions in the substrate, and the method for forming the first doped region includes: forming a mask layer on part of the surface of the substrate of each of the 1 st-nth pixel areas; and forming a first doped region in each doped region substrate by taking the mask layer as a mask.
In this embodiment, the first doping region 201 is formed on a portion of the surface of the substrate 200 of each of the 1 st to n-1 st pixel regions C1 to Cn-1 in the substrate 200, so that the contact area between the first gate structure formed subsequently in the 1 st to n-1 st pixel regions C1 to Cn-1 and the first doping region 201 is smaller. Although the defects are more at the interfaces of the first gate structures of the 1 st to n-1 st stage pixel regions C1 to Cn-1 and the first doping region 201, since the contact areas of the first gate structures of the 1 st to n-1 st stage pixel regions C1 to Cn-1 and the first doping region 201 are all smaller, the charges captured by the defects in the 1 st to n-1 st stage pixel regions C1 to Cn-1 are less, that is: the loss amount of the charges is less, so that the transmission efficiency of the CMOS-TDI image sensor is favorably improved. In addition, the nth-level pixel region Cn forms a second doped region 202, and the second doped region 202 is continuous, so that the contact area between the second doped region 202 and a subsequent second gate structure is large, which is beneficial to the charge readout efficiency. In conclusion, the CMOS-TDI image sensor formed by the method is high in transmission efficiency and readout efficiency.
The mask layer is made of silicon nitride or titanium nitride, and is used for forming a mask of the first doping region 201.
With the mask layer as a mask, the process of the first doping region 201 includes an ion implantation process. The ion implantation process includes second ions of opposite conductivity type to the first ions. In this embodiment, the second ions are N-type ions, such as: phosphorus ions or arsenic ions. In other embodiments, the second ions are P-type ions, such as: boron ions.
In each pixel region, a plurality of first doping regions 201 are arranged along a first direction H, and along the first direction H, the size of the first doping region 201 is 1 micrometer to 10 micrometers. The dimensions of the first doped region 201 in the first direction H are chosen in the sense that: if the size of the first doped regions 201 along the first direction H is smaller than 1 μm, in order to ensure that the sum of the full well capacities of all the first doped regions 201 is larger, the depth of each first doped region 201 is larger, and the difficulty in forming each first doped region 201 is larger; if the size of the first doped region 201 along the first direction H is greater than 10 μm, the contact area between the subsequent first gate structure and the first doped region 201 is larger, and the number of defects at the interface between the first gate structure and the first doped region 201 is larger, so that the dark current of the CMOS-TDI image sensor is more serious.
The minimum distance between the edges of adjacent first doped regions 201 is 0.5 to 1.5 microns. The significance of selecting the minimum distance between the edges of adjacent first doped regions 201 is: if the minimum distance between the edges of the adjacent first doped regions 201 is less than 0.5 μm, the control capability of the subsequent first gate structure on the first doped region 201 is weak; if the minimum distance between the edges of the adjacent first doped regions 201 is greater than 1.5 μm, the contact area between the subsequent first gate structure and the first doped region 201 is still large, and the number of defects at the interface between the first gate structure and the first doped region 201 is large, so that the dark current of the CMOS-TDI image sensor is still serious.
The depth of the first doped region 201 is: 0.1 to 3 microns.
Since the first doping regions 201 are separated from each other, the subsequent first gate structure is not only in surface contact with the first doping regions 201, but also in contact with the substrate 200 between adjacent first doping regions 201, and the contact area between the first gate structure and the first doping region 201 is smaller than the sum of the contact areas between the first gate structure and the first doping regions 201 and the substrate 200. Although the number of defects at the interface between the first gate structure and the substrate 200 is large, the contact area between the first gate structure and the first doped region 201 is small, and the charges trapped by the defects at the interface are small, so that the loss of the charges is large, which is not favorable for improving the charge transmission efficiency.
Referring to fig. 5 to 7, fig. 6 is a schematic cross-sectional view taken along line B-B1 in fig. 5, fig. 7 is a schematic cross-sectional view taken along line E-E1 in fig. 5, fig. 5 is a top view taken along the Y direction in fig. 6, a first gate structure 203 is formed on the surface of the substrate 200 of each pixel region C, and the first gate structure 203 crosses over a plurality of first doping regions 201.
After the first doping region 201 is formed and before the first gate structure 203 is formed, the forming method further includes: and removing the mask layer.
The process for removing the mask layer comprises one or two of a dry etching process and a wet etching process.
In the present embodiment, the plurality of pixel regions are the 1 st-level pixel region C1 to the n-1 st-level pixel region Cn-1. Further comprising: a second gate structure 204 is formed on the surface of the second doped region 202.
In other embodiments, the plurality of pixel regions are the 1 st-nth-level pixel regions.
The first gate structure 203 comprises a first gate dielectric layer positioned on the surface of the substrate of the 1 st-level pixel region C1 to the (n-1) th-level pixel region Cn-1 and a first gate layer positioned on the surface of the first gate dielectric layer. The material of the first gate dielectric layer comprises silicon oxide, and the material of the first gate layer comprises silicon.
The second gate structure 204 comprises a second gate dielectric layer located on the surface of the nth-stage pixel area Cn substrate 200 and a second gate layer located on the surface of the second gate dielectric layer. The material of the second gate dielectric layer comprises silicon oxide, and the material of the second gate layer comprises silicon.
In this embodiment, since the substrate 200 is made of silicon and the first gate dielectric layer is made of silicon oxide, the number of defects at the interface between the first gate dielectric layer and the substrate 200 is relatively large, that is: the first gate structure 202 has more defects at the interface with the first doped region 201. Although there are more defects at the interface between the first gate structure 202 and the first doped region 201, since the contact area between the first gate structure 202 and the first doped region 201 is smaller, the charges trapped by the defects at the interface are smaller, so that the loss amount of the charges of the 1 st-level pixel region C1 to the n-1 st-level pixel region Cn-1 is smaller, thereby facilitating the charge transfer efficiency. Meanwhile, the contact area between the second gate structure 204 and the second doped region 202 is large, which is beneficial to the charge readout efficiency. In conclusion, the CMOS-TDI image sensor formed by the method can improve the charge transmission efficiency and the charge readout efficiency at the same time.
The CMOS-TDI image sensor further comprises: a metal interconnection layer (not shown) on the surface of the first gate structure 203. The metal interconnection layer is made of metal.
Accordingly, the present invention further provides a CMOS-TDI image sensor, referring to fig. 5, including:
a substrate 200, wherein the substrate 200 comprises a plurality of pixel regions;
a first doping region 201 in each of the pixel region substrates 200;
the first gate structures 203 are located on the surface of each pixel region substrate 200, and the first gate structures 203 cross over the first doping regions 201.
A plurality of first doping regions 201 in each pixel region are arranged along a first direction H; in the first direction H, the dimensions of the first doped region 201 are: 1 micron to 10 microns.
The minimum distance between the edges of adjacent first doped regions 201 is: 0.5 to 1.5 microns.
The depth of the first doped region 201 is: 0.1 to 3 microns.
The number of the first doping regions 201 in each pixel region is 2-50.
The number of the first gate structures 203 in each pixel region is 2 to 4.
The first gate structure 203 includes: a first gate dielectric layer on the surface of the pixel region substrate 200 and a first electrode layer on the surface of the first gate dielectric layer; the material of the first gate dielectric layer comprises silicon oxide; the material of the substrate comprises silicon.
The pixel regions are from the 1 st-level pixel region to the (n-1) th-level pixel region; the substrate is also internally provided with an nth-level pixel region, and the substrate 200 of the nth-level pixel region is also internally provided with a second doped region; the CMOS-TDI image sensor further comprises: and a second gate structure 204 located on a surface of the second doped region.
The plurality of pixel regions are a level 1 pixel region C1 to an nth level pixel region Cn.
The pixel region substrate 200 has first ions therein; the first doped region 201 has second ions therein, which are of opposite conductivity type to the first ions.
The substrate 200 also includes a well region, which is grounded.
The CMOS-TDI image sensor further comprises: a metal interconnection layer on the surface of the first gate structure 203.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (11)
1. A CMOS-TDI image sensor, comprising:
the display device comprises a substrate, a plurality of pixel regions and a plurality of pixel regions, wherein the substrate comprises a plurality of pixel regions;
a plurality of mutually-separated first doping regions positioned in each pixel region substrate;
the first grid structure is positioned on the surface of the substrate of each pixel area and spans a plurality of first doping areas;
the pixel regions are from the 1 st-level pixel region to the (n-1) th-level pixel region; the substrate is also internally provided with an nth-level pixel area, the nth-level pixel area is also internally provided with a second doped area, and the second doped area is continuous; the image sensor further includes: and the second gate structure is positioned on the surface of the second doped region.
2. The CMOS-TDI image sensor of claim 1, wherein a plurality of first doped regions in each pixel region are arranged in a first direction; in the first direction, the size of the first doping region is 1-10 micrometers.
3. The CMOS-TDI image sensor of claim 1, wherein a minimum distance between edges of adjacent first doped regions is 0.5 to 1.5 microns.
4. The CMOS-TDI image sensor of claim 1, wherein the first doped region has a depth of: 0.1 to 3 microns.
5. The CMOS-TDI image sensor of claim 1, wherein the number of the first doped regions in each pixel region is 2 to 50.
6. The CMOS-TDI image sensor of claim 1, wherein the number of first gate structures in each pixel region is 2 to 4.
7. The CMOS-TDI image sensor of claim 1, wherein the first gate structure comprises: the first gate dielectric layer is positioned on the surface of the pixel region substrate, and the first electrode layer is positioned on the surface of the first gate dielectric layer; the material of the first gate dielectric layer comprises silicon oxide; the material of the substrate comprises silicon.
8. The CMOS-TDI image sensor of claim 1, wherein the pixel region substrate has first ions therein; the first doped region has second ions therein, and the second ions are opposite to the first ions in conductivity type.
9. The CMOS-TDI image sensor of claim 1, further comprising a well region within the substrate, the well region being grounded.
10. The CMOS-TDI image sensor of claim 1, further comprising: and the metal interconnection layer is positioned on the surface of the first gate structure.
11. A method of forming a CMOS-TDI image sensor as claimed in any one of claims 1 to 10, comprising:
providing a substrate, wherein the substrate comprises a plurality of pixel areas;
forming a plurality of first doping regions which are separated from each other in the substrate from the 1 st-level pixel region to the n-1 st-level pixel region; forming a continuous second doped region in the nth-level pixel region substrate;
forming a first gate structure on the substrate surface from the 1 st-level pixel area to the n-1 st-level pixel area, wherein the first gate structure spans a plurality of first doping areas; and forming a second gate structure on the surface of the substrate of the nth-level pixel region, wherein the second gate structure crosses the second doped region.
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